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Merge pull request #446 from 86Box/release/2.0x 
Release/2.0x
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@OBattler
OBattler committed Oct 31, 2019
2 parents 2e35055 + 353329e commit e162ca527c31bfda1a99d6e24d2dc089e7a5e1a3
Showing with 283 additions and 197 deletions.
  1. +3 −3 src/86box.h
  2. +5 −5 src/disk/hdc_ide_sff8038i.c
  3. +2 −1 src/keyboard.h
  4. +10 −1 src/keyboard_at.c
  5. +11 −14 src/mouse_serial.c
  6. +17 −20 src/pci.c
  7. +6 −6 src/pci.h
  8. +195 −101 src/serial.c
  9. +6 −5 src/serial.h
  10. +2 −2 src/sound/snd_dbopl.cc
  11. +20 −33 src/video/vid_s3.c
  12. +6 −6 src/win/86Box.rc
6 src/86box.h
View file
@@ -8,7 +8,7 @@
*
* Main include file for the application.
*
* Version: @(#)86box.h 1.0.30 2019/10/23
* Version: @(#)86box.h 1.0.31 2019/10/31
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*f Fred N. van Kempen, <decwiz@yahoo.com>
@@ -30,8 +30,8 @@
#define EMU_NAME "86Box"
#define EMU_NAME_W L"86Box"
#ifdef RELEASE_BUILD
#define EMU_VERSION "2.02"
#define EMU_VERSION_W L"2.02"
#define EMU_VERSION "2.03"
#define EMU_VERSION_W L"2.03"
#else
#define EMU_VERSION "2.10"
#define EMU_VERSION_W L"2.10"
10 src/disk/hdc_ide_sff8038i.c
View file
@@ -10,13 +10,13 @@
* word 0 - base address
* word 1 - bits 1-15 = byte count, bit 31 = end of transfer
*
* Version: @(#)hdc_ide_sff8038i.c 1.0.0 2019/05/12
* Version: @(#)hdc_ide_sff8038i.c 1.0.1 2019/10/30
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2018 Miran Grca.
* Copyright 2008-2019 Sarah Walker.
* Copyright 2016-2019 Miran Grca.
*/
#include <stdarg.h>
#include <stdint.h>
@@ -371,12 +371,12 @@ sff_bus_master_set_irq(int channel, void *priv)
channel &= 0x01;
if (dev->status & 0x04) {
if (channel && pci_use_mirq(0))
pci_set_mirq(0);
pci_set_mirq(0, 0);
else
picint(1 << (14 + channel));
} else {
if ((channel & 1) && pci_use_mirq(0))
pci_clear_mirq(0);
pci_clear_mirq(0, 0);
else
picintc(1 << (14 + channel));
}
3 src/keyboard.h
View file
@@ -8,7 +8,7 @@
*
* Definitions for the keyboard interface.
*
* Version: @(#)keyboard.h 1.0.18 2019/03/05
* Version: @(#)keyboard.h 1.0.19 2019/10/30
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -103,6 +103,7 @@ extern void keyboard_at_adddata_mouse(uint8_t val);
extern void keyboard_at_set_mouse(void (*mouse_write)(uint8_t val,void *), void *);
extern uint8_t keyboard_at_get_mouse_scan(void);
extern void keyboard_at_set_mouse_scan(uint8_t val);
extern void keyboard_at_reset(void);

#ifdef __cplusplus
}
11 src/keyboard_at.c
View file
@@ -8,7 +8,7 @@
*
* Intel 8042 (AT keyboard controller) emulation.
*
* Version: @(#)keyboard_at.c 1.0.43 2019/03/05
* Version: @(#)keyboard_at.c 1.0.44 2019/10/30
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -2298,6 +2298,15 @@ kbd_reset(void *priv)
}


/* Reset the AT keyboard - this is needed for the PCI TRC and is done
until a better solution is found. */
void
keyboard_at_reset(void)
{
kbd_reset(SavedKbd);
}


static void
kbd_close(void *priv)
{
25 src/mouse_serial.c
View file
@@ -10,7 +10,7 @@
*
* TODO: Add the Genius Serial Mouse.
*
* Version: @(#)mouse_serial.c 1.0.28 2019/03/23
* Version: @(#)mouse_serial.c 1.0.29 2019/10/31
*
* Author: Fred N. van Kempen, <decwiz@yahoo.com>
*/
@@ -112,10 +112,7 @@ sermouse_timer_on(mouse_t *dev, double period, int report)
enabled = &dev->command_enabled;
}

if (*enabled)
timer_advance_u64(timer, (uint64_t) (period * (double)TIMER_USEC));
else
timer_set_delay_u64(timer, (uint64_t) (period * (double)TIMER_USEC));
timer_on_auto(timer, period);

*enabled = 1;
}
@@ -175,7 +172,7 @@ sermouse_callback(struct serial_s *serial, void *priv)
if (dev->id[0] != 'H')
dev->format = 7;
dev->transmit_period = sermouse_transmit_period(dev, 1200, -1);
timer_disable(&dev->command_timer);
timer_stop(&dev->command_timer);
sub_cycles(ISA_CYCLES(8));
#ifdef USE_NEW_DYNAREC
sermouse_timer_on(dev, 5000.0, 0);
@@ -367,7 +364,7 @@ sermouse_command_pos_check(mouse_t *dev, int len)
if (++dev->command_pos == len)
sermouse_command_phase_idle(dev);
else
timer_advance_u64(&dev->command_timer, (uint64_t) (dev->transmit_period * (double)TIMER_USEC));
timer_on_auto(&dev->command_timer, dev->transmit_period);
}


@@ -434,6 +431,8 @@ sermouse_update_data(mouse_t *dev)

dev->lastb = dev->oldb;

mouse_serial_log("sermouse_update_data(): ret = %i\n", ret);

return ret;
}

@@ -585,8 +584,6 @@ ltsermouse_prompt_mode(mouse_t *dev, int prompt)
dev->status &= 0xBF;
if (prompt)
dev->status |= 0x40;
/* timer_disable(&dev->report_timer);
dev->report_enabled = 0; */
}


@@ -595,7 +592,7 @@ ltsermouse_command_phase(mouse_t *dev, int phase)
{
dev->command_pos = 0;
dev->command_phase = phase;
timer_disable(&dev->command_timer);
timer_stop(&dev->command_timer);
sermouse_timer_on(dev, dev->transmit_period, 0);
}

@@ -604,7 +601,7 @@ static void
ltsermouse_set_report_period(mouse_t *dev, int rps)
{
dev->report_period = sermouse_transmit_period(dev, 9600, rps);
timer_disable(&dev->report_timer);
timer_stop(&dev->report_timer);
sermouse_timer_on(dev, dev->report_period, 1);
ltsermouse_prompt_mode(dev, 0);
dev->report_phase = REPORT_PHASE_PREPARE;
@@ -681,7 +678,7 @@ ltsermouse_write(struct serial_s *serial, void *priv, uint8_t data)
case 0x4F:
ltsermouse_prompt_mode(dev, 0);
dev->report_period = 0;
timer_disable(&dev->report_timer);
timer_stop(&dev->report_timer);
dev->report_phase = REPORT_PHASE_PREPARE;
sermouse_report_timer((void *) dev);
break;
@@ -726,15 +723,15 @@ sermouse_speed_changed(void *priv)
mouse_t *dev = (mouse_t *)priv;

if (dev->report_enabled) {
timer_disable(&dev->report_timer);
timer_stop(&dev->report_timer);
if (dev->report_phase == REPORT_PHASE_TRANSMIT)
sermouse_timer_on(dev, dev->transmit_period, 1);
else
sermouse_timer_on(dev, sermouse_report_period(dev), 1);
}

if (dev->command_enabled) {
timer_disable(&dev->command_timer);
timer_stop(&dev->command_timer);
sermouse_timer_on(dev, dev->transmit_period, 0);
}
}
37 src/pci.c
View file
@@ -8,15 +8,15 @@
*
* Implementation the PCI bus.
*
* Version: @(#)pci.c 1.0.1 2018/11/05
* Version: @(#)pci.c 1.0.3 2019/10/30
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
* Sarah Walker, <tommowalker@tommowalker.co.uk>
*
* Copyright 2016-2018 Miran Grca.
* Copyright 2017,2018 Fred N. van Kempen.
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2019 Miran Grca.
* Copyright 2017-2019 Fred N. van Kempen.
* Copyright 2008-2019 Sarah Walker.
*/
#include <stdio.h>
#include <stdint.h>
@@ -321,10 +321,9 @@ pci_use_mirq(uint8_t mirq)


void
pci_set_mirq(uint8_t mirq)
pci_set_mirq(uint8_t mirq, int level)
{
uint8_t irq_line = 0;
uint8_t level = 0;

if (! pci_mirqs[mirq].enabled) {
pci_log("pci_set_mirq(%02X): MIRQ0 disabled\n", mirq);
@@ -339,20 +338,21 @@ pci_set_mirq(uint8_t mirq)
irq_line = pci_mirqs[mirq].irq_line;
pci_log("pci_set_mirq(%02X): Using IRQ %i\n", mirq, irq_line);

if (pci_irq_is_level(irq_line) &&
(pci_irq_hold[irq_line] & (1ULL << (0x1E + mirq)))) {
if (level && (pci_irq_hold[irq_line] & (1ULL << (0x1E + mirq)))) {
/* IRQ already held, do nothing. */
pci_log("pci_set_mirq(%02X): MIRQ is already holding the IRQ\n", mirq);
return;
}
pci_log("pci_set_mirq(%02X): MIRQ not yet holding the IRQ\n", mirq);

level = pci_irq_is_level(irq_line);
if (!level || !pci_irq_hold[irq_line]) {
pci_log("pci_set_mirq(%02X): Issuing %s-triggered IRQ (%sheld)\n", mirq, level ? "level" : "edge", pci_irq_hold[irq_line] ? "" : "not ");

/* Only raise the interrupt if it's edge-triggered or level-triggered and not yet being held. */
picintlevel(1 << irq_line);
if (level)
picintlevel(1 << irq_line);
else
picint(1 << irq_line);
} else if (level && pci_irq_hold[irq_line]) {
pci_log("pci_set_mirq(%02X): IRQ line already being held\n", mirq);
}
@@ -376,7 +376,6 @@ pci_set_irq(uint8_t card, uint8_t pci_int)
uint8_t irq_line = 0;
uint8_t level = 0;


if (! last_pci_card) {
pci_log("pci_set_irq(%02X, %02X): No PCI slots (how are we even here?!)\n", card, pci_int);
return;
@@ -418,9 +417,9 @@ pci_set_irq(uint8_t card, uint8_t pci_int)
pci_log("pci_set_irq(%02X, %02X): Card not yet holding the IRQ\n", card, pci_int);

if (pci_type & PCI_NO_IRQ_STEERING)
level = 0;
level = 0; /* PCI without IRQ steering - IRQ always edge. */
else
level = pci_irq_is_level(irq_line);
level = 1; /* PCI with IRQ steering - IRQ always level per the Intel datasheets. */
if (!level || !pci_irq_hold[irq_line]) {
pci_log("pci_set_irq(%02X, %02X): Issuing %s-triggered IRQ (%sheld)\n", card, pci_int, level ? "level" : "edge", pci_irq_hold[irq_line] ? "" : "not ");

@@ -444,10 +443,9 @@ pci_set_irq(uint8_t card, uint8_t pci_int)


void
pci_clear_mirq(uint8_t mirq)
pci_clear_mirq(uint8_t mirq, int level)
{
uint8_t irq_line = 0;
uint8_t level = 0;

if (mirq > 1) {
pci_log("pci_clear_mirq(%02X): Invalid MIRQ\n", mirq);
@@ -467,14 +465,12 @@ pci_clear_mirq(uint8_t mirq)
irq_line = pci_mirqs[mirq].irq_line;
pci_log("pci_clear_mirq(%02X): Using IRQ %i\n", mirq, irq_line);

if (pci_irq_is_level(irq_line) &&
!(pci_irq_hold[irq_line] & (1ULL << (0x1E + mirq)))) {
if (level && !(pci_irq_hold[irq_line] & (1ULL << (0x1E + mirq)))) {
/* IRQ not held, do nothing. */
pci_log("pci_clear_mirq(%02X): MIRQ is not holding the IRQ\n", mirq);
return;
}

level = pci_irq_is_level(irq_line);
if (level) {
pci_log("pci_clear_mirq(%02X): Releasing this MIRQ's hold on the IRQ\n", mirq);
pci_irq_hold[irq_line] &= ~(1 << (0x1E + mirq));
@@ -543,9 +539,9 @@ pci_clear_irq(uint8_t card, uint8_t pci_int)
}

if (pci_type & PCI_NO_IRQ_STEERING)
level = 0;
level = 0; /* PCI without IRQ steering - IRQ always edge. */
else
level = pci_irq_is_level(irq_line);
level = 1; /* PCI with IRQ steering - IRQ always level per the Intel datasheets. */
if (level) {
pci_log("pci_clear_irq(%02X, %02X): Releasing this card's hold on the IRQ\n", card, pci_int);
pci_irq_hold[irq_line] &= ~(1 << card);
@@ -624,6 +620,7 @@ trc_reset(uint8_t val)
flushmmucache();

pci_reset();
keyboard_at_reset();
}

resetx86();
12 src/pci.h
View file
@@ -8,15 +8,15 @@
*
* Definitions for the PCI handler module.
*
* Version: @(#)pci.h 1.0.0 2018/10/21
* Version: @(#)pci.h 1.0.1 2019/10/30
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
* Sarah Walker, <tommowalker@tommowalker.co.uk>
*
* Copyright 2016-2018 Miran Grca.
* Copyright 2017,2018 Fred N. van Kempen.
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2019 Miran Grca.
* Copyright 2017-2019 Fred N. van Kempen.
* Copyright 2008-2019 Sarah Walker.
*/
#ifndef EMU_PCI_H
# define EMU_PCI_H
@@ -76,9 +76,9 @@ extern uint8_t pci_use_mirq(uint8_t mirq);

extern int pci_irq_is_level(int irq);

extern void pci_set_mirq(uint8_t mirq);
extern void pci_set_mirq(uint8_t mirq, int level);
extern void pci_set_irq(uint8_t card, uint8_t pci_int);
extern void pci_clear_mirq(uint8_t mirq);
extern void pci_clear_mirq(uint8_t mirq, int level);
extern void pci_clear_irq(uint8_t card, uint8_t pci_int);

extern void pci_reset(void);

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