diff --git a/arch/arm64/boot/dts/hi6220-hikey.dts b/arch/arm64/boot/dts/hi6220-hikey.dts
index 17e69b3b0e28ed..dd2bff8bf022bb 100644
--- a/arch/arm64/boot/dts/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hi6220-hikey.dts
@@ -230,8 +230,7 @@
 		nshutdown_gpio = <503>;
 		dev_name = "/dev/ttyAMA1";
 		flow_cntrl = <1>;
-		/* baud_rate = <3000000>; */
-		baud_rate = <115200>;
+		baud_rate = <3000000>;
 	};
 
 	btwilink {
diff --git a/arch/arm64/boot/dts/hi6220.dtsi b/arch/arm64/boot/dts/hi6220.dtsi
index 00ff9b7d80e006..9044d392338916 100644
--- a/arch/arm64/boot/dts/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hi6220.dtsi
@@ -230,6 +230,7 @@
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0x0 0xf8015000 0x0 0x1000>;
 			interrupts = <0 36 4>;
+			clock-freq-high = <0>;
 			clocks = <&clock_ao HI6220_UART0_PCLK>;
 			clock-names = "apb_pclk";
 			status = "disabled";
@@ -253,6 +254,7 @@
 			reg = <0x0 0xf7112000 0x0 0x1000>;
 			interrupts = <0 38 4>;
 			reset-controller-reg = <0x330 0x334 0x338 6>;
+			clock-freq-high = <0>;
 			clocks = <&clock_sys HI6220_UART2_PCLK>;
 			clock-names = "apb_pclk";
 			clk-enable-flag = <0>;
@@ -265,6 +267,7 @@
 			reg = <0x0 0xf7113000 0x0 0x1000>;
 			interrupts = <0 39 4>;
 			reset-controller-reg = <0x330 0x334 0x338 7>;
+			clock-freq-high = <0>;
 			clocks = <&clock_sys HI6220_UART3_PCLK>;
 			clock-names = "apb_pclk";
 			clk-enable-flag = <0>;
@@ -277,6 +280,7 @@
 			reg = <0x0 0xf7114000 0x0 0x1000>;
 			interrupts = <0 40 4>;
 			reset-controller-reg = <0x330 0x334 0x338 8>;
+			clock-freq-high = <0>;
 			clocks = <&clock_sys HI6220_UART4_PCLK>;
 			clock-names = "apb_pclk";
 			clk-enable-flag = <0>;
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index 02016fcd91b850..647b535309c35f 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -47,6 +47,7 @@
 #include <linux/amba/bus.h>
 #include <linux/amba/serial.h>
 #include <linux/clk.h>
+#include <linux/clk-private.h>
 #include <linux/slab.h>
 #include <linux/dmaengine.h>
 #include <linux/dma-mapping.h>
@@ -148,6 +149,7 @@ struct pl011_dmatx_data {
 struct uart_amba_port {
 	struct uart_port	port;
 	struct clk		*clk;
+	struct clk              *parent_clk;
 	const struct vendor_data *vendor;
 	unsigned int		dmacr;		/* dma control reg */
 	unsigned int		im;		/* interrupt mask */
@@ -158,6 +160,7 @@ struct uart_amba_port {
 	unsigned int		old_cr;		/* state during shutdown */
 	bool			autorts;
 	char			type[12];
+	unsigned int            clkin_high;
 #ifdef CONFIG_DMA_ENGINE
 	/* DMA stuff */
 	bool			using_tx_dma;
@@ -2140,6 +2143,7 @@ static int pl011_probe(struct amba_device *dev, const struct amba_id *id)
 {
 	struct uart_amba_port *uap;
 	struct vendor_data *vendor = id->data;
+	struct clk *clk_parent = NULL;
 	void __iomem *base;
 	int i, ret;
 
@@ -2166,6 +2170,28 @@ static int pl011_probe(struct amba_device *dev, const struct amba_id *id)
 	if (IS_ERR(uap->clk))
 		return PTR_ERR(uap->clk);
 
+	/* clk switch for high BAUD*/
+	ret = of_property_read_u32_array(dev->dev.of_node, "clock-freq-high",
+					&uap->clkin_high, 1);
+	if(ret) {
+		dev_err(&dev->dev,"%s doesn't have clock-freq-high property!\n",
+			__func__);
+	}
+
+	if(uap->clkin_high) {
+		uap->parent_clk = clk_get_parent(uap->clk);
+		if (IS_ERR_OR_NULL(uap->parent_clk))
+			return PTR_ERR(uap->parent_clk);
+
+		clk_parent = clk_get_parent_by_index(uap->parent_clk, 1);
+		if (IS_ERR_OR_NULL(clk_parent))
+			return PTR_ERR(clk_parent);
+
+		ret = clk_set_parent(uap->parent_clk, clk_parent);
+		if(ret)
+			return ret;
+	}
+
 	uap->vendor = vendor;
 	uap->lcrh_rx = vendor->lcrh_rx;
 	uap->lcrh_tx = vendor->lcrh_tx;