From a9c8c6a94ca585d6d00251798296bc1b5fb71916 Mon Sep 17 00:00:00 2001 From: Xinliang Liu Date: Fri, 13 Mar 2015 17:36:34 +0800 Subject: [PATCH] gpu/drm: hisilicon: Use the old stable 720P timing Signed-off-by: Xinliang Liu --- drivers/gpu/drm/hisilicon/hisi_drm_dsi.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c b/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c index 09d8971f2f7fc4..4f4cfb3ab14736 100644 --- a/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c +++ b/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c @@ -765,7 +765,10 @@ static void hisi_drm_encoder_mode_set(struct drm_encoder *encoder, vm->hsync_len = mode->hsync_end - mode->hsync_start; /* laneBitRate >= pixelClk*24/lanes */ - dsi->dphy_freq = vm->pixelclock*24/dsi->lanes; + if (vm->vactive == 720 && vm->pixelclock == 75) + dsi->dphy_freq = 640; /* for 720p 640M is more stable */ + else + dsi->dphy_freq = vm->pixelclock*24/dsi->lanes; vm->flags = 0; if (mode->flags & DRM_MODE_FLAG_PHSYNC) @@ -853,7 +856,7 @@ static int hisi_get_default_modes(struct drm_connector *connector) } mode->vrefresh = 60; - mode->clock = 74175; + mode->clock = 75000; mode->hdisplay = 1280; mode->hsync_start = 1500; mode->hsync_end = 1540;