Be notified of new releases
Create your free GitHub account today to subscribe to this repository for new releases and build software alongside 28 million developers.Sign up
IAR Compiler 8.20.1 does not support access to PSPLIM and MPSLIM on ARMv8-M Baseline (Cortex-M23) using compiler intrinsics. You might get an error like:
Special register "PSPLIM" is not available
Work around: Remove setting PSPLIM until a fixed compiler version is available.
- Aligned MSPLIM and PSPLIM access functions along supported compilers.
- Refactored L1 cache maintenance to be compiler agnostic.
- Changed: Communication via WinUSB to achieve high-speed transfer rates
- Added: Streaming SWO via separate WinUSB endpoint
- Added: DAP_SWO_Transport extended with transport mode 2 - Send trace data via separate WinUSB endpoint
- Initial contribution of a Neural Network Function Library
- RTX 5.3.0
- Added Object Memory usage counters.
- Added support for additional external configuration file.
- Added user configurable names for system threads (Idle and Timer).
- Added support for OS sections when using ARMCC5.
- Added callback for MPU integration (experimental)
- Increased default thread stack sizes to 256 bytes.
- Fixed stack context display for running thread in SCVD.
- Enhanced MISRA Compliance.