@JonatanAntoni JonatanAntoni released this Feb 22, 2018 · 203 commits to master since this release

Assets 3

Known Issues

  • IAR Compiler 8.20.1 does not support access to PSPLIM and MPSLIM on ARMv8-M Baseline (Cortex-M23) using compiler intrinsics. You might get an error like:

    ".\tz_context.c",74 Error[Ta140]:
    Special register "PSPLIM" is not available

    Work around: Remove setting PSPLIM until a fixed compiler version is available.

Release Notes

CMSIS-Core(M): 5.1.1

  • Aligned MSPLIM and PSPLIM access functions along supported compilers.

CMSIS-Core(A): 1.1.1

  • Refactored L1 cache maintenance to be compiler agnostic.

CMSIS-DAP: 2.0.0

  • Changed: Communication via WinUSB to achieve high-speed transfer rates
  • Added: Streaming SWO via separate WinUSB endpoint
  • Added: DAP_SWO_Transport extended with transport mode 2 - Send trace data via separate WinUSB endpoint

CMSIS-DSP: 1.5.2

CMSIS-Driver: 2.6.0

CMSIS-NN: 1.0.0

  • Initial contribution of a Neural Network Function Library

CMSIS-RTOS2: 2.1.2

  • RTX 5.3.0
    • Added Object Memory usage counters.
    • Added support for additional external configuration file.
    • Added user configurable names for system threads (Idle and Timer).
    • Added support for OS sections when using ARMCC5.
    • Added callback for MPU integration (experimental)
    • Increased default thread stack sizes to 256 bytes.
    • Fixed stack context display for running thread in SCVD.
    • Enhanced MISRA Compliance.