Very minor nit, feel free to ignore. Because the previous sentence ends with "`vnum` to `slice`", to me it reads better to have the following sentence to start with a word that's not `slice` or `vnum`, e.g. Both `slice` and `vnum` can be variable.

nit: is it worth making this more specific to the intrinsics for `ldr` and `str`, e.g. > However, load and store intrinsics that take both a `vnum` parameter and a `slice` parameter add `vnum` to `slice`. -> > One exception are the array vector load and store intrinsics that take both a `vnum` parameter and a `slice` parameter. These intrinsics add `vnum` to `slice`. ?

nit: s/Some SME instructions index ZA/Some SME instructions index _into_ ZA/ ?

I think this should no longer have a `_vnum_` ?

With slice and vnum being independent values, I guess this means that vnum and slice offset can be different, such that: ``` svldr_vnum_za(1, ptr, 1) => mov w12, #0 ldr za[w12, 1], [x0, #1, mul vl] ``` and ``` svldr_vnum_za(1, ptr, 2) => mov w12, #0 addsvl x0, #1 ldr za[w12, 1], [x0, #1, mul vl] or mov w12, #-1 ldr za[w12, 2], [x0, #2, mul vl] ``` and ``` svldr_vnum_za(tile, ptr, 2) => sub w12, #2 ldr za[w12, 2], [x0, #2, mul vl] ``` The extra instructions to match the immediates may be unexpected by people using this intrinsic. is it worth either keeping the svldr instruction in the old form, or otherwise pointing out how to get the best results from this intrinsic in a comment? (e.g. `svldr_num_za(slice + 2, ptr, 2)` can be done in one instruction, whereas `svldr_vnum_za(slice, ptr, 2)` cannot)

s/reister/register/