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antonio-nino-diaz-arm
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Nov 6, 2017
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Introduce AArch64 Raspberry Pi 3 port #1156
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danh-arm
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Nov 29, 2017
This basically looks good apart from a few doc issues. Also needs a rebase.
| /* Number of children for the first node */ | ||
| PLATFORM_CLUSTER0_CORE_COUNT, | ||
| /* Number of children for the second node */ | ||
| PLATFORM_CLUSTER1_CORE_COUNT, |
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| Design | ||
| ------ | ||
| The SoC used by the Raspberry Pi 3 is the Broadcom BCM2837. It is a strange SoC |
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| The Raspberry Pi 3 is an inexpensive single-board computer that contains four | ||
| Cortex-A53 cores, which makes it possible to have a port of the Arm Trusted | ||
| Firmware. |
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danh-arm
Nov 29, 2017
Contributor
Would be good to have a reference to the official website (e.g. https://www.raspberrypi.org/products/raspberry-pi-3-model-b/).
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| ``0x0`` (instead of the default one) and execute it in EL3 in AArch64. All the | ||
| cores are powered on at the same time and start at address ``0x0``. | ||
| This is ideal for us, as we can save the default AArch32 kernel in |
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danh-arm
Nov 29, 2017
Contributor
Why an AArch32 kernel? Presumably both AArch64 and AArch32 can be supported.
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antonio-nino-diaz-arm
Dec 1, 2017
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I've added a short paragraph at the start of the documentation explaining the references to the AArch32 kernel. Also, the instructions to have a AArch64 kernel aren't that complicated, and most of this documentation applies to both kernels, so I've modified a bit the whole document in order to explain how to use both.
| # Disable the PSCI platform compatibility layer by default | ||
| ENABLE_PLAT_COMPAT := 0 | ||
| # BL1 is overwriten by the 32-bit kernel |
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antonio-nino-diaz-arm
Dec 1, 2017
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I've changed this comment to a generic one and have the documentation explain the reason why this option is used.
| Ideally, we want to boot the kernel in Hypervisor mode in AArch32. This means | ||
| that BL33 can't be in EL2 in AArch64 mode. The architecture specifies that | ||
| AArch32 Hypervisor mode isn't present when AArch64 is used for EL2. |
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danh-arm
Nov 29, 2017
Contributor
This doesn't seem relevant. This port seems to support either AArch32 or AArch64 depending on the flag RPI3_BL33_IN_AARCH32.
| The device tree block is loaded by the VideoCore loader from an appropriate | ||
| file, but we can specify the address it is loaded to in ``config.txt``. | ||
| The file ``kernel8.img`` contains an AArch32 kernel image, that is loaded to the |
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| is BL33, which is booted in AArch32 Hypervisor mode so that it can jump to the | ||
| kernel in the same mode and let it take over that privilege level. If BL33 was | ||
| running in EL2 in AArch64, it could only jump to the kernel in AArch32 in | ||
| Supervisor mode. |
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| All forms of interrupts must be disabled (IRQs and FIQs) | ||
| The AArch32 bootstrap takes care of the setup of the registers, and BL2 setups | ||
| the BL33 context so that all interrupts are disabled. |
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danh-arm
Nov 29, 2017
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This is specific to the AArch32 kernel. The ARM64 kernel has a different boot interface.
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antonio-nino-diaz-arm
Dec 1, 2017
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I've removed this part and just kept the reference to the file with the information.
| Secondary cores | ||
| ~~~~~~~~~~~~~~~ | ||
| The 32-bit kernel used by Raspbian doesn't have support for PSCI, so it is |
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danh-arm
Nov 29, 2017
Contributor
Ah - so now I see why all the AArch32 references. Is there not an AArch64 kernel available for RPi3? If not, this doc should say somewhere why an AArch32 kernel is specifically referenced, while also saying AArch64 kernels are theoretically supported by this port.
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|
jenkins: test this please |
antonio-nino-diaz-arm commentedNov 6, 2017
This port can be compiled to boot an AArch64 or AArch32 payload with the build option
RPI3_BL33_AARCH32.Note: This is not a secure port of the Trusted Firmware. This port is only meant to be a reference implementation to experiment with an inexpensive board in real hardware.
This port is based on the work of Ard Biesheuvel (@ardbiesheuvel), that can be found in http://www.workofard.com/2017/02/uefi-on-the-pi/, see repository in https://github.com/ardbiesheuvel/arm-trusted-firmware/tree/rpi3. That port has been heavily modified. For starters, that port didn't manage to boot Linux or to release the secondary CPUs from their wait loop because the RAM wasn't initialized to 0 before entering the loop.