From f3dc07dbe320e737a2919bccf64fdd67be007cea Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Sun, 15 Aug 2021 20:58:47 -0500 Subject: [PATCH 1/2] Update UT_RELAX_CPU to match upstream changes in MySQL http://github.com/mysql/mysql-server/pull/305 uses an 'isb' which makes the adaptive-spin behavior match x86s --- ext/mysql/include/ut_atomics.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/ext/mysql/include/ut_atomics.h b/ext/mysql/include/ut_atomics.h index caacb5d..339551e 100644 --- a/ext/mysql/include/ut_atomics.h +++ b/ext/mysql/include/ut_atomics.h @@ -21,10 +21,10 @@ this program; if not, write to the Free Software Foundation, Inc., #if defined(__x86_64__) #define UT_RELAX_CPU() asm volatile ("rep; nop") -#elif defined(__AARCH64__) +#elif defined(__aarch64__) // Theoretically we could emit a yield here but MySQL doesn't do it // and most ARM cores are likely to NOP it anyway -#define UT_RELAX_CPU() asm volatile ("":::"memory") +#define UT_RELAX_CPU() asm volatile ("isb":::"memory") #else #define UT_RELAX_CPU() asm volatile ("":::"memory") #endif From d1322c4037b8807b72bcd2c12dea64be187c513d Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Thu, 16 Sep 2021 18:02:28 -0500 Subject: [PATCH 2/2] Fix cpu_relax and add RELAX_IS_ISB Add support for a define RELAX_IS_ISB that adapts cpu_relax() to using an isb instead of a yield(). --- ext/linux/include/lk_atomics.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/ext/linux/include/lk_atomics.h b/ext/linux/include/lk_atomics.h index 86e9b06..bf6a793 100644 --- a/ext/linux/include/lk_atomics.h +++ b/ext/linux/include/lk_atomics.h @@ -251,7 +251,9 @@ static inline uint16_t xchg_release16(uint16_t *ptr, uint16_t val) { static inline void cpu_relax (void) { #if defined(__x86_64__) asm volatile ("pause" : : : "memory" ); -#elif defined (__arch64__) +#elif defined (__aarch64__) && defined(RELAX_IS_ISB) + asm volatile ("isb" : : : "memory" ); +#elif defined (__aarch64__) asm volatile ("yield" : : : "memory" ); #endif }