From a3fccf7d216641e83b5ce6b0b3a21f4d0f3c37f1 Mon Sep 17 00:00:00 2001 From: Hugues Kamba Date: Fri, 8 Jan 2021 18:18:40 +0000 Subject: [PATCH] STM: Fix heap size formula in scatter files The heap size was incorrectly calculated. This fixes it by subtracting the Stack size, any memory chunks allocated before the start of the application (for vectors and/or crash report), and finally the size of the application from the total RAM size. --- .../TARGET_STM32F411xE/TOOLCHAIN_ARM/stm32f411re.sct | 2 +- .../TARGET_STM32F412xG/TOOLCHAIN_ARM/stm32f412xg.sct | 2 +- .../TARGET_STM32F429xI/TOOLCHAIN_ARM/stm32f429xx.sct | 2 +- .../TARGET_STM32F439xI/TOOLCHAIN_ARM/stm32f439xx.sct | 2 +- .../TARGET_STM32L443xC/TOOLCHAIN_ARM/stm32l443xc.sct | 2 +- .../TARGET_STM32L452xE/TOOLCHAIN_ARM/stm32l452xe.sct | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_ARM/stm32f411re.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_ARM/stm32f411re.sct index 0937528776f..29814e0e668 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_ARM/stm32f411re.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_ARM/stm32f411re.sct @@ -60,7 +60,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - RAM_FIXED_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_IRAM1_START + MBED_RAM_SIZE - RAM_FIXED_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_ARM/stm32f412xg.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_ARM/stm32f412xg.sct index 0937528776f..29814e0e668 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_ARM/stm32f412xg.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_ARM/stm32f412xg.sct @@ -60,7 +60,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - RAM_FIXED_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_IRAM1_START + MBED_RAM_SIZE - RAM_FIXED_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_ARM/stm32f429xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_ARM/stm32f429xx.sct index 61af5c9ea58..4a362074c51 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_ARM/stm32f429xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_ARM/stm32f429xx.sct @@ -57,7 +57,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - RAM_FIXED_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_IRAM1_START + MBED_RAM_SIZE - RAM_FIXED_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } RW_IRAM2 (MBED_RAM1_START) (MBED_RAM1_SIZE) { ; RW data diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_ARM/stm32f439xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_ARM/stm32f439xx.sct index 61af5c9ea58..4a362074c51 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_ARM/stm32f439xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_ARM/stm32f439xx.sct @@ -57,7 +57,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - RAM_FIXED_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_IRAM1_START + MBED_RAM_SIZE - RAM_FIXED_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } RW_IRAM2 (MBED_RAM1_START) (MBED_RAM1_SIZE) { ; RW data diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/TOOLCHAIN_ARM/stm32l443xc.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/TOOLCHAIN_ARM/stm32l443xc.sct index 32a1e454f25..2772062014e 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/TOOLCHAIN_ARM/stm32l443xc.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/TOOLCHAIN_ARM/stm32l443xc.sct @@ -102,7 +102,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_IRAM2_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { } RW_IRAM2 MBED_IRAM2_START MBED_IRAM2_SIZE { diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/TOOLCHAIN_ARM/stm32l452xe.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/TOOLCHAIN_ARM/stm32l452xe.sct index 0e84d14abc6..c37d65dc72b 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/TOOLCHAIN_ARM/stm32l452xe.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/TOOLCHAIN_ARM/stm32l452xe.sct @@ -68,7 +68,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_IRAM2_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } RW_IRAM2 MBED_IRAM2_START MBED_IRAM2_SIZE {