diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/PeripheralPins.c b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/PeripheralPins.c index 8df216352eb..574a13a6231 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/PeripheralPins.c +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/PeripheralPins.c @@ -115,16 +115,19 @@ const PinMap PinMap_PWM[] = { {PA_0 , PWM_6, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, {PA_1 , PWM_7, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, {PA_5 , PWM_2, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, + {PA_6 , PWM_3, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, {PA_7 , PWM_4, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, {PA_8 , PWM_5, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, {PA_9 , PWM_6, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, {PA_10, PWM_7, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, {PC_0 , PWM_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, {PC_2 , PWM_2, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, + {PC_3 , PWM_3, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, {PC_4 , PWM_4, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, {PC_5 , PWM_5, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, {PC_8 , PWM_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)}, {PC_10, PWM_2, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, + {PC_11, PWM_3, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, {NC , NC , WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)} }; diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/PeripheralPins.c b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/PeripheralPins.c index 6af61271311..8023470f43d 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/PeripheralPins.c +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/PeripheralPins.c @@ -117,16 +117,19 @@ const PinMap PinMap_PWM[] = { {PA_0 , PWM_6, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, {PA_1 , PWM_7, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, {PA_5 , PWM_2, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, + {PA_6 , PWM_3, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, {PA_7 , PWM_4, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, {PA_8 , PWM_5, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, {PA_9 , PWM_6, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, {PA_10, PWM_7, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)}, {PC_0 , PWM_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, {PC_2 , PWM_2, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, + {PC_3 , PWM_3, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, {PC_4 , PWM_4, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, {PC_5 , PWM_5, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, {PC_8 , PWM_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)}, {PC_10, PWM_2, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, + {PC_11, PWM_3, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)}, {NC , NC , WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)} }; diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/rtc_api.c b/targets/TARGET_WIZNET/TARGET_W7500x/rtc_api.c deleted file mode 100644 index e789f4afb18..00000000000 --- a/targets/TARGET_WIZNET/TARGET_W7500x/rtc_api.c +++ /dev/null @@ -1,81 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "rtc_api.h" -#include "cmsis.h" -#include "W7500x_pwm.h" - -time_t wiz_rtc_time; -char rtc_enabled = 0; - -#ifdef __cplusplus -extern "C"{ -#endif -void PWM3_Handler(void) -{ - - wiz_rtc_time++; - PWM_CH3_ClearOverflowInt(); - -} -#ifdef __cplusplus -} -#endif - - - -void rtc_init(void) { - PWM_TimerModeInitTypeDef TimerModeStructure; - *(volatile uint32_t *)(0x410010e0) = 0x03; - - /* Timer mode configuration */ - TimerModeStructure.PWM_CHn_PR = 7; - TimerModeStructure.PWM_CHn_MR = 1; - TimerModeStructure.PWM_CHn_LR = 0xF4240; - TimerModeStructure.PWM_CHn_UDMR = PWM_CHn_UDMR_UpCount; - TimerModeStructure.PWM_CHn_PDMR = PWM_CHn_PDMR_Periodic; - - PWM_TimerModeInit(PWM_CH3, &TimerModeStructure); - - /* PWM interrupt configuration */ - PWM_IntConfig(PWM_CH3, ENABLE); - PWM_CHn_IntConfig(PWM_CH3, PWM_CHn_IER_OIE, ENABLE); - - /* PWM channel 0 start */ - PWM_CHn_Start(PWM_CH3); - NVIC_SetVector(PWM3_IRQn, (uint32_t)PWM3_Handler); - NVIC_EnableIRQ(PWM3_IRQn); - rtc_enabled = 1; -} - -void rtc_free(void) { - // [TODO] -} - - -int rtc_isenabled(void) { - return rtc_enabled; -} - - -time_t rtc_read(void) { - return wiz_rtc_time; -} - -void rtc_write(time_t t) { - //*(volatile uint32_t *)(0x41001008) = 0x42; // timer disable, interrupt disable - wiz_rtc_time = t; - //*(volatile uint32_t *)(0x41001008) = 0x72; // timer enable interrupt enable -} diff --git a/targets/targets.json b/targets/targets.json index 2dd940be365..d52a37b5dce 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -2601,7 +2601,7 @@ "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"], "inherits": ["Target"], - "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"], "release_versions": ["2", "5"] }, "WIZWIKI_W7500P": { @@ -2611,7 +2611,7 @@ "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"], "inherits": ["Target"], - "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"], "release_versions": ["2", "5"] }, "WIZWIKI_W7500ECO": { @@ -2620,7 +2620,7 @@ "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"], "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""], "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"], - "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"], "release_versions": ["2", "5"] }, "SAMR21G18A": {