| Original file line number | Diff line number | Diff line change |
|---|---|---|
|
|
@@ -27,7 +27,7 @@ | |
| .file "irq_armv8mml.S" | ||
| .syntax unified | ||
|
|
||
| #ifndef __DOMAIN_NS | ||
| .equ __DOMAIN_NS, 0 | ||
| #endif | ||
|
|
||
|
|
||
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,216 @@ | ||
| /* | ||
| * Copyright (c) 2013 Nordic Semiconductor ASA | ||
| * All rights reserved. | ||
| * | ||
| * Redistribution and use in source and binary forms, with or without modification, | ||
| * are permitted provided that the following conditions are met: | ||
| * | ||
| * 1. Redistributions of source code must retain the above copyright notice, this list | ||
| * of conditions and the following disclaimer. | ||
| * | ||
| * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA | ||
| * integrated circuit in a product or a software update for such product, must reproduce | ||
| * the above copyright notice, this list of conditions and the following disclaimer in | ||
| * the documentation and/or other materials provided with the distribution. | ||
| * | ||
| * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be | ||
| * used to endorse or promote products derived from this software without specific prior | ||
| * written permission. | ||
| * | ||
| * 4. This software, with or without modification, must only be used with a | ||
| * Nordic Semiconductor ASA integrated circuit. | ||
| * | ||
| * 5. Any software provided in binary or object form under this license must not be reverse | ||
| * engineered, decompiled, modified and/or disassembled. | ||
| * | ||
| * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND | ||
| * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED | ||
| * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
| * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR | ||
| * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
| * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
| * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
| * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | ||
| * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
| * | ||
| */ | ||
|
|
||
| #ifndef MBED_PINNAMES_H | ||
| #define MBED_PINNAMES_H | ||
|
|
||
| #include "cmsis.h" | ||
|
|
||
| #ifdef __cplusplus | ||
| extern "C" { | ||
| #endif | ||
|
|
||
| typedef enum { | ||
| PIN_INPUT, | ||
| PIN_OUTPUT | ||
| } PinDirection; | ||
|
|
||
| #define PORT_SHIFT 3 | ||
|
|
||
| typedef enum { | ||
| p0 = 0, | ||
| p1 = 1, | ||
| p2 = 2, | ||
| p3 = 3, | ||
| p4 = 4, | ||
| p5 = 5, | ||
| p6 = 6, | ||
| p7 = 7, | ||
| p8 = 8, | ||
| p9 = 9, | ||
| p10 = 10, | ||
| p11 = 11, | ||
| p12 = 12, | ||
| p13 = 13, | ||
| p14 = 14, | ||
| p15 = 15, | ||
| p16 = 16, | ||
| p17 = 17, | ||
| p18 = 18, | ||
| p19 = 19, | ||
| p20 = 20, | ||
| p21 = 21, | ||
| p22 = 22, | ||
| p23 = 23, | ||
| p24 = 24, | ||
| p25 = 25, | ||
| p26 = 26, | ||
| p27 = 27, | ||
| p28 = 28, | ||
| p29 = 29, | ||
| p30 = 30, | ||
|
|
||
| P0_0 = p0, | ||
| P0_1 = p1, | ||
| P0_2 = p2, | ||
| P0_3 = p3, | ||
| P0_4 = p4, | ||
| P0_5 = p5, | ||
| P0_6 = p6, | ||
| P0_7 = p7, | ||
|
|
||
| P0_8 = p8, | ||
| P0_9 = p9, | ||
| P0_10 = p10, | ||
| P0_11 = p11, | ||
| P0_12 = p12, | ||
| P0_13 = p13, | ||
| P0_14 = p14, | ||
| P0_15 = p15, | ||
|
|
||
| P0_16 = p16, | ||
| P0_17 = p17, | ||
| P0_18 = p18, | ||
| P0_19 = p19, | ||
| P0_20 = p20, | ||
| P0_21 = p21, | ||
| P0_22 = p22, | ||
| P0_23 = p23, | ||
|
|
||
| P0_24 = p24, | ||
| P0_25 = p25, | ||
| P0_26 = p26, | ||
| P0_27 = p27, | ||
| P0_28 = p28, | ||
| P0_29 = p29, | ||
| P0_30 = p30, | ||
| /* | ||
| ┏━━━━━━━━━━┓ | ||
| UART┬── TX D0 ╶┨ 1 ╒╕ 16 ┠╴ VCC | ||
| └── RX D1 ╶┨ 2 ╘╛ 15 ┠╴ D8 SCL ─┬I²C | ||
| D2 ╶┨ 3 14 ┠╴ D7 SDA ─┘ | ||
| SPI┬ MOSI D3 ╶┨ 4 13 ┠╴ A0 | ||
| │ MISO D4 ╶┨ 5 ┌──┐12 ┠╴ A1 | ||
| │ SEL D5 ╶┨ 6 └──┘11 ┠╴ D9 AREF | ||
| └─ CLK D4 ╶┨ 7 10 ┠╴ A2 | ||
| GND ╶┨ 8 :: 9 ┠╴ A3 | ||
| ┗━━━━━━━━━━┛ | ||
| */ | ||
|
|
||
| OSHCHIP_PIN_1 = p20, | ||
| OSHCHIP_PIN_2 = p18, | ||
| OSHCHIP_PIN_3 = p16, | ||
| OSHCHIP_PIN_4 = p15, | ||
| OSHCHIP_PIN_5 = p12, | ||
| OSHCHIP_PIN_6 = p11, | ||
| OSHCHIP_PIN_7 = p9, | ||
| OSHCHIP_PIN_9 = p1, | ||
| OSHCHIP_PIN_10 = p2, | ||
| OSHCHIP_PIN_11 = p0, | ||
| OSHCHIP_PIN_12 = p27, | ||
| OSHCHIP_PIN_13 = p26, | ||
| OSHCHIP_PIN_14 = p24, | ||
| OSHCHIP_PIN_15 = p21, | ||
|
|
||
| LED1 = p8, | ||
| LED2 = p5, | ||
| LED3 = p3, | ||
|
|
||
| LED_RED = LED1, | ||
| LED_GREEN = LED2, | ||
| LED_BLUE = LED3, | ||
|
|
||
| RX_PIN_NUMBER = OSHCHIP_PIN_2, | ||
| TX_PIN_NUMBER = OSHCHIP_PIN_1, | ||
| CTS_PIN_NUMBER = (int)0xFFFFFFFF, //no connection | ||
| RTS_PIN_NUMBER = (int)0xFFFFFFFF, //no connection | ||
|
|
||
| // mBed interface Pins | ||
| USBTX = TX_PIN_NUMBER, | ||
| USBRX = RX_PIN_NUMBER, | ||
|
|
||
| SPI_PSELMOSI0 = OSHCHIP_PIN_4, | ||
| SPI_PSELMISO0 = OSHCHIP_PIN_5, | ||
| SPI_PSELSS0 = OSHCHIP_PIN_6, | ||
| SPI_PSELSCK0 = OSHCHIP_PIN_7, | ||
|
|
||
| SPI_PSELMOSI1 = OSHCHIP_PIN_4, | ||
| SPI_PSELMISO1 = OSHCHIP_PIN_5, | ||
| SPI_PSELSS1 = OSHCHIP_PIN_6, | ||
| SPI_PSELSCK1 = OSHCHIP_PIN_7, | ||
|
|
||
| SPIS_PSELMOSI = OSHCHIP_PIN_4, | ||
| SPIS_PSELMISO = OSHCHIP_PIN_5, | ||
| SPIS_PSELSS = OSHCHIP_PIN_6, | ||
| SPIS_PSELSCK = OSHCHIP_PIN_7, | ||
|
|
||
| I2C_SDA0 = OSHCHIP_PIN_14, | ||
| I2C_SCL0 = OSHCHIP_PIN_15, | ||
|
|
||
| D0 = OSHCHIP_PIN_1, | ||
| D1 = OSHCHIP_PIN_2, | ||
| D2 = OSHCHIP_PIN_3, | ||
| D3 = OSHCHIP_PIN_4, | ||
| D4 = OSHCHIP_PIN_5, | ||
| D5 = OSHCHIP_PIN_6, | ||
| D6 = OSHCHIP_PIN_7, | ||
| D7 = OSHCHIP_PIN_15, | ||
| D8 = OSHCHIP_PIN_14, | ||
| D9 = OSHCHIP_PIN_11, | ||
|
|
||
| A0 = OSHCHIP_PIN_13, | ||
| A1 = OSHCHIP_PIN_12, | ||
| A2 = OSHCHIP_PIN_10, | ||
| A3 = OSHCHIP_PIN_9, | ||
|
|
||
| // Not connected | ||
| NC = (int)0xFFFFFFFF | ||
| } PinName; | ||
|
|
||
| typedef enum { | ||
| PullNone = 0, | ||
| PullDown = 1, | ||
| PullUp = 3, | ||
| PullDefault = PullUp | ||
| } PinMode; | ||
|
|
||
| #ifdef __cplusplus | ||
| } | ||
| #endif | ||
|
|
||
| #endif |
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,23 @@ | ||
| // The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches. | ||
| // Check the 'features' section of the target description in 'targets.json' for more details. | ||
| /* mbed Microcontroller Library | ||
| * Copyright (c) 2006-2013 ARM Limited | ||
| * | ||
| * Licensed under the Apache License, Version 2.0 (the "License"); | ||
| * you may not use this file except in compliance with the License. | ||
| * You may obtain a copy of the License at | ||
| * | ||
| * http://www.apache.org/licenses/LICENSE-2.0 | ||
| * | ||
| * Unless required by applicable law or agreed to in writing, software | ||
| * distributed under the License is distributed on an "AS IS" BASIS, | ||
| * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| * See the License for the specific language governing permissions and | ||
| * limitations under the License. | ||
| */ | ||
| #ifndef MBED_DEVICE_H | ||
| #define MBED_DEVICE_H | ||
|
|
||
| #include "objects.h" | ||
|
|
||
| #endif |
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,243 @@ | ||
| /* mbed Microcontroller Library | ||
| * Copyright (c) 2013 Nordic Semiconductor | ||
| * | ||
| * Licensed under the Apache License, Version 2.0 (the "License"); | ||
| * you may not use this file except in compliance with the License. | ||
| * You may obtain a copy of the License at | ||
| * | ||
| * http://www.apache.org/licenses/LICENSE-2.0 | ||
| * | ||
| * Unless required by applicable law or agreed to in writing, software | ||
| * distributed under the License is distributed on an "AS IS" BASIS, | ||
| * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| * See the License for the specific language governing permissions and | ||
| * limitations under the License. | ||
| */ | ||
| #ifndef MBED_PINNAMES_H | ||
| #define MBED_PINNAMES_H | ||
|
|
||
| #include "cmsis.h" | ||
|
|
||
| #ifdef __cplusplus | ||
| extern "C" { | ||
| #endif | ||
|
|
||
| typedef enum { | ||
| PIN_INPUT, | ||
| PIN_OUTPUT | ||
| } PinDirection; | ||
|
|
||
| #define PORT_SHIFT 3 | ||
|
|
||
| typedef enum { | ||
| p0 = 0, | ||
| p1 = 1, | ||
| p2 = 2, | ||
| p3 = 3, | ||
| p4 = 4, | ||
| p5 = 5, | ||
| p6 = 6, | ||
| p7 = 7, | ||
| p8 = 8, | ||
| p9 = 9, | ||
| p10 = 10, | ||
| p11 = 11, | ||
| p12 = 12, | ||
| p13 = 13, | ||
| p14 = 14, | ||
| p15 = 15, | ||
| p16 = 16, | ||
| p17 = 17, | ||
| p18 = 18, | ||
| p19 = 19, | ||
| p20 = 20, | ||
| p21 = 21, | ||
| p22 = 22, | ||
| p23 = 23, | ||
| p24 = 24, | ||
| p25 = 25, | ||
| p26 = 26, | ||
| p27 = 27, | ||
| p28 = 28, | ||
| p29 = 29, | ||
| p30 = 30, | ||
| p31 = 31, | ||
|
|
||
|
|
||
| P0_0 = p0, | ||
| P0_1 = p1, | ||
| P0_2 = p2, | ||
| P0_3 = p3, | ||
| P0_4 = p4, | ||
| P0_5 = p5, | ||
| P0_6 = p6, | ||
| P0_7 = p7, | ||
|
|
||
| P0_8 = p8, | ||
| P0_9 = p9, | ||
| P0_10 = p10, | ||
| P0_11 = p11, | ||
| P0_12 = p12, | ||
| P0_13 = p13, | ||
| P0_14 = p14, | ||
| P0_15 = p15, | ||
|
|
||
| P0_16 = p16, | ||
| P0_17 = p17, | ||
| P0_18 = p18, | ||
| P0_19 = p19, | ||
| P0_20 = p20, | ||
| P0_21 = p21, | ||
| P0_22 = p22, | ||
| P0_23 = p23, | ||
|
|
||
| P0_24 = p24, | ||
| P0_25 = p25, | ||
| P0_26 = p26, | ||
| P0_27 = p27, | ||
| P0_28 = p28, | ||
| P0_29 = p29, | ||
| P0_30 = p30, | ||
| P0_31 = p31, | ||
|
|
||
| // Module pins. Refer datasheet for pin numbers. | ||
| SIO_1 = P0_1, | ||
| SIO_2 = P0_2, | ||
| SIO_3 = P0_3, | ||
| SIO_4 = P0_4, | ||
| SIO_5 = P0_5, | ||
| SIO_6 = P0_6, | ||
| SIO_7 = P0_7, | ||
| SIO_8 = P0_8, | ||
| SIO_9 = P0_9, //NFC1 | ||
| SIO_10 = P0_10, //NFC2 | ||
| SIO_11 = P0_11, | ||
| SIO_12 = P0_12, | ||
| SIO_13 = P0_13, | ||
| SIO_14 = P0_14, | ||
| SIO_15 = P0_15, | ||
| SIO_16 = P0_16, | ||
| SIO_17 = P0_17, | ||
| SIO_18 = P0_18, | ||
| SIO_19 = P0_19, | ||
| SIO_20 = P0_20, | ||
|
|
||
| SIO_22 = P0_22, | ||
| SIO_23 = P0_23, | ||
| SIO_24 = P0_24, | ||
| SIO_25 = P0_25, | ||
| SIO_26 = P0_26, | ||
| SIO_27 = P0_27, | ||
| SIO_28 = P0_28, | ||
| SIO_29 = P0_29, | ||
| SIO_30 = P0_30, | ||
| SIO_31 = P0_31, | ||
| SIO_0 = P0_0, | ||
|
|
||
| // Not connected | ||
| NC = (int)0xFFFFFFFF, | ||
|
|
||
| //Mbed MTB pin defines. | ||
| P_1 = NC, | ||
| P_2 = SIO_24, //MISO | ||
| P_3 = SIO_23, //MOSI | ||
| P_4 = SIO_22, | ||
| // P_5 = SWDIO, | ||
| // P_6 = SWDCLK, | ||
| // P_7 = NRST, | ||
| P_8 = SIO_20, | ||
| P_9 = SIO_18, | ||
| P_10 = SIO_16, | ||
| P_11 = SIO_14, | ||
| P_12 = SIO_12, | ||
| P_13 = SIO_11, | ||
| P_14 = SIO_10, | ||
| P_15 = SIO_9, | ||
| P_16 = NC, | ||
| P_17 = SIO_8, | ||
| P_18 = SIO_7, | ||
| P_19 = SIO_6, | ||
| P_20 = SIO_5, | ||
| P_21 = SIO_4, | ||
| P_22 = SIO_3, | ||
| P_23 = SIO_2, | ||
| P_24 = SIO_1, | ||
| P_25 = SIO_0, | ||
| P_26 = NC, | ||
| P_27 = NC, | ||
| P_28 = SIO_13, | ||
| P_29 = SIO_15, | ||
| P_30 = SIO_17, | ||
| P_31 = SIO_19, | ||
| P_32 = SIO_31, | ||
| P_33 = SIO_30, | ||
| P_34 = SIO_29, | ||
| P_35 = SIO_28, | ||
| P_36 = SIO_27, | ||
| P_37 = SIO_26, | ||
| P_38 = SIO_25, | ||
| P_39 = NC, | ||
|
|
||
| //LEDs | ||
| LED1 = SIO_28, | ||
| LED2 = SIO_29, | ||
| LED3 = SIO_30, | ||
| LED_RED = LED1, | ||
| LED_GREEN = LED2, | ||
| LED_BLUE = LED3, | ||
|
|
||
| GP0 = SIO_11, | ||
| //Standardized button name | ||
| BUTTON1 = GP0, | ||
|
|
||
| //Nordic SDK pin names | ||
| RX_PIN_NUMBER = SIO_8, | ||
| TX_PIN_NUMBER = SIO_6, | ||
| CTS_PIN_NUMBER = SIO_7, | ||
| RTS_PIN_NUMBER = SIO_5, | ||
|
|
||
| // mBed interface Pins | ||
| USBTX = TX_PIN_NUMBER, | ||
| USBRX = RX_PIN_NUMBER, | ||
|
|
||
| SPI_MOSI = SIO_23, | ||
| SPI_MISO = SIO_24, | ||
| SPI_SS0 = SIO_17, //CS for LCD on MTB | ||
| SPI_SS1 = SIO_10, //CS for SD card on MTB | ||
| SPI_SCK1 = SIO_25, | ||
| SPI_SCK2 = SIO_31, | ||
|
|
||
| //Default SPI | ||
| SPI_SCK = SPI_SCK1, | ||
| SPI_CS = SPI_SS1, | ||
|
|
||
| I2C_SDA = SIO_26, | ||
| I2C_SCL = SIO_27, | ||
|
|
||
| //MTB aliases | ||
| GP1 = SIO_13, | ||
| AIN0 = SIO_2, | ||
| AIN1 = SIO_3, | ||
| AIN2 = SIO_4, | ||
| GP2 = SIO_10, | ||
| GP3 = SIO_9, | ||
| GP4 = SIO_22, | ||
| GP5 = SIO_19, //A0 for LCD on MTB | ||
| GP6 = SIO_18, //RESET for LCD on MTB | ||
| GP7 = SIO_17, | ||
| GP8 = SIO_15, | ||
|
|
||
| } PinName; | ||
|
|
||
| typedef enum { | ||
| PullNone = 0, | ||
| PullDown = 1, | ||
| PullUp = 3, | ||
| PullDefault = PullUp | ||
| } PinMode; | ||
|
|
||
| #ifdef __cplusplus | ||
| } | ||
| #endif | ||
|
|
||
| #endif |
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,23 @@ | ||
| // The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches. | ||
| // Check the 'features' section of the target description in 'targets.json' for more details. | ||
| /* mbed Microcontroller Library | ||
| * Copyright (c) 2006-2013 ARM Limited | ||
| * | ||
| * Licensed under the Apache License, Version 2.0 (the "License"); | ||
| * you may not use this file except in compliance with the License. | ||
| * You may obtain a copy of the License at | ||
| * | ||
| * http://www.apache.org/licenses/LICENSE-2.0 | ||
| * | ||
| * Unless required by applicable law or agreed to in writing, software | ||
| * distributed under the License is distributed on an "AS IS" BASIS, | ||
| * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| * See the License for the specific language governing permissions and | ||
| * limitations under the License. | ||
| */ | ||
| #ifndef MBED_DEVICE_H | ||
| #define MBED_DEVICE_H | ||
|
|
||
| #include "objects.h" | ||
|
|
||
| #endif |
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,281 @@ | ||
| /* | ||
| * Copyright (c) 2014 Nordic Semiconductor ASA | ||
| * All rights reserved. | ||
| * | ||
| * Redistribution and use in source and binary forms, with or without modification, | ||
| * are permitted provided that the following conditions are met: | ||
| * | ||
| * 1. Redistributions of source code must retain the above copyright notice, this list | ||
| * of conditions and the following disclaimer. | ||
| * | ||
| * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA | ||
| * integrated circuit in a product or a software update for such product, must reproduce | ||
| * the above copyright notice, this list of conditions and the following disclaimer in | ||
| * the documentation and/or other materials provided with the distribution. | ||
| * | ||
| * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be | ||
| * used to endorse or promote products derived from this software without specific prior | ||
| * written permission. | ||
| * | ||
| * 4. This software, with or without modification, must only be used with a | ||
| * Nordic Semiconductor ASA integrated circuit. | ||
| * | ||
| * 5. Any software provided in binary or object form under this license must not be reverse | ||
| * engineered, decompiled, modified and/or disassembled. | ||
| * | ||
| * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND | ||
| * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED | ||
| * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
| * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR | ||
| * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
| * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
| * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
| * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | ||
| * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
| * | ||
| */ | ||
|
|
||
| /** | ||
| * @file | ||
| * @brief RNG HAL API. | ||
| */ | ||
|
|
||
| #ifndef NRF_RNG_H__ | ||
| #define NRF_RNG_H__ | ||
| /** | ||
| * @defgroup nrf_rng_hal RNG HAL | ||
| * @{ | ||
| * @ingroup nrf_rng | ||
| * @brief Hardware access layer for managing the random number generator (RNG). | ||
| */ | ||
|
|
||
| #include <stdint.h> | ||
| #include <stddef.h> | ||
| #include <stdbool.h> | ||
| #include "nrf.h" | ||
|
|
||
| #ifdef __cplusplus | ||
| extern "C" { | ||
| #endif | ||
|
|
||
| #define NRF_RNG_TASK_SET (1UL) | ||
| #define NRF_RNG_EVENT_CLEAR (0UL) | ||
| /** | ||
| * @enum nrf_rng_task_t | ||
| * @brief RNG tasks. | ||
| */ | ||
| typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ | ||
| { | ||
| NRF_RNG_TASK_START = offsetof(NRF_RNG_Type, TASKS_START), /**< Start the random number generator. */ | ||
| NRF_RNG_TASK_STOP = offsetof(NRF_RNG_Type, TASKS_STOP) /**< Stop the random number generator. */ | ||
| } nrf_rng_task_t; /*lint -restore */ | ||
|
|
||
| /** | ||
| * @enum nrf_rng_event_t | ||
| * @brief RNG events. | ||
| */ | ||
| typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ | ||
| { | ||
| NRF_RNG_EVENT_VALRDY = offsetof(NRF_RNG_Type, EVENTS_VALRDY) /**< New random number generated event. */ | ||
| } nrf_rng_event_t; /*lint -restore */ | ||
|
|
||
| /** | ||
| * @enum nrf_rng_int_mask_t | ||
| * @brief RNG interrupts. | ||
| */ | ||
| typedef enum | ||
| { | ||
| NRF_RNG_INT_VALRDY_MASK = RNG_INTENSET_VALRDY_Msk /**< Mask for enabling or disabling an interrupt on VALRDY event. */ | ||
| } nrf_rng_int_mask_t; | ||
|
|
||
| /** | ||
| * @enum nrf_rng_short_mask_t | ||
| * @brief Types of RNG shortcuts. | ||
| */ | ||
| typedef enum | ||
| { | ||
| NRF_RNG_SHORT_VALRDY_STOP_MASK = RNG_SHORTS_VALRDY_STOP_Msk /**< Mask for setting shortcut between EVENT_VALRDY and TASK_STOP. */ | ||
| } nrf_rng_short_mask_t; | ||
|
|
||
| /** | ||
| * @brief Function for enabling interrupts. | ||
| * | ||
| * @param[in] rng_int_mask Mask of interrupts. | ||
| */ | ||
| __STATIC_INLINE void nrf_rng_int_enable(uint32_t rng_int_mask); | ||
|
|
||
| /** | ||
| * @brief Function for disabling interrupts. | ||
| * | ||
| * @param[in] rng_int_mask Mask of interrupts. | ||
| */ | ||
| __STATIC_INLINE void nrf_rng_int_disable(uint32_t rng_int_mask); | ||
|
|
||
| /** | ||
| * @brief Function for getting the state of a specific interrupt. | ||
| * | ||
| * @param[in] rng_int_mask Interrupt. | ||
| * | ||
| * @retval true If the interrupt is not enabled. | ||
| * @retval false If the interrupt is enabled. | ||
| */ | ||
| __STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t rng_int_mask); | ||
|
|
||
| /** | ||
| * @brief Function for getting the address of a specific task. | ||
| * | ||
| * This function can be used by the PPI module. | ||
| * | ||
| * @param[in] rng_task Task. | ||
| */ | ||
| __STATIC_INLINE uint32_t * nrf_rng_task_address_get(nrf_rng_task_t rng_task); | ||
|
|
||
| /** | ||
| * @brief Function for setting a specific task. | ||
| * | ||
| * @param[in] rng_task Task. | ||
| */ | ||
| __STATIC_INLINE void nrf_rng_task_trigger(nrf_rng_task_t rng_task); | ||
|
|
||
| /** | ||
| * @brief Function for getting address of a specific event. | ||
| * | ||
| * This function can be used by the PPI module. | ||
| * | ||
| * @param[in] rng_event Event. | ||
| */ | ||
| __STATIC_INLINE uint32_t * nrf_rng_event_address_get(nrf_rng_event_t rng_event); | ||
|
|
||
| /** | ||
| * @brief Function for clearing a specific event. | ||
| * | ||
| * @param[in] rng_event Event. | ||
| */ | ||
| __STATIC_INLINE void nrf_rng_event_clear(nrf_rng_event_t rng_event); | ||
|
|
||
| /** | ||
| * @brief Function for getting the state of a specific event. | ||
| * | ||
| * @param[in] rng_event Event. | ||
| * | ||
| * @retval true If the event is not set. | ||
| * @retval false If the event is set. | ||
| */ | ||
| __STATIC_INLINE bool nrf_rng_event_get(nrf_rng_event_t rng_event); | ||
|
|
||
| /** | ||
| * @brief Function for setting shortcuts. | ||
| * | ||
| * @param[in] rng_short_mask Mask of shortcuts. | ||
| * | ||
| */ | ||
| __STATIC_INLINE void nrf_rng_shorts_enable(uint32_t rng_short_mask); | ||
|
|
||
| /** | ||
| * @brief Function for clearing shortcuts. | ||
| * | ||
| * @param[in] rng_short_mask Mask of shortcuts. | ||
| * | ||
| */ | ||
| __STATIC_INLINE void nrf_rng_shorts_disable(uint32_t rng_short_mask); | ||
|
|
||
| /** | ||
| * @brief Function for getting the previously generated random value. | ||
| * | ||
| * @return Previously generated random value. | ||
| */ | ||
| __STATIC_INLINE uint8_t nrf_rng_random_value_get(void); | ||
|
|
||
| /** | ||
| * @brief Function for enabling digital error correction. | ||
| */ | ||
| __STATIC_INLINE void nrf_rng_error_correction_enable(void); | ||
|
|
||
| /** | ||
| * @brief Function for disabling digital error correction. | ||
| */ | ||
| __STATIC_INLINE void nrf_rng_error_correction_disable(void); | ||
|
|
||
| /** | ||
| *@} | ||
| **/ | ||
|
|
||
| #ifndef SUPPRESS_INLINE_IMPLEMENTATION | ||
|
|
||
| __STATIC_INLINE void nrf_rng_int_enable(uint32_t rng_int_mask) | ||
| { | ||
| NRF_RNG->INTENSET = rng_int_mask; | ||
| } | ||
|
|
||
| __STATIC_INLINE void nrf_rng_int_disable(uint32_t rng_int_mask) | ||
| { | ||
| NRF_RNG->INTENCLR = rng_int_mask; | ||
| } | ||
|
|
||
| __STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t rng_int_mask) | ||
| { | ||
| return (bool)(NRF_RNG->INTENCLR & rng_int_mask); | ||
| } | ||
|
|
||
| __STATIC_INLINE uint32_t * nrf_rng_task_address_get(nrf_rng_task_t rng_task) | ||
| { | ||
| return (uint32_t *)((uint8_t *)NRF_RNG + rng_task); | ||
| } | ||
|
|
||
| __STATIC_INLINE void nrf_rng_task_trigger(nrf_rng_task_t rng_task) | ||
| { | ||
| *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_task)) = NRF_RNG_TASK_SET; | ||
| } | ||
|
|
||
| __STATIC_INLINE uint32_t * nrf_rng_event_address_get(nrf_rng_event_t rng_event) | ||
| { | ||
| return (uint32_t *)((uint8_t *)NRF_RNG + rng_event); | ||
| } | ||
|
|
||
| __STATIC_INLINE void nrf_rng_event_clear(nrf_rng_event_t rng_event) | ||
| { | ||
| *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event)) = NRF_RNG_EVENT_CLEAR; | ||
| #if __CORTEX_M == 0x04 | ||
| volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event)); | ||
| (void)dummy; | ||
| #endif | ||
| } | ||
|
|
||
| __STATIC_INLINE bool nrf_rng_event_get(nrf_rng_event_t rng_event) | ||
| { | ||
| return (bool) * ((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event)); | ||
| } | ||
|
|
||
| __STATIC_INLINE void nrf_rng_shorts_enable(uint32_t rng_short_mask) | ||
| { | ||
| NRF_RNG->SHORTS |= rng_short_mask; | ||
| } | ||
|
|
||
| __STATIC_INLINE void nrf_rng_shorts_disable(uint32_t rng_short_mask) | ||
| { | ||
| NRF_RNG->SHORTS &= ~rng_short_mask; | ||
| } | ||
|
|
||
| __STATIC_INLINE uint8_t nrf_rng_random_value_get(void) | ||
| { | ||
| return (uint8_t)(NRF_RNG->VALUE & RNG_VALUE_VALUE_Msk); | ||
| } | ||
|
|
||
| __STATIC_INLINE void nrf_rng_error_correction_enable(void) | ||
| { | ||
| NRF_RNG->CONFIG |= RNG_CONFIG_DERCEN_Msk; | ||
| } | ||
|
|
||
| __STATIC_INLINE void nrf_rng_error_correction_disable(void) | ||
| { | ||
| NRF_RNG->CONFIG &= ~RNG_CONFIG_DERCEN_Msk; | ||
| } | ||
|
|
||
| #endif | ||
|
|
||
| #ifdef __cplusplus | ||
| } | ||
| #endif | ||
|
|
||
| #endif /* NRF_RNG_H__ */ |
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,250 @@ | ||
| /* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved. | ||
| * | ||
| * The information contained herein is property of Nordic Semiconductor ASA. | ||
| * Terms and conditions of usage are described in detail in NORDIC | ||
| * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT. | ||
| * | ||
| * Licensees are granted free, non-transferable use of the information. NO | ||
| * WARRANTY of ANY KIND is provided. This heading must NOT be removed from | ||
| * the file. | ||
| * | ||
| */ | ||
|
|
||
| #include <stdint.h> | ||
| #include <stddef.h> | ||
|
|
||
| #include "nrf_drv_rng.h" | ||
| #include "nrf_assert.h" | ||
| #include "nrf_drv_common.h" | ||
| #include "nordic_common.h" | ||
| #include "nrf_error.h" | ||
| #include "nrf_assert.h" | ||
| #ifdef SOFTDEVICE_PRESENT | ||
| #include "nrf_sdm.h" | ||
| #include "nrf_soc.h" | ||
| #else | ||
| #include "app_fifo.h" | ||
| #include "app_util_platform.h" | ||
|
|
||
| static __INLINE uint32_t fifo_length(app_fifo_t * p_fifo) | ||
| { | ||
| uint32_t tmp = p_fifo->read_pos; | ||
| return p_fifo->write_pos - tmp; | ||
| } | ||
|
|
||
| #define FIFO_LENGTH(fifo) fifo_length(&(fifo)) /**< Macro for calculating the FIFO length. */ | ||
|
|
||
| #endif // SOFTDEVICE_PRESENT | ||
| typedef struct | ||
| { | ||
| nrf_drv_state_t state; | ||
| #ifndef SOFTDEVICE_PRESENT | ||
| app_fifo_t rand_pool; | ||
| uint8_t buffer[RNG_CONFIG_POOL_SIZE]; | ||
| #endif // SOFTDEVICE_PRESENT | ||
| } nrf_drv_rng_cb_t; | ||
|
|
||
| static nrf_drv_rng_cb_t m_rng_cb; | ||
| #ifndef SOFTDEVICE_PRESENT | ||
| static const nrf_drv_rng_config_t m_default_config = NRF_DRV_RNG_DEFAULT_CONFIG; | ||
| static void rng_start(void) | ||
| { | ||
| if (FIFO_LENGTH(m_rng_cb.rand_pool) <= m_rng_cb.rand_pool.buf_size_mask) | ||
| { | ||
| nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY); | ||
| nrf_rng_int_enable(NRF_RNG_INT_VALRDY_MASK); | ||
| nrf_rng_task_trigger(NRF_RNG_TASK_START); | ||
| } | ||
| } | ||
|
|
||
|
|
||
| static void rng_stop(void) | ||
| { | ||
| nrf_rng_int_disable(NRF_RNG_INT_VALRDY_MASK); | ||
| nrf_rng_task_trigger(NRF_RNG_TASK_STOP); | ||
| } | ||
|
|
||
|
|
||
| #endif // SOFTDEVICE_PRESENT | ||
|
|
||
|
|
||
| ret_code_t nrf_drv_rng_init(nrf_drv_rng_config_t const * p_config) | ||
| { | ||
| uint32_t result; | ||
|
|
||
| if (m_rng_cb.state == NRF_DRV_STATE_UNINITIALIZED) | ||
| { | ||
| #ifndef SOFTDEVICE_PRESENT | ||
|
|
||
| result = app_fifo_init(&m_rng_cb.rand_pool, m_rng_cb.buffer, RNG_CONFIG_POOL_SIZE); | ||
|
|
||
| if (p_config == NULL) | ||
| { | ||
| p_config = &m_default_config; | ||
| } | ||
|
|
||
| if (result == NRF_SUCCESS) | ||
| { | ||
| if (p_config->error_correction) | ||
| { | ||
| nrf_rng_error_correction_enable(); | ||
| } | ||
|
|
||
| nrf_drv_common_irq_enable(RNG_IRQn, p_config->interrupt_priority); | ||
|
|
||
| nrf_rng_shorts_disable(NRF_RNG_SHORT_VALRDY_STOP_MASK); | ||
|
|
||
| rng_start(); | ||
| m_rng_cb.state = NRF_DRV_STATE_INITIALIZED; | ||
| } | ||
| #else | ||
| UNUSED_VARIABLE(p_config); | ||
| uint8_t softdevice_is_enabled; | ||
| result = sd_softdevice_is_enabled(&softdevice_is_enabled); | ||
|
|
||
| if (softdevice_is_enabled) | ||
| { | ||
| m_rng_cb.state = NRF_DRV_STATE_INITIALIZED; | ||
| } | ||
| else | ||
| { | ||
| result = NRF_ERROR_SOFTDEVICE_NOT_ENABLED; | ||
| } | ||
| #endif // SOFTDEVICE_PRESENT | ||
| } | ||
| else | ||
| { | ||
| result = NRF_ERROR_INVALID_STATE; | ||
| } | ||
| return result; | ||
| } | ||
|
|
||
|
|
||
| void nrf_drv_rng_uninit(void) | ||
| { | ||
| ASSERT(m_rng_cb.state == NRF_DRV_STATE_INITIALIZED); | ||
|
|
||
| m_rng_cb.state = NRF_DRV_STATE_UNINITIALIZED; | ||
| #ifndef SOFTDEVICE_PRESENT | ||
| rng_stop(); | ||
| nrf_drv_common_irq_disable(RNG_IRQn); | ||
| #endif // SOFTDEVICE_PRESENT | ||
| } | ||
|
|
||
| ret_code_t nrf_drv_rng_bytes_available(uint8_t * p_bytes_available) | ||
| { | ||
| ret_code_t result; | ||
| ASSERT(m_rng_cb.state == NRF_DRV_STATE_INITIALIZED); | ||
|
|
||
| #ifndef SOFTDEVICE_PRESENT | ||
|
|
||
| result = NRF_SUCCESS; | ||
| *p_bytes_available = FIFO_LENGTH(m_rng_cb.rand_pool); | ||
|
|
||
| #else | ||
|
|
||
| result = sd_rand_application_bytes_available_get(p_bytes_available); | ||
|
|
||
| #endif // SOFTDEVICE_PRESENT | ||
|
|
||
| return result; | ||
| } | ||
|
|
||
| ret_code_t nrf_drv_rng_pool_capacity(uint8_t * p_pool_capacity) | ||
| { | ||
| ret_code_t result; | ||
| ASSERT(m_rng_cb.state == NRF_DRV_STATE_INITIALIZED); | ||
|
|
||
| #ifndef SOFTDEVICE_PRESENT | ||
|
|
||
| result = NRF_SUCCESS; | ||
| *p_pool_capacity = RNG_CONFIG_POOL_SIZE; | ||
|
|
||
| #else | ||
|
|
||
| result = sd_rand_application_pool_capacity_get(p_pool_capacity); | ||
|
|
||
| #endif // SOFTDEVICE_PRESENT | ||
| return result; | ||
| } | ||
|
|
||
| ret_code_t nrf_drv_rng_rand(uint8_t * p_buff, uint8_t length) | ||
| { | ||
| ret_code_t result; | ||
|
|
||
| ASSERT(m_rng_cb.state == NRF_DRV_STATE_INITIALIZED); | ||
|
|
||
| #ifndef SOFTDEVICE_PRESENT | ||
| if (FIFO_LENGTH(m_rng_cb.rand_pool) >= length) | ||
| { | ||
| result = NRF_SUCCESS; | ||
|
|
||
| for (uint32_t i = 0; (i < length) && (result == NRF_SUCCESS); i++) | ||
| { | ||
| result = app_fifo_get(&(m_rng_cb.rand_pool), &p_buff[i]); | ||
| } | ||
| rng_start(); | ||
| } | ||
| else | ||
| { | ||
| result = NRF_ERROR_NO_MEM; | ||
| } | ||
| #else | ||
|
|
||
| result = sd_rand_application_vector_get(p_buff, length); | ||
|
|
||
| #endif // SOFTDEVICE_PRESENT | ||
|
|
||
|
|
||
| return result; | ||
| } | ||
|
|
||
| ret_code_t nrf_drv_rng_block_rand(uint8_t * p_buff, uint32_t length) | ||
| { | ||
| uint32_t count = 0, poolsz = 0; | ||
| ret_code_t result; | ||
| ASSERT(m_rng_cb.state == NRF_DRV_STATE_INITIALIZED); | ||
|
|
||
| result = nrf_drv_rng_pool_capacity((uint8_t *) &poolsz); | ||
| if(result != NRF_SUCCESS) | ||
| { | ||
| return result; | ||
| } | ||
|
|
||
| while(length) | ||
| { | ||
| uint32_t len = length >= poolsz ? poolsz : length; | ||
| while((result = nrf_drv_rng_rand(&p_buff[count], len)) != NRF_SUCCESS) | ||
| { | ||
| #ifndef SOFTDEVICE_PRESENT | ||
| ASSERT(result == NRF_ERROR_NO_MEM); | ||
| #else | ||
| ASSERT(result == NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES); | ||
| #endif | ||
| } | ||
|
|
||
| length -= len; | ||
| count += len; | ||
| } | ||
|
|
||
| return result; | ||
| } | ||
|
|
||
|
|
||
| #ifndef SOFTDEVICE_PRESENT | ||
| void RNG_IRQHandler(void) | ||
| { | ||
| if (nrf_rng_event_get(NRF_RNG_EVENT_VALRDY) && | ||
| nrf_rng_int_get(NRF_RNG_INT_VALRDY_MASK)) | ||
| { | ||
| nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY); | ||
| uint32_t nrf_error = app_fifo_put(&m_rng_cb.rand_pool, nrf_rng_random_value_get()); | ||
|
|
||
| if ((FIFO_LENGTH(m_rng_cb.rand_pool) > m_rng_cb.rand_pool.buf_size_mask) || (nrf_error == NRF_ERROR_NO_MEM)) | ||
| { | ||
| rng_stop(); | ||
| } | ||
| } | ||
| } | ||
|
|
||
| #endif // SOFTDEVICE_PRESENT |
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,115 @@ | ||
| /* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved. | ||
| * | ||
| * The information contained herein is property of Nordic Semiconductor ASA. | ||
| * Terms and conditions of usage are described in detail in NORDIC | ||
| * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT. | ||
| * | ||
| * Licensees are granted free, non-transferable use of the information. NO | ||
| * WARRANTY of ANY KIND is provided. This heading must NOT be removed from | ||
| * the file. | ||
| * | ||
| */ | ||
|
|
||
| #ifndef NRF_DRV_RNG_H__ | ||
| #define NRF_DRV_RNG_H__ | ||
|
|
||
| #include <stdbool.h> | ||
| #include <stdint.h> | ||
|
|
||
| #include "nrf_rng.h" | ||
| #include "sdk_errors.h" | ||
| #include "nrf_drv_config.h" | ||
|
|
||
| /** | ||
| * @addtogroup nrf_rng RNG HAL and driver | ||
| * @ingroup nrf_drivers | ||
| * @brief Random number generator (RNG) APIs. | ||
| * @details The RNG HAL provides basic APIs for accessing the registers of the random number generator. | ||
| * The RNG driver provides APIs on a higher level. | ||
| * | ||
| * @defgroup nrf_drv_rng RNG driver | ||
| * @{ | ||
| * @ingroup nrf_rng | ||
| * @brief Driver for managing the random number generator (RNG). | ||
| */ | ||
|
|
||
| /**@brief Struct for RNG configuration. */ | ||
| typedef struct | ||
| { | ||
| bool error_correction; /**< Error correction flag. */ | ||
| uint8_t interrupt_priority; /**< interrupt priority */ | ||
| } nrf_drv_rng_config_t; | ||
|
|
||
| /**@brief RNG default configuration. */ | ||
| #define NRF_DRV_RNG_DEFAULT_CONFIG \ | ||
| { \ | ||
| .error_correction = RNG_CONFIG_ERROR_CORRECTION, \ | ||
| .interrupt_priority = RNG_CONFIG_IRQ_PRIORITY, \ | ||
| } | ||
|
|
||
| /** | ||
| * @brief Function for initializing the nrf_drv_rng module. | ||
| * | ||
| * @param[in] p_config Initial configuration. Default configuration used if NULL. | ||
| * | ||
| * @retval NRF_SUCCESS Driver was successfully initialized. | ||
| * @retval NRF_ERROR_INVALID_STATE Driver was already initialized. | ||
| * @retval NRF_ERROR_INVALID_LENGTH Pool size have to be a power of 2. | ||
| * @retval NRF_ERROR_SOFTDEVICE_NOT_ENABLED SoftDevice is present, but not enabled. | ||
| */ | ||
| ret_code_t nrf_drv_rng_init(nrf_drv_rng_config_t const * p_config); | ||
|
|
||
| /** | ||
| * @brief Function for uninitializing the nrf_drv_rng module. | ||
| */ | ||
| void nrf_drv_rng_uninit(void); | ||
|
|
||
| /** | ||
| * @brief Function for getting the number of currently available random bytes. | ||
| * | ||
| * @param[out] p_bytes_available The number of bytes currently available in the pool. | ||
| * | ||
| * @retval NRF_SUCCESS If the number of available random bytes was written to p_bytes_available. | ||
| */ | ||
| ret_code_t nrf_drv_rng_bytes_available(uint8_t * p_bytes_available); | ||
|
|
||
| /** | ||
| * @brief Function for querying the capacity of the application random pool. | ||
| * | ||
| * @param[out] p_pool_capacity The capacity of the pool. | ||
| * | ||
| * @retval NRF_SUCCESS If the capacity of the pool was written to p_pool_capacity. | ||
| */ | ||
| ret_code_t nrf_drv_rng_pool_capacity(uint8_t * p_pool_capacity); | ||
|
|
||
| /** | ||
| * @brief Function for getting the vector of random numbers. | ||
| * | ||
| * @param[out] p_buff Pointer to uint8_t buffer for storing the bytes. | ||
| * @param[in] length Number of bytes to take from the pool and place in p_buff. | ||
| * | ||
| * @retval NRF_SUCCESS If the requested bytes were written to p_buff. | ||
| * @retval NRF_ERROR_NO_MEM If no bytes were written to the buffer | ||
| * because there were not enough bytes available in p_buff. | ||
| * @retval NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES If no bytes were written to the buffer | ||
| * because there were not enough bytes available in the pool. | ||
| */ | ||
| ret_code_t nrf_drv_rng_rand(uint8_t * p_buff, uint8_t length); | ||
|
|
||
| /** | ||
| * @brief Blocking function for getting an arbitrary array of random numbers. | ||
| * | ||
| * @note This function may execute for a substantial amount of time depending on the length of the buffer | ||
| * required and on the state of the current internal pool of random numbers. | ||
| * | ||
| * @param[out] p_buff Pointer to uint8_t buffer for storing the bytes. | ||
| * @param[in] length Number of bytes place in p_buff. | ||
| * | ||
| * @retval NRF_SUCCESS If the requested bytes were written to p_buff. | ||
| */ | ||
| ret_code_t nrf_drv_rng_block_rand(uint8_t * p_buff, uint32_t length); | ||
|
|
||
| /** | ||
| *@} | ||
| **/ | ||
| #endif // NRF_DRV_RNG_H__ |