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PSoC6 serial driver: Setup RTS and TX lines on deepsleep entry/exit #10268

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merged 1 commit into from Apr 10, 2019

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@cy-vivekp
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commented Mar 29, 2019

Description

When PSoC6 enters deepsleep

  • Configure RTS and TX GPIO DR register to drive output (high)
    When PSoC6 exits deepsleep
  • Return SCB control on TX and RTS pins

Pull request type

[ ] Fix
[ ] Refactor
[X] Target update
[ ] Functionality change
[ ] Docs update
[ ] Test update
[ ] Breaking change

Reviewers

@satya1957 @svozcy @cydriftcloud

Release Notes

PSoC uart: Setup RTS and TX lines in deepsleep
When PSoC enters deepsleep, in uart driver
  - deassert RTS, set RTS to output high
  - set TX to output high
@ciarmcom

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commented Mar 29, 2019

@cy-vivekp, thank you for your changes.
@ARMmbed/mbed-os-maintainers please review.

@ciarmcom ciarmcom requested a review from ARMmbed/mbed-os-maintainers Mar 29, 2019

@cmonr

cmonr approved these changes Mar 29, 2019

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commented Mar 29, 2019

CI started

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commented Mar 30, 2019

Test run: SUCCESS

Summary: 13 of 13 test jobs passed
Build number : 1
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@NirSonnenschein

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commented Mar 31, 2019

CI has passed on this one: @satya1957 @svozcy @cydriftcloud would you like to review this before it is merged?

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commented Apr 9, 2019

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commented Apr 9, 2019

CI restarted since results are now stale

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commented Apr 9, 2019

Test run: SUCCESS

Summary: 11 of 11 test jobs passed
Build number : 2
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@cmonr cmonr added ready for merge and removed needs: CI labels Apr 10, 2019

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commented Apr 10, 2019

Waiting for approvals from reviewers

@svozcy

svozcy approved these changes Apr 10, 2019

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The changes looks good for me!

@0xc0170 0xc0170 removed the needs: review label Apr 10, 2019

@0xc0170 0xc0170 merged commit ffe9ddf into ARMmbed:master Apr 10, 2019

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