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FPGA SPI: remove 4 and 12 bits size support #11009
Some targets such as the MK66F from NXP do support symbols from 4 to 16bits ( https://www.nxp.com/docs/en/reference-manual/K66P144M180SF5RMV2.pdf#d5667e5a1310_d11e7876 ).
mprse left a comment
We do not have detailed requirements for the old SPI API which would strictly specify the defined behavior. Please consider this test as an example which shows some capabilities of the FPGA-Test-Shield.
On SPI feature branch (https://github.com/ARMmbed/mbed-os/tree/feature-hal-spec-spi) more expanded SPI test can be found.
I think that we can remove these cases, but please remove them permanently.