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STM32L4 TRNG clock configuration #11679

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merged 1 commit into from Oct 21, 2019
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jeromecoutant commented Oct 14, 2019

Description

Fixes #11674

In some cases, mainly STM32L4, STM targets that have TRNG will use RCC_RNGCLKSOURCE_PLL even if the CLOCK_SOURCE is defined to be USE_PLL_MSI and TRNG should use RCC_RNGCLKSOURCE_MSI instead.
USE_PLL_MSI was defined in the system_clock.c and isn't seen in the trng_api.c thus evaluating to 0 when preprocessing

Pull request type

[x] Fix
[ ] Refactor
[ ] Target update
[ ] Functionality change
[ ] Docs update
[ ] Test update
[ ] Breaking change

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@jarlamsa

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@ciarmcom ciarmcom requested review from jarlamsa and ARMmbed/mbed-os-maintainers Oct 14, 2019
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ciarmcom commented Oct 14, 2019

@jeromecoutant, thank you for your changes.
@jarlamsa @ARMmbed/mbed-os-maintainers please review.

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jarlamsa left a comment

This addition fixes the seen issues. Will the USE_PLL_MSI be 0x1 with all the future boards as well? If there are going to be changes to the TRNG-initialisation (adding more different possibilities for RNG clock selections), there might be a need to make modifications here, and could be good to document.

@jeromecoutant jeromecoutant force-pushed the jeromecoutant:PR_L4_TRNG branch from f2dbaa0 to 7b9bc1c Oct 14, 2019
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jeromecoutant commented Oct 14, 2019

@jarlamsa I have updated my patch.
We think it is easier to understand and to maintain.

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LMESTM left a comment

While cleaning up I'd like to have comment updated

if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
error("RNG clock configuration error\n");
}

#elif defined(TARGET_STM32L4)
/* RNG clock configuration could be already done by USB */

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LMESTM Oct 14, 2019

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to be very precise it's not RNG clock configuration but RNG clock source selection
and comment should add that RNG and USB clocks have the same source, so the common source selection could be already done by USB

}
}
else {
/* MSI clock is not enabled, RNG clock is configured on PLL */

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/* MSI clock is not enabled, so PLL selected as RNG clock source */

@jeromecoutant jeromecoutant force-pushed the jeromecoutant:PR_L4_TRNG branch from 7b9bc1c to 772be32 Oct 14, 2019
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LMESTM approved these changes Oct 14, 2019
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jarlamsa commented Oct 14, 2019

Thank you for the quick response and fix.
Verified with DISCO_L475VG_IOT01A to be working.

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jarlamsa commented Oct 15, 2019

@0xc0170 could you please review and start CI for this?

@0xc0170 0xc0170 added needs: CI and removed needs: review labels Oct 15, 2019
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0xc0170 commented Oct 15, 2019

marked for CI, we are finilizing 5.14.1 RC, this PR will go into once it is completed.

@0xc0170 0xc0170 added needs: work and removed needs: CI labels Oct 17, 2019
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0xc0170 commented Oct 17, 2019

@jeromecoutant Ready for ci but rebase needed, please do and will start CI

@jeromecoutant jeromecoutant force-pushed the jeromecoutant:PR_L4_TRNG branch from 772be32 to 7db11e0 Oct 17, 2019
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jeromecoutant commented Oct 17, 2019

Rebase done, please start CI
Thx

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0xc0170 commented Oct 17, 2019

CI started

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mbed-ci commented Oct 17, 2019

Test run: FAILED

Summary: 1 of 4 test jobs failed
Build number : 1
Build artifacts

Failed test jobs:

  • jenkins-ci/mbed-os-ci_build-IAR
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0xc0170 commented Oct 18, 2019

CI restarted

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mbed-ci commented Oct 18, 2019

Test run: FAILED

Summary: 3 of 4 test jobs failed
Build number : 2
Build artifacts

Failed test jobs:

  • jenkins-ci/mbed-os-ci_build-GCC_ARM
  • jenkins-ci/mbed-os-ci_build-ARM
  • jenkins-ci/mbed-os-ci_build-IAR
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0xc0170 commented Oct 18, 2019

CI restarted

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mbed-ci commented Oct 18, 2019

Test run: SUCCESS

Summary: 11 of 11 test jobs passed
Build number : 3
Build artifacts

@0xc0170 0xc0170 added ready for merge and removed needs: CI labels Oct 21, 2019
@0xc0170 0xc0170 merged commit 42cb19b into ARMmbed:master Oct 21, 2019
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@jeromecoutant jeromecoutant deleted the jeromecoutant:PR_L4_TRNG branch Oct 21, 2019
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