To enable the PDL compilation with wounded out IP blocks.
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_flash.h b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_flash.h
index f39679c5a6b..582734bbe55 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_flash.h
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_flash.h
@@ -1,12 +1,12 @@
/***************************************************************************//**
* \file cy_flash.h
-* \version 3.30.3
+* \version 3.30.4
*
* Provides the API declarations of the Flash driver.
*
********************************************************************************
* \copyright
-* Copyright 2016-2019 Cypress Semiconductor Corporation
+* Copyright 2016-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -42,8 +42,8 @@
* or modify the SROM code. The driver API requests the system call by acquiring
* the Inter-processor communication (IPC) and writing the SROM function opcode
* and parameters to its input registers. As a result, an NMI interrupt is invoked
-* and the requested SROM API is executed. The operation status is returned to the
-* driver context and a release interrupt is triggered.
+* and the requested SROM function is executed. The operation status is returned
+* to the driver context and a release interrupt is triggered.
*
* Writing to flash can take up to 20 milliseconds. During this time,
* the device should not be reset (including XRES pin, software reset, and
@@ -55,7 +55,7 @@
* in the same or neighboring (neighboring restriction is applicable just for the
* CY8C6xx6, CY8C6xx7 devices) flash sector where the flash Write, Erase, or
* Program operation is working. This violation may cause a HardFault exception.
-* To avoid the Read while Write violation, the user must carefully split the
+* To avoid the Read while Write violation, carefully split the
* Read and Write operation on flash sectors which are not neighboring,
* considering both cores in the multi-processor device. If the flash is divided
* into four equal sectors, you may edit the linker script to place the code
@@ -66,18 +66,18 @@
*
* \subsection group_flash_config_intro Introduction:
* The PSoC 6 MCU user-programmable Flash consists of:
-* - User Flash sectors (from 4 to 8) - 256KB each.
-* - EEPROM emulation sector - 32KB.
+* - Application flash memory (from 2 to 8 sectors) - 128KB/256KB each.
+* - EE emulation flash memory - 32KB.
*
-* Write operations are performed on a per-sector basis and may be done as
-* Blocking or Partially Blocking, defined as follows:
+* Write operation may be done as Blocking or Partially Blocking,
+* defined as follows:
*
* \subsection group_flash_config_blocking Blocking:
* In this case, the entire Flash block is not available for the duration of the
* Write (∼16ms). Therefore, no Flash accesses (from any Bus Master) can
* occur during that time. CPU execution can be performed from SRAM. All
-* pre-fetching must be disabled. Application code execution from Flash is
-* blocked for the Flash Write duration for both cores.
+* pre-fetching must be disabled. Code execution from Flash is blocked for the
+* Flash Write duration for both cores.
*
* \subsection group_flash_config_block_const Constraints for Blocking Flash operations:
* -# During write to flash, the device should not be reset (including XRES pin,
@@ -85,16 +85,16 @@
* of the flash.
* -# The low-voltage detect circuits should be configured to generate an
* interrupt instead of a reset.
-* -# Flash write operation is allowed only in one of the following CM4 states:
+* -# Flash rite operation is allowed only in one of the following CM4 states:
* -# CM4 is Active and initialized:
* call \ref Cy_SysEnableCM4 "Cy_SysEnableCM4(CY_CORTEX_M4_APPL_ADDR)".
* Note: If desired user may put CM4 core in Deep Sleep any time
* after calling Cy_SysEnableCM4().
-* -# CM4 is Off:
+* -# CM4 is Off and disabled:
* call Cy_SysDisableCM4(). Note: In this state Debug mode is not
* supported.
* .
-* -# Flash write cannot be performed in ULP (core voltage 0.9V) mode.
+* -# Flash Write cannot be performed in Ultra Low Power (core voltage 0.9V) mode.
* -# Interrupts must be enabled on both active cores. Do not enter a critical
* section during flash operation.
* -# For the CY8C6xx6, CY8C6xx7 devices user must guarantee that system pipe
@@ -115,8 +115,7 @@
* sequence used.
*
* For API sequence Cy_Flash_StartEraseRow() + Cy_Flash_StartProgram() there are
-* four block-out regions during which the read is blocked using the software
-* driver (PDL). See Figure 1.
+* four block-out regions during which Read is blocked. See Figure 1.
*
*
*
@@ -150,7 +149,7 @@
*
*
*
-* This allows both cores to execute an application for about 80% of Flash Write
+* This allows both cores to execute for about 80% of Flash Write
* operation - see Figure 1.
* This capability is important for communication protocols that rely on fast
* response.
@@ -167,9 +166,9 @@
* The core that performs read/execute is blocked identically to the previous
* scenario - see Figure 1.
*
-* This allows the core that initiates Cy_Flash_StartWrite() to execute an
-* application for about 20% of the Flash Write operation. The other core executes
-* the application for about 80% of the Flash Write operation.
+* This allows the core that initiates Cy_Flash_StartWrite() to execute for about
+* 20% of Flash Write operation. The other core executes for about 80% of Flash
+* Write operation.
*
* Some constraints must be planned for in the Partially Blocking mode which are
* described in detail below.
@@ -190,7 +189,7 @@
* call \ref Cy_SysEnableCM4 "Cy_SysEnableCM4(CY_CORTEX_M4_APPL_ADDR)".
* Note: If desired user may put CM4 core in Deep Sleep any time
* after calling Cy_SysEnableCM4().
-* -# CM4 is Off:
+* -# CM4 is Off and disabled:
* call Cy_SysDisableCM4(). Note: In this state Debug mode is not
* supported.
* .
@@ -198,8 +197,8 @@
* read of any bus master: CM0+, CM4, DMA, Crypto, etc.)
* -# Do not write to and read/execute from the same flash sector at the same
* time. This is true for all sectors.
-* -# Writing rules in User Flash (this restriction is applicable just for the
-* CY8C6xx6, CY8C6xx7 devices):
+* -# Writing rules in application flash (this restriction is applicable just
+* for CY8C6xx6, CY8C6xx7 devices):
* -# Any bus master can read/execute from UFLASH S0 and/or S1, during
* flash write to UFLASH S2 or S3.
* -# Any bus master can read/execute from UFLASH S2 and/or S3, during
@@ -209,16 +208,13 @@
* code for CM4 in either S0 or S1. CM0+ code resides in S0. Write data
* to S2 and S3 sections.
* .
-* -# Flash write cannot be performed in ULP mode (core voltage 0.9V).
+* -# Flash Write cannot be performed in Ultra Low Power mode (core voltage 0.9V).
* -# Interrupts must be enabled on both active cores. Do not enter a critical
* section during flash operation.
* -# For the CY8C6xx6, CY8C6xx7 devices user must guarantee that system pipe
* interrupts (IPC interrupts 3 and 4) have the highest priority, or at
* least that pipe interrupts are not interrupted or in a pending state
* for more than 700 µs.
-* -# User must guarantee that during flash write operation no flash read
-* operations are performed by bus masters other than CM0+ and CM4
-* (DMA and Crypto).
* -# If you do not use the default startup, perform the following steps
* before any flash write/erase operations:
* \snippet flash/snippet/main.c Flash Initialization
@@ -260,6 +256,11 @@
*
*
Version
Changes
Reason for Change
*
+*
3.30.4
+*
Improved documentation.
+*
User experience enhancement.
+*
+*
*
3.30.3
*
Updated documentation to limit devices with the restrictions. Improved calculation of the CY_FLASH_DELAY_CORRECTIVE macro.
*
User experience enhancement.
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_prot.h b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_prot.h
index c51985c4211..b4ba383adfc 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_prot.h
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_prot.h
@@ -1,13 +1,13 @@
/***************************************************************************//**
* \file cy_prot.h
-* \version 1.30.1
+* \version 1.30.2
*
* \brief
* Provides an API declaration of the Protection Unit driver
*
********************************************************************************
* \copyright
-* Copyright 2016-2019 Cypress Semiconductor Corporation
+* Copyright 2016-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -390,6 +390,12 @@
*
*
Version
Changes
Reason for Change
*
+*
1.30.2
+*
Clarified the description of the next API functions: \ref Cy_Prot_ConfigPpuProgMasterAtt,\n
+* \ref Cy_Prot_ConfigPpuProgSlaveAtt, \ref Cy_Prot_ConfigPpuFixedMasterAtt, \ref Cy_Prot_ConfigPpuFixedSlaveAtt.
+*
API enhancement based on usability feedback.
+*
+*
*
1.30.1
*
Snippet updated.
*
Old snippet outdated.
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_rtc.h b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_rtc.h
index 36cac15f575..f8b90ae8a7a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_rtc.h
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_rtc.h
@@ -1,13 +1,13 @@
/***************************************************************************//**
* \file cy_rtc.h
-* \version 2.20.1
+* \version 2.30
*
* This file provides constants and parameter values for the APIs for the
* Real-Time Clock (RTC).
*
********************************************************************************
* \copyright
-* Copyright 2016-2019 Cypress Semiconductor Corporation
+* Copyright 2016-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -228,6 +228,18 @@
*
*
Version
Changes
Reason for Change
*
+*
2.30
+*
+* * Corrected the Cy_RTC_GetDstStatus() and Cy_RTC_SetNextDstTime()
+* documentation.
+* * Fixed the Cy_RTC_GetDstStatus() behaviour in the 'an hour before/after the DST stop event' period.
+*
Added a new function: \ref Cy_SMIF_MemLocateHybridRegion.\n
+* Added a new structure \ref cy_stc_smif_hybrid_region_info_t.\n
+* Updated the \ref Cy_SMIF_MemEraseSector and \ref Cy_SMIF_MemCmdSectorErase functions.\n
+* Updated the \ref Cy_SMIF_MemSfdpDetect function. \n
+* Updated the \ref cy_stc_smif_mem_device_cfg_t structure.
+*
Support for memories with hybrid regions.
+*
+*
*
1.40.1
*
The \ref Cy_SMIF_MemInit is changed.
*
Corrected a false assertion during initialization in SFDP mode.
@@ -450,7 +459,7 @@ extern "C" {
#define CY_SMIF_DRV_VERSION_MAJOR 1
/** The driver minor version */
-#define CY_SMIF_DRV_VERSION_MINOR 40
+#define CY_SMIF_DRV_VERSION_MINOR 50
/** One microsecond timeout for Cy_SMIF_TimeoutRun() */
#define CY_SMIF_WAIT_1_UNIT (1U)
@@ -679,6 +688,8 @@ typedef enum
CY_SMIF_NO_QE_BIT = CY_SMIF_ID |CY_PDL_STATUS_ERROR | 0x03U,
CY_SMIF_BAD_PARAM = CY_SMIF_ID |CY_PDL_STATUS_ERROR | 0x04U, /**< The SMIF API received the wrong parameter */
CY_SMIF_NO_SFDP_SUPPORT = CY_SMIF_ID |CY_PDL_STATUS_ERROR | 0x05U, /**< The external memory does not support SFDP (JESD216B). */
+ CY_SMIF_NOT_HYBRID_MEM = CY_SMIF_ID |CY_PDL_STATUS_ERROR | 0x06U, /**< The external memory is not hybrid */
+ CY_SMIF_SFDP_CORRUPTED_TABLE = CY_SMIF_ID |CY_PDL_STATUS_ERROR | 0x07U, /**< The SFDP table is corrupted */
/** Failed to initialize the slave select 0 external memory by auto detection (SFDP). */
CY_SMIF_SFDP_SS0_FAILED = CY_SMIF_ID |CY_PDL_STATUS_ERROR |
((uint32_t)CY_SMIF_SFDP_FAIL << CY_SMIF_SFDP_FAIL_SS0_POS),
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_smif_memslot.h b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_smif_memslot.h
index b4f1d2760de..69341a275f7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_smif_memslot.h
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_smif_memslot.h
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_smif_memslot.h
-* \version 1.40.1
+* \version 1.50
*
* \brief
* This file provides the constants and parameter values for the memory-level
@@ -201,11 +201,24 @@ extern "C" {
#define CY_SMIF_SFDP_BFPT_BYTE_23 (0x23U) /**< The byte 0x23 of the JEDEC Basic Flash Parameter Table */
#define CY_SMIF_SFDP_BFPT_BYTE_28 (0x28U) /**< The byte 0x28 of the JEDEC Basic Flash Parameter Table */
#define CY_SMIF_SFDP_BFPT_BYTE_3A (0x3AU) /**< The byte 0x3A of the JEDEC Basic Flash Parameter Table */
+#define CY_SMIF_SFDP_BFPT_BYTE_3C (0x3CU) /**< The byte 0x3C of the JEDEC Basic Flash Parameter Table */
#define CY_SMIF_SFDP_BFPT_ERASE_BYTE (36U) /**< The byte 36 of the JEDEC Basic Flash Parameter Table */
#define CY_SMIF_JEDEC_BFPT_10TH_DWORD (9U) /**< Offset to JEDEC Basic Flash Parameter Table: 10th DWORD */
#define CY_SMIF_JEDEC_BFPT_11TH_DWORD (10U) /**< Offset to JEDEC Basic Flash Parameter Table: 11th DWORD */
+
+#define CY_SMIF_SFDP_SECTOR_MAP_CMD_OFFSET (1UL) /**< The offset for the detection command instruction in the Sector Map command descriptor */
+#define CY_SMIF_SFDP_SECTOR_MAP_ADDR_CODE_OFFSET (2UL) /**< The offset for the detection command address length in the Sector Map command descriptor */
+#define CY_SMIF_SFDP_SECTOR_MAP_REG_MSK_OFFSET (3UL) /**< The offset for the read data mask in the Sector Map command descriptor */
+#define CY_SMIF_SFDP_SECTOR_MAP_REG_ADDR_OFFSET (4UL) /**< The offset for the detection command address in the Sector Map command descriptor */
+#define CY_SMIF_SFDP_SECTOR_MAP_REGION_COUNT_OFFSET (2UL) /**< The offset for the regions count in the Sector Map descriptor */
+#define CY_SMIF_SFDP_SECTOR_MAP_CONFIG_ID_OFFSET (2UL) /**< The offset for the configuration ID in the Sector Map descriptor */
+#define CY_SMIF_SFDP_SECTOR_MAP_SUPPORTED_ET_MASK (0xFU) /**< The mask for the supported erase type code in the Sector Map descriptor */
+#define CY_SMIF_SFDP_SECTOR_MAP_ADDR_BYTES_Msk (0xC0UL) /**< The mask for the configuration detection command address bytes in the Sector Map descriptor */
+#define CY_SMIF_SFDP_SECTOR_MAP_ADDR_BYTES_Pos (6UL) /**< The position of the configuration detection command address bytes in the Sector Map descriptor */
+
+
/* ---------------------------- 1st DWORD ---------------------------- */
#define CY_SMIF_SFDP_FAST_READ_1_1_4_Pos (6UL) /**< The SFDP 1-1-4 fast read support (Bit 6) */
#define CY_SMIF_SFDP_FAST_READ_1_1_4_Msk (0x40UL) /**< The SFDP 1-1-4 fast read support (Bitfield-Mask: 0x01) */
@@ -268,6 +281,14 @@ extern "C" {
#define CY_SMIF_SFDP_QE_REQUIREMENTS_Pos (4UL) /**< The SFDP quad enable requirements field (Bit 4) */
#define CY_SMIF_SFDP_QE_REQUIREMENTS_Msk (0x70UL) /**< The SFDP quad enable requirements field (Bitfield-Mask: 0x07) */
+
+/* ---------------------------- 16th DWORD --------------------------- */
+#define CY_SMIF_SFDP_ENTER_4_BYTE_METHOD_B7 (1U) /**< Issue 0xB7 instruction */
+#define CY_SMIF_SFDP_ENTER_4_BYTE_METHOD_WR_EN_B7 (2U) /**< Issue write enable instruction followed with 0xB7 */
+#define CY_SMIF_SFDP_ENTER_4_BYTE_METHOD_ALWAYS_4_BYTE (0x40U) /**< Memory always operates in 4-byte mode */
+#define CY_SMIF_SFDP_ENTER_4_BYTE_METHOD_B7_CMD (0xB7U) /**< The instruction required to enter 4-byte addressing mode */
+
+
/** \cond INTERNAL */
/*******************************************************************************
* These are legacy constants and API. They are left here just
@@ -327,6 +348,16 @@ typedef struct
cy_en_smif_txfr_width_t dataWidth; /**< The width of the data transfer */
} cy_stc_smif_mem_cmd_t;
+/** This structure specifies data used for memory with hybrid sectors */
+typedef struct
+{
+ uint32_t regionAddress; /**< This specifies the address where a region starts */
+ uint32_t sectorsCount; /**< This specifies the number of sectors in the region */
+ uint32_t eraseCmd; /**< This specifies the region specific erase instruction*/
+ uint32_t eraseSize; /**< This specifies the size of one sector */
+ uint32_t eraseTime; /**< Max time for sector erase type 1 cycle time in ms*/
+} cy_stc_smif_hybrid_region_info_t;
+
/**
*
@@ -337,31 +368,33 @@ typedef struct
*/
typedef struct
{
- uint32_t numOfAddrBytes; /**< This specifies the number of address bytes used by the
- * memory slave device, valid values 1-4 */
- uint32_t memSize; /**< The memory size: For densities of 2 gigabits or less - the size in bytes;
- * For densities 4 gigabits and above - bit-31 is set to 1b to define that
- * this memory is 4 gigabits and above; and other 30:0 bits define N where
- * the density is computed as 2^N bytes.
- * For example, 0x80000021 corresponds to 2^30 = 1 gigabyte.
- */
- cy_stc_smif_mem_cmd_t* readCmd; /**< This specifies the Read command */
- cy_stc_smif_mem_cmd_t* writeEnCmd; /**< This specifies the Write Enable command */
- cy_stc_smif_mem_cmd_t* writeDisCmd; /**< This specifies the Write Disable command */
- cy_stc_smif_mem_cmd_t* eraseCmd; /**< This specifies the Erase command */
- uint32_t eraseSize; /**< This specifies the sector size of each Erase */
- cy_stc_smif_mem_cmd_t* chipEraseCmd; /**< This specifies the Chip Erase command */
- cy_stc_smif_mem_cmd_t* programCmd; /**< This specifies the Program command */
- uint32_t programSize; /**< This specifies the page size for programming */
- cy_stc_smif_mem_cmd_t* readStsRegWipCmd; /**< This specifies the command to read the WIP-containing status register */
- cy_stc_smif_mem_cmd_t* readStsRegQeCmd; /**< This specifies the command to read the QE-containing status register */
- cy_stc_smif_mem_cmd_t* writeStsRegQeCmd; /**< This specifies the command to write into the QE-containing status register */
- cy_stc_smif_mem_cmd_t* readSfdpCmd; /**< This specifies the read SFDP command */
- uint32_t stsRegBusyMask; /**< The Busy mask for the status registers */
- uint32_t stsRegQuadEnableMask; /**< The QE mask for the status registers */
- uint32_t eraseTime; /**< Max time for erase type 1 cycle time in ms */
- uint32_t chipEraseTime; /**< Max time for chip erase cycle time in ms */
- uint32_t programTime; /**< Max time for page program cycle time in us */
+ uint32_t numOfAddrBytes; /**< This specifies the number of address bytes used by the
+ * memory slave device, valid values 1-4 */
+ uint32_t memSize; /**< The memory size: For densities of 2 gigabits or less - the size in bytes;
+ * For densities 4 gigabits and above - bit-31 is set to 1b to define that
+ * this memory is 4 gigabits and above; and other 30:0 bits define N where
+ * the density is computed as 2^N bytes.
+ * For example, 0x80000021 corresponds to 2^30 = 1 gigabyte.
+ */
+ cy_stc_smif_mem_cmd_t* readCmd; /**< This specifies the Read command */
+ cy_stc_smif_mem_cmd_t* writeEnCmd; /**< This specifies the Write Enable command */
+ cy_stc_smif_mem_cmd_t* writeDisCmd; /**< This specifies the Write Disable command */
+ cy_stc_smif_mem_cmd_t* eraseCmd; /**< This specifies the Erase command */
+ uint32_t eraseSize; /**< This specifies the sector size of each Erase */
+ cy_stc_smif_mem_cmd_t* chipEraseCmd; /**< This specifies the Chip Erase command */
+ cy_stc_smif_mem_cmd_t* programCmd; /**< This specifies the Program command */
+ uint32_t programSize; /**< This specifies the page size for programming */
+ cy_stc_smif_mem_cmd_t* readStsRegWipCmd; /**< This specifies the command to read the WIP-containing status register */
+ cy_stc_smif_mem_cmd_t* readStsRegQeCmd; /**< This specifies the command to read the QE-containing status register */
+ cy_stc_smif_mem_cmd_t* writeStsRegQeCmd; /**< This specifies the command to write into the QE-containing status register */
+ cy_stc_smif_mem_cmd_t* readSfdpCmd; /**< This specifies the read SFDP command */
+ uint32_t stsRegBusyMask; /**< The Busy mask for the status registers */
+ uint32_t stsRegQuadEnableMask; /**< The QE mask for the status registers */
+ uint32_t eraseTime; /**< Max time for erase type 1 cycle time in ms */
+ uint32_t chipEraseTime; /**< Max time for chip erase cycle time in ms */
+ uint32_t programTime; /**< Max time for page program cycle time in us */
+ uint32_t hybridRegionCount; /**< This specifies the number of regions for memory with hybrid sectors */
+ cy_stc_smif_hybrid_region_info_t** hybridRegionInfo; /**< This specifies data for memory with hybrid sectors */
} cy_stc_smif_mem_device_cfg_t;
@@ -490,7 +523,8 @@ cy_en_smif_status_t Cy_SMIF_MemEraseSector(SMIF_Type *base, cy_stc_smif_mem_conf
cy_stc_smif_context_t const *context);
cy_en_smif_status_t Cy_SMIF_MemEraseChip(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig,
cy_stc_smif_context_t const *context);
-
+cy_en_smif_status_t Cy_SMIF_MemLocateHybridRegion(cy_stc_smif_mem_config_t const *memDevice,
+ cy_stc_smif_hybrid_region_info_t** regionInfo, uint32_t address);
/** \} group_smif_mem_slot_functions */
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_sysclk.h b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_sysclk.h
index f49264089bf..9123dbccfb0 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_sysclk.h
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_sysclk.h
@@ -1,12 +1,12 @@
/***************************************************************************//**
* \file cy_sysclk.h
-* \version 1.50
+* \version 1.60
*
* Provides an API declaration of the sysclk driver.
*
********************************************************************************
* \copyright
-* Copyright 2016-2019 Cypress Semiconductor Corporation
+* Copyright 2016-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -43,8 +43,8 @@
* clock system.
*
* The PDL defines clock system capabilities in:\n
-* devices\//include\_config.h. (E.g.
-* devices/psoc6/include/psoc6_01_config.h).
+* devices/include/\_config.h. (E.g.
+* devices/include/psoc6_01_config.h).
* User-configurable clock speeds are defined in the file system_.h.
*
* As an illustration of the clocking system, the following diagram shows the
@@ -104,6 +104,15 @@
*
Used the core library defines for the message codes forming.
+*
Improve PDL code base.
+*
+*
*
2.50
*
Moved following macros to the core library:
* CY_LO8,CY_HI8,CY_LO16,CY_HI16,CY_SWAP_ENDIAN16,CY_SWAP_ENDIAN32,
@@ -250,6 +255,7 @@
#include
#include
#include "cy_utils.h"
+#include "cy_result.h"
#include "cy_device.h"
#include "cy_device_headers.h"
@@ -290,13 +296,13 @@ extern "C" {
* \{
* Function status type codes
*/
-#define CY_PDL_STATUS_CODE_Pos (0U) /**< The module status code position in the status code */
-#define CY_PDL_STATUS_TYPE_Pos (16U) /**< The status type position in the status code */
-#define CY_PDL_MODULE_ID_Pos (18U) /**< The software module ID position in the status code */
-#define CY_PDL_STATUS_INFO (0UL << CY_PDL_STATUS_TYPE_Pos) /**< The information status type */
-#define CY_PDL_STATUS_WARNING (1UL << CY_PDL_STATUS_TYPE_Pos) /**< The warning status type */
-#define CY_PDL_STATUS_ERROR (2UL << CY_PDL_STATUS_TYPE_Pos) /**< The error status type */
-#define CY_PDL_MODULE_ID_Msk (0x3FFFU) /**< The software module ID mask */
+#define CY_PDL_STATUS_CODE_Pos (CY_RSLT_CODE_POSITION) /**< The module status code position in the status code */
+#define CY_PDL_STATUS_TYPE_Pos (CY_RSLT_TYPE_POSITION) /**< The status type position in the status code */
+#define CY_PDL_MODULE_ID_Pos (CY_RSLT_MODULE_POSITION) /**< The software module ID position in the status code */
+#define CY_PDL_STATUS_INFO ((uint32_t)CY_RSLT_TYPE_INFO << CY_PDL_STATUS_TYPE_Pos) /**< The information status type */
+#define CY_PDL_STATUS_WARNING ((uint32_t)CY_RSLT_TYPE_WARNING << CY_PDL_STATUS_TYPE_Pos) /**< The warning status type */
+#define CY_PDL_STATUS_ERROR ((uint32_t)CY_RSLT_TYPE_ERROR << CY_PDL_STATUS_TYPE_Pos) /**< The error status type */
+#define CY_PDL_MODULE_ID_Msk (CY_RSLT_MODULE_MASK) /**< The software module ID mask */
/** Get the software PDL module ID */
#define CY_PDL_DRV_ID(id) ((uint32_t)((uint32_t)((id) & CY_PDL_MODULE_ID_Msk) << CY_PDL_MODULE_ID_Pos))
#define CY_SYSLIB_ID CY_PDL_DRV_ID(0x11U) /**< SYSLIB PDL ID */
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_syspm.h b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_syspm.h
index 85cd16688b1..6d071770b23 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_syspm.h
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_syspm.h
@@ -1,12 +1,12 @@
/***************************************************************************//**
* \file cy_syspm.h
-* \version 4.50
+* \version 5.0
*
* Provides the function definitions for the power management API.
*
********************************************************************************
* \copyright
-* Copyright 2016-2019 Cypress Semiconductor Corporation
+* Copyright 2016-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -724,6 +724,23 @@
*
*
Version
Changes
Reason for Change
*
+*
5.0
+*
+* Updated the internal IsVoltageChangePossible() function
+* (\ref Cy_SysPm_LdoSetVoltage(), \ref Cy_SysPm_BuckEnable(),
+* \ref Cy_SysPm_BuckSetVoltage1(), \ref Cy_SysPm_SystemEnterUlp()
+* and \ref Cy_SysPm_SystemEnterLp() functions are affected).
+* For all the devices except CY8C6xx6 and CY8C6xx7 added the check if
+* modifying the RAM trim register is allowed.
+*
+*
+* Protecting the system from a possible CPU hard-fault cause. If you
+* are using PC > 0 in your project and you want to switch the power
+* modes (LP<->ULP), you need to unprotect the CPUSS_TRIM_RAM_CTL and
+* CPUSS_TRIM_ROM_CTL registers and can use a programmable PPU for that.
+*
+*
+*
*
4.50
*
Updated the \ref Cy_SysPm_CpuEnterDeepSleep() function.
*
@@ -1239,10 +1256,10 @@ extern "C" {
*/
/** Driver major version */
-#define CY_SYSPM_DRV_VERSION_MAJOR 4
+#define CY_SYSPM_DRV_VERSION_MAJOR 5
/** Driver minor version */
-#define CY_SYSPM_DRV_VERSION_MINOR 50
+#define CY_SYSPM_DRV_VERSION_MINOR 0
/** SysPm driver identifier */
#define CY_SYSPM_ID (CY_PDL_DRV_ID(0x10U))
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_ARM/cy_syslib_mdk.S b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_ARM/cy_syslib_mdk.S
index 16e71def22a..52069c48566 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_ARM/cy_syslib_mdk.S
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_ARM/cy_syslib_mdk.S
@@ -1,11 +1,11 @@
;-------------------------------------------------------------------------------
; \file cy_syslib_mdk.s
-; \version 2.50
+; \version 2.50.1
;
; \brief Assembly routines for ARMCC.
;
;-------------------------------------------------------------------------------
-; Copyright 2016-2019 Cypress Semiconductor Corporation
+; Copyright 2016-2020 Cypress Semiconductor Corporation
; SPDX-License-Identifier: Apache-2.0
;
; Licensed under the Apache License, Version 2.0 (the "License");
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_A_Clang/cy_syslib_a_clang.S b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_A_Clang/cy_syslib_a_clang.S
index 68249d70779..62b526c4012 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_A_Clang/cy_syslib_a_clang.S
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_A_Clang/cy_syslib_a_clang.S
@@ -1,12 +1,12 @@
/***************************************************************************//**
* \file cy_syslib_a_clang.S
-* \version 2.50
+* \version 2.50.1
*
* \brief Assembly routines for Apple Clang.
*
********************************************************************************
* \copyright
-* Copyright 2016-2019 Cypress Semiconductor Corporation
+* Copyright 2016-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S
index 1d6e16eba26..9af4ce1a614 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S
@@ -1,12 +1,12 @@
/***************************************************************************//**
* \file cy_syslib_gcc.S
-* \version 2.50
+* \version 2.50.1
*
* \brief Assembly routines for GNU GCC.
*
********************************************************************************
* \copyright
-* Copyright 2016-2019 Cypress Semiconductor Corporation
+* Copyright 2016-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_IAR/cy_syslib_iar.S b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_IAR/cy_syslib_iar.S
index 88477491007..ff7f89d5ac8 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_IAR/cy_syslib_iar.S
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_IAR/cy_syslib_iar.S
@@ -1,12 +1,12 @@
/***************************************************************************//**
* \file cy_syslib_iar.s
-* \version 2.50
+* \version 2.50.1
*
* \brief Assembly routines for IAR Embedded Workbench IDE.
*
********************************************************************************
* \copyright
-* Copyright 2016-2019 Cypress Semiconductor Corporation
+* Copyright 2016-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_ble_clk.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_ble_clk.c
index 8f92bd1df26..b9aefd80891 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_ble_clk.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_ble_clk.c
@@ -1,13 +1,13 @@
/***************************************************************************//**
* \file cy_ble_clk.c
-* \version 3.30
+* \version 3.40
*
* \brief
* This driver provides the source code for API BLE ECO clock.
*
********************************************************************************
* \copyright
-* Copyright 2017-2019 Cypress Semiconductor Corporation
+* Copyright 2017-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -235,8 +235,7 @@ cy_en_ble_eco_status_t Cy_BLE_EcoConfigure(cy_en_ble_eco_freq_t freq, cy_en_ble_
Cy_SysPm_IoUnfreeze();
}
- if(((BLE_BLESS_MT_CFG & BLE_BLESS_MT_CFG_ENABLE_BLERD_Msk) != 0u) &&
- ((BLE_BLESS_MT_STATUS & BLE_BLESS_MT_STATUS_BLESS_STATE_Msk) != 0u))
+ if(Cy_BLE_EcoIsEnabled())
{
status = CY_BLE_ECO_ALREADY_STARTED;
}
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_canfd.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_canfd.c
index 4a8098fae67..1fd40285697 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_canfd.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_canfd.c
@@ -1,13 +1,13 @@
/*******************************************************************************
* \file cy_canfd.c
-* \version 1.0.1
+* \version 1.10
*
* \brief
* Provides an API implementation of the CAN FD driver.
*
********************************************************************************
* \copyright
-* Copyright 2019 Cypress Semiconductor Corporation
+* Copyright 2019-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -269,11 +269,8 @@ cy_en_canfd_status_t Cy_CANFD_Init(CANFD_Type *base, uint32_t chan,
(NULL != config->bitrate) &&
(NULL != config->globalFilterConfig) &&
(NULL != config->rxFIFO0Config) &&
- (NULL != config->rxFIFO1Config) &&
- ((0U != config->sidFilterConfig->numberOfSIDFilters) &&
- (NULL != config->sidFilterConfig->sidFilter)) &&
- ((0U != config->extidFilterConfig->numberOfEXTIDFilters) &&
- (NULL != config->extidFilterConfig->extidFilter)) )
+ (NULL != config->rxFIFO1Config)
+ )
{
CY_ASSERT_L2(CY_CANFD_IS_CHANNEL_VALID(chan));
CY_ASSERT_L2(CY_CANFD_IS_NOM_PRESCALER_VALID(config->bitrate->prescaler));
@@ -318,25 +315,42 @@ cy_en_canfd_status_t Cy_CANFD_Init(CANFD_Type *base, uint32_t chan,
context->messageRAMaddress = config->messageRAMaddress;
context->messageRAMsize = config->messageRAMsize;
- /* Configure a standard ID filter:
- * The number of SID filters and Start address (word) of the SID filter
- * configuration in Message RAM
- */
- CANFD_SIDFC(base, chan) =
- _VAL2FLD(CANFD_CH_M_TTCAN_SIDFC_LSS, config->sidFilterConfig->numberOfSIDFilters) |
- _VAL2FLD(CANFD_CH_M_TTCAN_SIDFC_FLSSA, config->messageRAMaddress >> CY_CANFD_MRAM_SIGNIFICANT_BYTES_SHIFT);
+ if ((0U != config->sidFilterConfig->numberOfSIDFilters) &&
+ (NULL != config->sidFilterConfig->sidFilter))
+ {
+ /* Configure a standard ID filter:
+ * The number of SID filters and Start address (word) of the SID filter
+ * configuration in Message RAM
+ */
+ CANFD_SIDFC(base, chan) =
+ _VAL2FLD(CANFD_CH_M_TTCAN_SIDFC_LSS, config->sidFilterConfig->numberOfSIDFilters) |
+ _VAL2FLD(CANFD_CH_M_TTCAN_SIDFC_FLSSA, config->messageRAMaddress >> CY_CANFD_MRAM_SIGNIFICANT_BYTES_SHIFT);
+ }
+ else
+ {
+ CANFD_SIDFC(base, chan) = 0U;
+ }
- /* Configure an extended ID filter:
- * The number of XID filters and start address (word) of the ext id
- * filter configuration in Message RAM
- */
- CANFD_XIDFC(base, chan) =
- _VAL2FLD(CANFD_CH_M_TTCAN_XIDFC_LSE, config->extidFilterConfig->numberOfEXTIDFilters) |
- _VAL2FLD(CANFD_CH_M_TTCAN_XIDFC_FLESA, _FLD2VAL(CANFD_CH_M_TTCAN_SIDFC_FLSSA, CANFD_SIDFC(base, chan)) +
+ if((0U != config->extidFilterConfig->numberOfEXTIDFilters) &&
+ (NULL != config->extidFilterConfig->extidFilter))
+ {
+ /* Configure an extended ID filter:
+ * The number of XID filters and start address (word) of the ext id
+ * filter configuration in Message RAM
+ */
+ CANFD_XIDFC(base, chan) =
+ _VAL2FLD(CANFD_CH_M_TTCAN_XIDFC_LSE, config->extidFilterConfig->numberOfEXTIDFilters) |
+ _VAL2FLD(CANFD_CH_M_TTCAN_XIDFC_FLESA, _FLD2VAL(CANFD_CH_M_TTCAN_SIDFC_FLSSA, CANFD_SIDFC(base, chan)) +
(config->sidFilterConfig->numberOfSIDFilters));
- /* Update the extended ID AND Mask */
- CANFD_XIDAM(base, chan) = _VAL2FLD(CANFD_CH_M_TTCAN_XIDAM_EIDM, config->extidFilterConfig->extIDANDMask);
+ /* Update the extended ID AND Mask */
+ CANFD_XIDAM(base, chan) = _VAL2FLD(CANFD_CH_M_TTCAN_XIDAM_EIDM, config->extidFilterConfig->extIDANDMask);
+ }
+ else
+ {
+ CANFD_XIDFC(base, chan) = 0U;
+ CANFD_XIDAM(base, chan) = 0U;
+ }
/* Configuration of Rx Buffer and Rx FIFO */
CANFD_RXESC(base, chan) =
@@ -476,11 +490,17 @@ cy_en_canfd_status_t Cy_CANFD_Init(CANFD_Type *base, uint32_t chan,
_VAL2FLD(CANFD_CH_M_TTCAN_GFC_RRFS, ((config->globalFilterConfig->rejectRemoteFramesStandard) ? 1UL : 0UL))|
_VAL2FLD(CANFD_CH_M_TTCAN_GFC_RRFE, ((config->globalFilterConfig->rejectRemoteFramesExtended) ? 1UL : 0UL));
- /* Standard Message ID filters */
- Cy_CANFD_SidFiltersSetup(base, chan, config->sidFilterConfig, context);
+ if (0U != config->sidFilterConfig->numberOfSIDFilters)
+ {
+ /* Standard Message ID filters */
+ Cy_CANFD_SidFiltersSetup(base, chan, config->sidFilterConfig, context);
+ }
- /* Extended Message ID filters */
- Cy_CANFD_XidFiltersSetup(base, chan, config->extidFilterConfig, context);
+ if(0U != config->extidFilterConfig->numberOfEXTIDFilters)
+ {
+ /* Extended Message ID filters */
+ Cy_CANFD_XidFiltersSetup(base, chan, config->extidFilterConfig, context);
+ }
/* Configure the interrupt */
Cy_CANFD_SetInterruptMask(base, chan, CY_CANFD_INTERRUPT_ENABLE_DEFAULT);
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_device.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_device.c
index c89104a36d0..a3358e3ddee 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_device.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_device.c
@@ -357,6 +357,113 @@ const cy_stc_device_t cy_deviceIpBlockCfgPSoC6_03 =
/* ipcLockStatusOffset */ offsetof(IPC_STRUCT_V2_Type, LOCK_STATUS),
};
+const cy_stc_device_t cy_deviceIpBlockCfgPSoC6_04 =
+{
+ /* Base HW addresses */
+ /* cpussBase */ 0x40200000UL,
+ /* flashcBase */ 0x40240000UL,
+ /* periBase */ 0x40000000UL,
+ /* udbBase */ 0UL,
+ /* protBase */ 0x40230000UL,
+ /* hsiomBase */ 0x40300000UL,
+ /* gpioBase */ 0x40310000UL,
+ /* passBase */ 0x409F0000UL,
+ /* ipcBase */ 0x40220000UL,
+ /* cryptoBase */ 0x40100000UL,
+
+ /* IP block versions [7:4] major, [3:0] minor */
+ /* cpussVersion */ 0x20U,
+ /* cryptoVersion */ 0x20U,
+ /* dwVersion */ 0x20U,
+ /* ipcVersion */ 0x20U,
+ /* periVersion */ 0x20U,
+ /* srssVersion */ 0x13U,
+
+ /* Parameters */
+ /* cpussIpcNr */ 16U,
+ /* cpussIpcIrqNr */ 16U,
+ /* cpussDw0ChNr */ 30U,
+ /* cpussDw1ChNr */ 32U,
+ /* cpussFlashPaSize */ 128U,
+ /* cpussIpc0Irq */ 23,
+ /* cpussFmIrq */ 117,
+ /* cpussNotConnectedIrq */ 1023,
+ /* srssNumClkpath */ 5U,
+ /* srssNumPll */ 1U,
+ /* srssNumHfroot */ 4U,
+ /* periClockNr */ 28U,
+ /* smifDeviceNr */ 3U,
+ /* passSarChannels */ 16U,
+ /* epMonitorNr */ 0u,
+ /* udbPresent */ 0U,
+ /* sysPmSimoPresent */ 1U,
+ /* protBusMasterMask */ 0xC01FUL,
+ /* cryptoMemSize */ 1024u,
+ /* flashRwwRequired */ 0U,
+ /* flashPipeRequired */ 0U,
+ /* flashWriteDelay */ 0U,
+ /* flashProgramDelay */ 0U,
+ /* flashEraseDelay */ 0U,
+ /* flashCtlMainWs0Freq */ 25U,
+ /* flashCtlMainWs1Freq */ 50U,
+ /* flashCtlMainWs2Freq */ 75U,
+ /* flashCtlMainWs3Freq */ 100U,
+ /* flashCtlMainWs4Freq */ 125U,
+
+ /* Peripheral register offsets */
+
+ /* DW registers */
+ /* dwChOffset */ (uint16_t)offsetof(DW_V2_Type, CH_STRUCT),
+ /* dwChSize */ sizeof(DW_CH_STRUCT_V2_Type),
+ /* dwChCtlPrioPos */ (uint8_t)DW_CH_STRUCT_V2_CH_CTL_PRIO_Pos,
+ /* dwChCtlPreemptablePos */ (uint8_t)DW_CH_STRUCT_V2_CH_CTL_PREEMPTABLE_Pos,
+ /* dwStatusChIdxPos */ (uint8_t)DW_V2_STATUS_CH_IDX_Pos,
+ /* dwStatusChIdxMsk */ DW_V2_STATUS_CH_IDX_Msk,
+
+ /* PERI registers */
+ /* periTrCmdOffset */ (uint16_t)offsetof(PERI_V2_Type, TR_CMD),
+ /* periTrCmdGrSelMsk */ (uint16_t)PERI_V2_TR_CMD_GROUP_SEL_Msk,
+ /* periTrGrOffset */ (uint16_t)offsetof(PERI_V2_Type, TR_GR),
+ /* periTrGrSize */ sizeof(PERI_TR_GR_V2_Type),
+
+ /* periDivCmdDivSelMsk */ (uint8_t)PERI_V2_DIV_CMD_DIV_SEL_Msk,
+ /* periDivCmdTypeSelPos */ (uint8_t)PERI_V2_DIV_CMD_TYPE_SEL_Pos,
+ /* periDivCmdPaDivSelPos */ (uint8_t)PERI_V2_DIV_CMD_PA_DIV_SEL_Pos,
+ /* periDivCmdPaTypeSelPos */ (uint8_t)PERI_V2_DIV_CMD_PA_TYPE_SEL_Pos,
+
+ /* periDiv8CtlOffset */ (uint16_t)offsetof(PERI_V2_Type, DIV_8_CTL),
+ /* periDiv16CtlOffset */ (uint16_t)offsetof(PERI_V2_Type, DIV_16_CTL),
+ /* periDiv16_5CtlOffset */ (uint16_t)offsetof(PERI_V2_Type, DIV_16_5_CTL),
+ /* periDiv24_5CtlOffset */ (uint16_t)offsetof(PERI_V2_Type, DIV_24_5_CTL),
+
+ /* GPIO registers */
+ /* gpioPrtIntrCfgOffset */ (uint8_t)offsetof(GPIO_PRT_V2_Type, INTR_CFG),
+ /* gpioPrtCfgOffset */ (uint8_t)offsetof(GPIO_PRT_V2_Type, CFG),
+ /* gpioPrtCfgInOffset */ (uint8_t)offsetof(GPIO_PRT_V2_Type, CFG_IN),
+ /* gpioPrtCfgOutOffset */ (uint8_t)offsetof(GPIO_PRT_V2_Type, CFG_OUT),
+ /* gpioPrtCfgSioOffset */ (uint8_t)offsetof(GPIO_PRT_V2_Type, CFG_SIO),
+
+ /* CPUSS registers */
+ /* cpussCm0ClockCtlOffset */ offsetof(CPUSS_V2_Type, CM0_CLOCK_CTL),
+ /* cpussCm4ClockCtlOffset */ offsetof(CPUSS_V2_Type, CM4_CLOCK_CTL),
+ /* cpussCm4StatusOffset */ offsetof(CPUSS_V2_Type, CM4_STATUS),
+ /* cpussCm0StatusOffset */ offsetof(CPUSS_V2_Type, CM0_STATUS),
+ /* cpussCm4PwrCtlOffset */ offsetof(CPUSS_V2_Type, CM4_PWR_CTL),
+ /* cpussTrimRamCtlOffset */ offsetof(CPUSS_V2_Type, TRIM_RAM_CTL),
+ /* cpussTrimRomCtlOffset */ offsetof(CPUSS_V2_Type, TRIM_ROM_CTL),
+ /* cpussSysTickCtlOffset */ offsetof(CPUSS_V2_Type, SYSTICK_CTL),
+ /* cpussCm0NmiCtlOffset */ (uint16_t)offsetof(CPUSS_V2_Type, CM0_NMI_CTL),
+ /* cpussCm4NmiCtlOffset */ (uint16_t)offsetof(CPUSS_V2_Type, CM4_NMI_CTL),
+ /* cpussRomCtl */ (uint16_t)offsetof(CPUSS_V2_Type, ROM_CTL),
+ /* cpussRam0Ctl0 */ (uint16_t)offsetof(CPUSS_V2_Type, RAM0_CTL0),
+ /* cpussRam1Ctl0 */ (uint16_t)offsetof(CPUSS_V2_Type, RAM1_CTL0),
+ /* cpussRam2Ctl0 */ (uint16_t)offsetof(CPUSS_V2_Type, RAM2_CTL0),
+
+ /* IPC registers */
+ /* ipcStructSize */ sizeof(IPC_STRUCT_V2_Type),
+ /* ipcLockStatusOffset */ offsetof(IPC_STRUCT_V2_Type, LOCK_STATUS),
+};
+
/******************************************************************************
* Function Name: Cy_PDL_Init
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_efuse.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_efuse.c
index 308166311ce..55e985f7617 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_efuse.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_efuse.c
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_efuse.c
-* \version 1.10.1
+* \version 1.10.2
*
* \brief
* Provides API implementation of the eFuse driver.
@@ -62,7 +62,7 @@ static cy_en_efuse_status_t ProcessOpcode(void);
* - 8 is a number of fuse bits in the byte.
*
* The EFUSE_EFUSE_NR macro is defined in the series-specific header file, e.g
-* \e \/devices/psoc6/include/psoc6_01_config.\e h
+* \e \/devices/include/psoc6_01_config.\e h
*
* \param bitVal
* The pointer to the location to store the bit value.
@@ -119,7 +119,7 @@ cy_en_efuse_status_t Cy_EFUSE_GetEfuseBit(uint32_t bitNum, bool *bitVal)
* - 32 is a number of fuse bytes in one efuse macro.
*
* The EFUSE_EFUSE_NR macro is defined in the series-specific header file, e.g
-* \e \/devices/psoc6/include/psoc6_01_config.\e h
+* \e \/devices/include/psoc6_01_config.\e h
*
* \param byteVal
* The pointer to the location to store eFuse data.
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_flash.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_flash.c
index f5bd30c9d4f..1911b97783a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_flash.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_flash.c
@@ -1,13 +1,13 @@
/***************************************************************************//**
* \file cy_flash.c
-* \version 3.30.3
+* \version 3.30.4
*
* \brief
* Provides the public functions for the API for the PSoC 6 Flash Driver.
*
********************************************************************************
* \copyright
-* Copyright 2016-2019 Cypress Semiconductor Corporation
+* Copyright 2016-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -668,8 +668,9 @@ cy_en_flashdrv_status_t Cy_Flash_EraseRow(uint32_t rowAddr)
* XRES pin, a software reset, and watchdog reset sources. Also, the low-voltage
* detect circuits should be configured to generate an interrupt instead of a reset.
* Otherwise, portions of flash may undergo unexpected changes.
-* \note Before reading data from previously programmed/erased flash rows, the
-* user must clear the flash cache with the Cy_SysLib_ClearFlashCacheAndBuffer()
+* \note To avoid situation of reading data from cache memory - before
+* reading data from previously programmed/erased flash rows, the user must
+* clear the flash cache with the Cy_SysLib_ClearFlashCacheAndBuffer()
* function.
*
* \param rowAddr Address of the flash row number.
@@ -719,7 +720,7 @@ cy_en_flashdrv_status_t Cy_Flash_StartEraseRow(uint32_t rowAddr)
* Function Name: Cy_Flash_EraseSector
****************************************************************************//**
*
-* This function erases a 256KB sector of flash. Reports success or
+* This function erases a sector of flash. Reports success or
* a reason for failure. Does not return until the Erase operation is
* complete. Returns immediately and reports a \ref CY_FLASH_DRV_IPC_BUSY error in
* the case when another process is writing to flash or erasing the row.
@@ -772,7 +773,7 @@ cy_en_flashdrv_status_t Cy_Flash_EraseSector(uint32_t sectorAddr)
* Function Name: Cy_Flash_StartEraseSector
****************************************************************************//**
*
-* Starts erasing a 256KB sector of flash. Returns immediately
+* Starts erasing a sector of flash. Returns immediately
* and reports a successful start or reason for failure.
* Reports a \ref CY_FLASH_DRV_IPC_BUSY error in the case when IPC structure is locked
* by another process. User firmware should not enter the Hibernate or Deep Sleep mode until
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_prot.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_prot.c
index 4731fa74024..6ea05a012ad 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_prot.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_prot.c
@@ -1,13 +1,13 @@
/***************************************************************************//**
* \file cy_prot.c
-* \version 1.30.1
+* \version 1.30.2
*
* \brief
* Provides an API implementation of the Protection Unit driver
*
********************************************************************************
* \copyright
-* Copyright 2016-2019 Cypress Semiconductor Corporation
+* Copyright 2016-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -776,11 +776,12 @@ cy_en_prot_status_t Cy_Prot_GetSmpuStruct(PROT_SMPU_SMPU_STRUCT_Type** base,
* The register to update attributes in.
*
* \param pcMask
-* The protection context mask. This is a 16-bit value of the allowed contexts.
-* It is an OR'ed (|) field of the * provided defines in cy_prot.h.
-* For example: (CY_PROT_PCMASK1 | CY_PROT_PCMASK3 | CY_PROT_PCMASK4).
-* \note The function accepts pcMask values from CY_PROT_PCMASK1 to CY_PROT_PCMASK5.
-* But each device has its own number of available protection contexts.
+* The protection context mask. It specifies the protection context or a set of
+* multiple protection contexts to be configured.
+* It is a value of OR'd (|) items of \ref cy_en_prot_pcmask_t.
+* For example: (\ref CY_PROT_PCMASK1 | \ref CY_PROT_PCMASK3 | \ref CY_PROT_PCMASK4).
+* \note The function accepts pcMask values from \ref CY_PROT_PCMASK1 to \ref CY_PROT_PCMASK15.
+* But each device has its own number of available protection contexts.
* That number is defined by PERI_PC_NR in the config file.
*
* \param userPermission
@@ -888,11 +889,12 @@ static cy_en_prot_status_t Prot_ConfigPpuAtt(volatile uint32_t * reg, uint16_t p
* The register base address of the protection structure is being configured.
*
* \param pcMask
-* The protection context mask. This is a 16-bit value of the allowed contexts,
-* it is an OR'ed (|) field of the * provided defines in cy_prot.h.
-* For example: (CY_PROT_PCMASK1 | CY_PROT_PCMASK3 | CY_PROT_PCMASK4).
-* \note The function accepts pcMask values from CY_PROT_PCMASK1 to CY_PROT_PCMASK15.
-* But each device has its own number of available protection contexts.
+* The protection context mask. It specifies the protection context or a set of
+* multiple protection contexts to be configured.
+* It is a value of OR'd (|) items of \ref cy_en_prot_pcmask_t.
+* For example: (\ref CY_PROT_PCMASK1 | \ref CY_PROT_PCMASK3 | \ref CY_PROT_PCMASK4).
+* \note The function accepts pcMask values from \ref CY_PROT_PCMASK1 to \ref CY_PROT_PCMASK15.
+* But each device has its own number of available protection contexts.
* That number is defined by PERI_PC_NR in the config file.
*
* \param userPermission
@@ -1013,11 +1015,12 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuProgSlaveAddr(PERI_MS_PPU_PR_Type* base, ui
* The register base address of the protection structure is being configured.
*
* \param pcMask
-* The protection context mask. This is a 16-bit value of the allowed contexts,
-* it is an OR'ed (|) field of the * provided defines in cy_prot.h.
-* For example: (CY_PROT_PCMASK1 | CY_PROT_PCMASK3 | CY_PROT_PCMASK4).
-* \note The function accepts pcMask values from CY_PROT_PCMASK1 to CY_PROT_PCMASK15.
-* But each device has its own number of available protection contexts.
+* The protection context mask. It specifies the protection context or a set of
+* multiple protection contexts to be configured.
+* It is a value of OR'd (|) items of \ref cy_en_prot_pcmask_t.
+* For example: (\ref CY_PROT_PCMASK1 | \ref CY_PROT_PCMASK3 | \ref CY_PROT_PCMASK4).
+* \note The function accepts pcMask values from \ref CY_PROT_PCMASK1 to \ref CY_PROT_PCMASK15.
+* But each device has its own number of available protection contexts.
* That number is defined by PERI_PC_NR in the config file.
*
* \param userPermission
@@ -1167,11 +1170,12 @@ cy_en_prot_status_t Cy_Prot_DisablePpuProgSlaveRegion(PERI_MS_PPU_PR_Type* base)
* The register base address of the protection structure is being configured.
*
* \param pcMask
-* The protection context mask. This is a 16-bit value of the allowed contexts,
-* it is an OR'ed (|) field of the * provided defines in cy_prot.h.
-* For example: (CY_PROT_PCMASK1 | CY_PROT_PCMASK3 | CY_PROT_PCMASK4).
-* \note The function accepts pcMask values from CY_PROT_PCMASK1 to CY_PROT_PCMASK15.
-* But each device has its own number of available protection contexts.
+* The protection context mask. It specifies the protection context or a set of
+* multiple protection contexts to be configured.
+* It is a value of OR'd (|) items of \ref cy_en_prot_pcmask_t.
+* For example: (\ref CY_PROT_PCMASK1 | \ref CY_PROT_PCMASK3 | \ref CY_PROT_PCMASK4).
+* \note The function accepts pcMask values from \ref CY_PROT_PCMASK1 to \ref CY_PROT_PCMASK15.
+* But each device has its own number of available protection contexts.
* That number is defined by PERI_PC_NR in the config file.
*
* \param userPermission
@@ -1232,11 +1236,12 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedMasterAtt(PERI_MS_PPU_FX_Type* base, u
* The register base address of the protection structure is being configured.
*
* \param pcMask
-* The protection context mask. This is a 16-bit value of the allowed contexts,
-* it is an OR'ed (|) field of the * provided defines in cy_prot.h.
-* For example: (CY_PROT_PCMASK1 | CY_PROT_PCMASK3 | CY_PROT_PCMASK4).
-* \note The function accepts pcMask values from CY_PROT_PCMASK1 to CY_PROT_PCMASK15.
-* But each device has its own number of available protection contexts.
+* The protection context mask. It specifies the protection context or a set of
+* multiple protection contexts to be configured.
+* It is a value of OR'd (|) items of \ref cy_en_prot_pcmask_t.
+* For example: (\ref CY_PROT_PCMASK1 | \ref CY_PROT_PCMASK3 | \ref CY_PROT_PCMASK4).
+* \note The function accepts pcMask values from \ref CY_PROT_PCMASK1 to \ref CY_PROT_PCMASK15.
+* But each device has its own number of available protection contexts.
* That number is defined by PERI_PC_NR in the config file.
*
* \param userPermission
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_rtc.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_rtc.c
index 35951666fc4..8c9f953ee60 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_rtc.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_rtc.c
@@ -1,12 +1,13 @@
/***************************************************************************//**
* \file cy_rtc.c
-* \version 2.20.1
+* \version 2.30
*
* This file provides constants and parameter values for the APIs for the
* Real-Time Clock (RTC).
*
********************************************************************************
-* Copyright 2016-2019 Cypress Semiconductor Corporation
+* \copyright
+* Copyright 2016-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -886,9 +887,10 @@ cy_en_rtc_status_t Cy_RTC_EnableDstTime(cy_stc_rtc_dst_t const *dstTime, cy_stc_
* Function Name: Cy_RTC_SetNextDstTime
****************************************************************************//**
*
-* Set the next time of the DST. This function sets the time to ALARM2 for a next
-* DST event. If Cy_RTC_GetDSTStatus() is true(=1), the next DST event should be
-* the DST stop, then this function should be called with the DST stop time.
+* A low-level DST function sets ALARM2 for a next DST event.
+* If Cy_RTC_GetDSTStatus() is true(=1), the next DST event should be
+* the DST stop, then this function should be called with the DST stop time.
+* Used by the \ref Cy_RTC_EnableDstTime and \ref Cy_RTC_DstInterrupt functions.
*
* If the time format(.format) is relative option(=0), the
* RelativeToFixed() is called to convert to a fixed date.
@@ -959,9 +961,11 @@ cy_en_rtc_status_t Cy_RTC_SetNextDstTime(cy_stc_rtc_dst_format_t const *nextDst)
* Function Name: Cy_RTC_GetDstStatus
****************************************************************************//**
*
-* Returns the current DST status using given time information. This function
-* is used in the initial state of a system. If the DST is enabled, the system
-* sets the DST start or stop as a result of this function.
+* A low-level DST function returns the current DST status using given time
+* information. This function is used in the initial state of a system.
+* If the DST is enabled, the system sets the DST start or stop as a result of
+* this function.
+* Used by the \ref Cy_RTC_EnableDstTime and \ref Cy_RTC_DstInterrupt functions.
*
* \param dstTime The DST configuration structure, see \ref cy_stc_rtc_dst_t.
*
@@ -981,6 +985,7 @@ bool Cy_RTC_GetDstStatus(cy_stc_rtc_dst_t const *dstTime, cy_stc_rtc_config_t co
uint32_t dstStopTime;
uint32_t dstStartDayOfMonth;
uint32_t dstStopDayOfMonth;
+ bool status = false;
CY_ASSERT_L1(NULL != dstTime);
CY_ASSERT_L1(NULL != timeDate);
@@ -1019,11 +1024,41 @@ bool Cy_RTC_GetDstStatus(cy_stc_rtc_dst_t const *dstTime, cy_stc_rtc_config_t co
currentTime = ((uint32_t) (timeDate->month << CY_RTC_DST_MONTH_POSITION) |
(timeDate->date << CY_RTC_DST_DAY_OF_MONTH_POSITION) | (timeDate->hour));
-
+
dstStopTime = ((uint32_t) (dstTime->stopDst.month << CY_RTC_DST_MONTH_POSITION) |
(dstStopDayOfMonth << CY_RTC_DST_DAY_OF_MONTH_POSITION) | (dstTime->stopDst.hour));
- return((dstStartTime <= currentTime) && (dstStopTime > currentTime));
+ if ((dstStartTime <= currentTime) && (dstStopTime > currentTime))
+ {
+ status = true;
+
+ if (1UL == (dstStopTime - currentTime)) /* Check for the 'an hour before/after stop DST event' period */
+ {
+ cy_stc_rtc_alarm_t alarm;
+ uint32_t locDate = (CY_RTC_DST_FIXED != dstTime->startDst.format) ? RelativeToFixed(&dstTime->startDst) : dstTime->startDst.dayOfMonth;
+ Cy_RTC_GetAlarmDateAndTime(&alarm, CY_RTC_ALARM_2);
+
+ /* If Alarm2 is set for the "Start DST" event - the "Stop DST" event is already passed: */
+ if ((alarm.almEn == CY_RTC_ALARM_ENABLE ) &&
+ (alarm.monthEn == CY_RTC_ALARM_ENABLE ) &&
+ (alarm.month == dstTime->startDst.month) &&
+ (alarm.dateEn == CY_RTC_ALARM_ENABLE ) &&
+ (alarm.date == locDate ) &&
+ (alarm.dayOfWeekEn == CY_RTC_ALARM_DISABLE ) &&
+ (alarm.hourEn == CY_RTC_ALARM_ENABLE ) &&
+ (alarm.hour == dstTime->startDst.hour ) &&
+ (alarm.minEn == CY_RTC_ALARM_ENABLE ) &&
+ (alarm.min == 0UL ) &&
+ (alarm.secEn == CY_RTC_ALARM_ENABLE ) &&
+ (alarm.sec == 0UL ))
+ {
+ status = false;
+ }
+ /* Otherwise, including the case when Alarm2 is not set at all (DST is not enabled yet) - return true. */
+ }
+ }
+
+ return (status);
}
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_smif.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_smif.c
index 30cad1e32a5..875573ab630 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_smif.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_smif.c
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_smif.c
-* \version 1.40.1
+* \version 1.50
*
* \brief
* This file provides the source code for the SMIF driver APIs.
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_smif_memslot.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_smif_memslot.c
index 114c5e5d932..5a28464ea38 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_smif_memslot.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_smif_memslot.c
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_smif_memslot.c
-* \version 1.40.1
+* \version 1.50
*
* \brief
* This file provides the source code for the memory-level APIs of the SMIF driver.
@@ -66,10 +66,15 @@ extern "C" {
#define INSTRUCTION_NOT_SUPPORTED (0XFFU) /* The code for the not supported instruction */
#define BASIC_SPI_ID_LSB (0X00UL) /* The JEDEC SFDP Basic SPI Flash Parameter ID LSB */
#define BASIC_SPI_ID_MSB (0XFFUL) /* The JEDEC SFDP Basic SPI Flash Parameter ID MSB */
+#define SECTOR_MAP_ID_LSB (0x81UL) /* The JEDEC SFDP Sector Map ID LSB */
+#define SECTOR_MAP_ID_MSB (0xFFUL) /* The JEDEC SFDP Sector Map ID MSB */
+#define SECTOR_MAP_DESCRIPTOR_MASK (0x2U) /* The mask for the type bit of the Sector Map descriptor */
+#define SECTOR_MAP_COMAND_DESCRIPTOR_TYPE (0U) /* Code for the command descriptor type */
+#define SECTOR_MAP_REGION_SIZE_MULTIPLIER (256UL) /* The multiplier for region size units */
#define FOUR_BYTE_ADDR_ID_LSB (0X84UL) /* The 4-byte Address Instruction Table is assigned the ID LSB of 84h */
#define FOUR_BYTE_ADDR_ID_MSB (0XFFUL) /* The 4-byte Address Instruction Table is assigned the ID MSB of FFh */
-#define FOUR_BYTE_ADDR_ERASE_TYPE_1 (0X4UL) /* The Erase Type 1 offset in 4-byte Address Instruction Table */
-#define FOUR_BYTE_ADDR_ERASE_TYPE_4 (0X7UL) /* The Erase Type 4 offset in 4-byte Address Instruction Table */
+#define FOUR_BYTE_ADDR_ERASE_TYPE_1 (0X4UL) /* The Erase Type 1 offset in 4-byte Address Instruction Table */
+#define FOUR_BYTE_ADDR_ERASE_TYPE_4 (0X7UL) /* The Erase Type 4 offset in 4-byte Address Instruction Table */
#define ERASE_T_COUNT_Pos (0UL) /* Erase Type X Erase, Typical time: count (Bits 4:0) */
#define ERASE_T_COUNT_Msk (0x1FUL) /* Erase Type X Erase, Typical time: count (Bitfield-Mask) */
#define ERASE_T_UNITS_Pos (5UL) /* Erase Type X Erase, Typical time: units (Bits 6:5) */
@@ -178,6 +183,21 @@ typedef enum
/** \endcond*/
+/***************************************
+* Internal Structures
+***************************************/
+
+/**
+* This internal structure is used to store data for erase types.
+*/
+typedef struct
+{
+ uint8_t eraseCmd; /**< The instruction used for erase transaction*/
+ uint32_t eraseSize; /**< The number of bytes to be erased at one erase transaction*/
+ uint32_t eraseTime; /**< The maximum erase time for one erase transaction */
+} cy_stc_smif_erase_type_t;
+
+
/***************************************
* Internal Function Prototypes
***************************************/
@@ -214,7 +234,7 @@ static void SfdpGetReadFourBytesCmd(uint8_t const sfdpBuffer[],
cy_en_smif_protocol_mode_t protocolMode,
cy_stc_smif_mem_cmd_t* cmdRead);
static uint32_t SfdpGetPageSize(uint8_t const sfdpBuffer[]);
-static uint32_t SfdpGetEraseTime(uint32_t const eraseOffset, uint8_t const sfdpBuffer[]);
+static uint32_t SfdpGetEraseTime(uint32_t const eraseOffset, uint8_t const sfdpBuffer[], cy_stc_smif_erase_type_t eraseType[]);
static uint32_t SfdpGetChipEraseTime(uint8_t const sfdpBuffer[]);
static uint32_t SfdpGetPageProgramTime(uint8_t const sfdpBuffer[]);
static void SfdpSetWriteEnableCommand(cy_stc_smif_mem_cmd_t* cmdWriteEnable);
@@ -230,11 +250,25 @@ static void SfdpGetQuadEnableParameters(cy_stc_smif_mem_device_cfg_t *device,
uint8_t const sfdpBuffer[]);
static void SfdpSetChipEraseCommand(cy_stc_smif_mem_cmd_t* cmdChipErase);
static uint32_t SfdpGetSectorEraseCommand(cy_stc_smif_mem_device_cfg_t *device,
- uint8_t const sfdpBuffer[]);
+ uint8_t const sfdpBuffer[],
+ cy_stc_smif_erase_type_t eraseTypeStc[]);
+static cy_en_smif_status_t ReadAnyReg(SMIF_Type *base, cy_en_smif_slave_select_t slaveSelect,
+ uint8_t *value, uint8_t command, uint8_t const *address,
+ uint32_t addressSize, cy_stc_smif_context_t const *context);
+static cy_en_smif_status_t SfdpEnterFourByteAddressing(SMIF_Type *base, uint8_t entryMethodByte,
+ cy_stc_smif_mem_device_cfg_t *device,
+ cy_en_smif_slave_select_t slaveSelect,
+ cy_stc_smif_context_t const *context);
+static void SfdpGetEraseSizeAndCmd(uint8_t const sfdpBuffer[], cy_stc_smif_erase_type_t eraseType[]);
+static cy_en_smif_status_t SfdpPopulateRegionInfo(SMIF_Type *base, uint8_t const sectorMapBuff[],
+ uint32_t const buffLength, cy_stc_smif_mem_device_cfg_t *device,
+ cy_en_smif_slave_select_t slaveSelect, const cy_stc_smif_context_t *context,
+ cy_stc_smif_erase_type_t eraseType[]);
static void SfdpSetWipStatusRegisterCommand(cy_stc_smif_mem_cmd_t* readStsRegWipCmd);
static cy_en_smif_status_t PollTransferStatus(SMIF_Type const *base, cy_en_smif_txfr_status_t transferStatus,
cy_stc_smif_context_t const *context);
static void ValueToByteArray(uint32_t value, uint8_t *byteArray, uint32_t startPos, uint32_t size);
+static uint32_t ByteArrayToValue(uint8_t const *byteArray, uint32_t size);
/*******************************************************************************
* Function Name: Cy_SMIF_MemInit
@@ -269,7 +303,10 @@ static void ValueToByteArray(uint32_t value, uint8_t *byteArray, uint32_t startP
* mapped into the PSoC memory map. \ref cy_stc_smif_mem_config_t
*
* \param context
-* The SMIF internal context structure of the block.
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return The memory slot initialization status.
* - \ref CY_SMIF_SUCCESS
@@ -496,7 +533,10 @@ void Cy_SMIF_MemDeInit(SMIF_Type *base)
* The device to which the command is sent.
*
* \param context
-* The internal SMIF context data. \ref cy_stc_smif_context_t
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return A status of the command transmission.
* - \ref CY_SMIF_SUCCESS
@@ -523,7 +563,7 @@ cy_en_smif_status_t Cy_SMIF_MemCmdWriteEnable(SMIF_Type *base,
memDevice->slaveSelect,
CY_SMIF_TX_LAST_BYTE,
context);
- }
+ }
return result;
}
@@ -546,7 +586,10 @@ cy_en_smif_status_t Cy_SMIF_MemCmdWriteEnable(SMIF_Type *base,
* The device to which the command is sent.
*
* \param context
-* The internal SMIF context data. \ref cy_stc_smif_context_t
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return A status of the command transmission.
* - \ref CY_SMIF_SUCCESS
@@ -597,7 +640,10 @@ cy_en_smif_status_t Cy_SMIF_MemCmdWriteDisable(SMIF_Type *base,
* The device to which the command is sent.
*
* \param context
-* The internal SMIF context data.
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return A status of the memory device.
* - True - The device is busy or a timeout occurs.
@@ -647,7 +693,10 @@ bool Cy_SMIF_MemIsBusy(SMIF_Type *base, cy_stc_smif_mem_config_t const *memDevic
* The device to which the command is sent.
*
* \param context
-* The internal SMIF context data.
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return A status of the command.
* - \ref CY_SMIF_SUCCESS
@@ -750,7 +799,10 @@ cy_en_smif_status_t Cy_SMIF_MemQuadEnable(SMIF_Type *base,
* The command required to read the status/configuration register.
*
* \param context
-* The internal SMIF context data.
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return A status of the command reception.
* - \ref CY_SMIF_SUCCESS
@@ -809,7 +861,10 @@ cy_en_smif_status_t Cy_SMIF_MemCmdReadStatus(SMIF_Type *base,
* The command to write into the status/configuration register.
*
* \param context
-* The internal SMIF context data. \ref cy_stc_smif_context_t
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return A status of the command transmission.
* - \ref CY_SMIF_SUCCESS
@@ -863,7 +918,10 @@ cy_en_smif_status_t Cy_SMIF_MemCmdWriteStatus(SMIF_Type *base,
* The device to which the command is sent
*
* \param context
-* The internal SMIF context data. \ref cy_stc_smif_context_t
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return A status of the command transmission.
* - \ref CY_SMIF_SUCCESS
@@ -911,7 +969,10 @@ cy_en_smif_status_t Cy_SMIF_MemCmdChipErase(SMIF_Type *base,
* The sector address to erase.
*
* \param context
-* The internal SMIF context data. \ref cy_stc_smif_context_t
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return A status of the command transmission.
* - \ref CY_SMIF_SUCCESS
@@ -927,15 +988,21 @@ cy_en_smif_status_t Cy_SMIF_MemCmdSectorErase(SMIF_Type *base,
{
cy_en_smif_status_t result = CY_SMIF_BAD_PARAM;
+ CY_ASSERT_L1(NULL != memDevice);
+
if (NULL != sectorAddr)
{
-
cy_stc_smif_mem_device_cfg_t *device = memDevice->deviceCfg;
cy_stc_smif_mem_cmd_t *cmdErase = device->eraseCmd;
-
- if ((NULL != cmdErase) && (CY_SMIF_WIDTH_NA != cmdErase->cmdWidth))
+ cy_stc_smif_hybrid_region_info_t* hybrInfo = NULL;
+
+ result = Cy_SMIF_MemLocateHybridRegion(memDevice, &hybrInfo,
+ ByteArrayToValue(sectorAddr, device->numOfAddrBytes));
+
+ if ((NULL != cmdErase) && (CY_SMIF_WIDTH_NA != cmdErase->cmdWidth) && (result != CY_SMIF_BAD_PARAM))
{
- result = Cy_SMIF_TransmitCommand( base, (uint8_t)cmdErase->command,
+ uint8_t eraseCommand = (uint8_t)((result == CY_SMIF_SUCCESS) ? (hybrInfo->eraseCmd) : (cmdErase->command));
+ result = Cy_SMIF_TransmitCommand( base, eraseCommand,
cmdErase->cmdWidth, sectorAddr, device->numOfAddrBytes,
cmdErase->cmdWidth, memDevice->slaveSelect,
CY_SMIF_TX_LAST_BYTE, context);
@@ -987,7 +1054,10 @@ cy_en_smif_status_t Cy_SMIF_MemCmdSectorErase(SMIF_Type *base,
* as no callback.
*
* \param context
-* The internal SMIF context data.
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return A status of a transmission.
* - \ref CY_SMIF_SUCCESS
@@ -1092,7 +1162,10 @@ cy_en_smif_status_t Cy_SMIF_MemCmdProgram(SMIF_Type *base,
* as no callback.
*
* \param context
-* The internal SMIF context data.
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return A status of the transmission.
* - \ref CY_SMIF_SUCCESS
@@ -1160,6 +1233,72 @@ cy_en_smif_status_t Cy_SMIF_MemCmdRead(SMIF_Type *base,
}
+/*******************************************************************************
+* Function Name: Cy_SMIF_MemLocateHybridRegion
+****************************************************************************//**
+*
+* This function locates the region structure by the address which belongs to it.
+*
+* \note This function is valid for the memories with hybrid sectors.
+*
+* \param memDevice
+* The memory device configuration.
+*
+* \param regionInfo
+* Places a hybrid region configuration structure that contains the region
+* specific parameters. See \ref cy_stc_smif_hybrid_region_info_t for
+* reference.
+*
+* \param address
+* The address for which a region is searched.
+*
+* \return A status of the region location.
+* - \ref CY_SMIF_SUCCESS
+* - \ref CY_SMIF_NOT_HYBRID_MEM
+* - \ref CY_SMIF_BAD_PARAM
+*
+* \funcusage
+* \snippet smif/snippet/main.c snippet_Cy_SMIF_MemLocateHybridRegion
+*
+*******************************************************************************/
+cy_en_smif_status_t Cy_SMIF_MemLocateHybridRegion(cy_stc_smif_mem_config_t const *memDevice,
+ cy_stc_smif_hybrid_region_info_t** regionInfo,
+ uint32_t address)
+{
+ cy_en_smif_status_t result = CY_SMIF_BAD_PARAM;
+ cy_stc_smif_hybrid_region_info_t* currInfo = NULL;
+ CY_ASSERT_L1(NULL != memDevice);
+ cy_stc_smif_mem_device_cfg_t *device = memDevice->deviceCfg;
+
+ /* Check if the address exceeds the memory size */
+ if(address <= device->memSize)
+ {
+ result = CY_SMIF_NOT_HYBRID_MEM;
+ /* Check if the memory is hybrid */
+ if(NULL != device->hybridRegionInfo)
+ {
+ uint32_t idx;
+ uint32_t regionStartAddr;
+ uint32_t regionEndAddr;
+ for(idx = 0UL; idx < device->hybridRegionCount; idx++)
+ {
+ currInfo = device->hybridRegionInfo[idx];
+ regionStartAddr = currInfo->regionAddress;
+ regionEndAddr = regionStartAddr + (currInfo->sectorsCount * currInfo->eraseSize);
+ if ((address >= regionStartAddr) && (address < regionEndAddr))
+ {
+ *regionInfo = currInfo;
+ result = CY_SMIF_SUCCESS;
+ break;
+ }
+ }
+ }
+ }
+
+ return result;
+}
+
+
/*******************************************************************************
* Function Name: SfdpReadBuffer
****************************************************************************//**
@@ -1192,7 +1331,10 @@ cy_en_smif_status_t Cy_SMIF_MemCmdRead(SMIF_Type *base,
* The pointer to an array with the SDFP buffer.
*
* \param context
-* Internal SMIF context data.
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return A status of the transmission.
* - \ref CY_SMIF_SUCCESS
@@ -1828,48 +1970,53 @@ static uint32_t SfdpGetPageSize(uint8_t const sfdpBuffer[])
* \param sfdpBuffer
* The pointer to an array with the SDFP buffer.
*
-* \return Erase time in us.
+* \param eraseTypeTime
+* The pointer to an array with the erase time in us for different erase types.
+*
+* \return Default erase time in us.
*
*******************************************************************************/
-static uint32_t SfdpGetEraseTime(uint32_t const eraseOffset, uint8_t const sfdpBuffer[])
+static uint32_t SfdpGetEraseTime(uint32_t const eraseOffset, uint8_t const sfdpBuffer[], cy_stc_smif_erase_type_t eraseType[])
{
/* Get the value of 10th DWORD from the JEDEC basic flash parameter table */
uint32_t readEraseTime = ((uint32_t*)sfdpBuffer)[CY_SMIF_JEDEC_BFPT_10TH_DWORD];
- uint32_t eraseTimeMax;
- uint32_t eraseTimeIndex = (((eraseOffset - CY_SMIF_SFDP_BFPT_BYTE_1D) + TYPE_STEP) / TYPE_STEP);
- uint32_t eraseUnits = _FLD2VAL(ERASE_T_UNITS,
- (readEraseTime >> ((eraseTimeIndex - 1UL) * ERASE_T_LENGTH))
- >> ERASE_T_COUNT_OFFSET);
- uint32_t eraseCount = _FLD2VAL(ERASE_T_COUNT,
- (readEraseTime >> ((eraseTimeIndex - 1UL) * ERASE_T_LENGTH))
- >> ERASE_T_COUNT_OFFSET);
+ uint32_t eraseTimeDefaultIndex = (((eraseOffset - CY_SMIF_SFDP_BFPT_BYTE_1D) + TYPE_STEP) / TYPE_STEP);
uint32_t eraseMul = _FLD2VAL(CY_SMIF_SFDP_ERASE_MUL_COUNT, readEraseTime);
+ uint32_t eraseUnits = 0UL;
+ uint32_t eraseCount = 0UL;
uint32_t eraseMs = 0UL;
+ uint32_t eraseTypeTypicalTime;
- switch (eraseUnits)
- {
- case CY_SMIF_SFDP_UNIT_0:
- eraseMs = CY_SMIF_SFDP_ERASE_TIME_1MS;
- break;
- case CY_SMIF_SFDP_UNIT_1:
- eraseMs = CY_SMIF_SFDP_ERASE_TIME_16MS;
- break;
- case CY_SMIF_SFDP_UNIT_2:
- eraseMs = CY_SMIF_SFDP_ERASE_TIME_128MS;
- break;
- case CY_SMIF_SFDP_UNIT_3:
- eraseMs = CY_SMIF_SFDP_ERASE_TIME_1S;
- break;
- default:
- /* An unsupported SFDP value */
- break;
+ for (uint32_t idx = 0UL; idx < ERASE_TYPE_COUNT; idx++){
+ eraseTypeTypicalTime = (readEraseTime >> (idx * ERASE_T_LENGTH))>> ERASE_T_COUNT_OFFSET;
+ eraseUnits = _FLD2VAL(ERASE_T_UNITS, eraseTypeTypicalTime);
+ eraseCount = _FLD2VAL(ERASE_T_COUNT, eraseTypeTypicalTime);
+
+ switch (eraseUnits)
+ {
+ case CY_SMIF_SFDP_UNIT_0:
+ eraseMs = CY_SMIF_SFDP_ERASE_TIME_1MS;
+ break;
+ case CY_SMIF_SFDP_UNIT_1:
+ eraseMs = CY_SMIF_SFDP_ERASE_TIME_16MS;
+ break;
+ case CY_SMIF_SFDP_UNIT_2:
+ eraseMs = CY_SMIF_SFDP_ERASE_TIME_128MS;
+ break;
+ case CY_SMIF_SFDP_UNIT_3:
+ eraseMs = CY_SMIF_SFDP_ERASE_TIME_1S;
+ break;
+ default:
+ /* An unsupported SFDP value */
+ break;
+ }
+
+ /* Convert typical time to max time */
+ eraseType[idx].eraseTime = ((eraseCount + 1UL) * eraseMs) * (2UL * (eraseMul + 1UL));
}
- /* Convert typical time to max time */
- eraseTimeMax = ((eraseCount + 1UL) * eraseMs) * (2UL * (eraseMul + 1UL));
-
- return(eraseTimeMax);
+ return(eraseType[eraseTimeDefaultIndex - 1UL].eraseTime);
}
@@ -2328,12 +2475,16 @@ static void SfdpSetChipEraseCommand(cy_stc_smif_mem_cmd_t* cmdChipErase)
* \param sfdpBuffer
* The pointer to an array with the SDFP buffer.
*
+* \param eraseTypeCmd
+* The pointer to an array with the erase commands for different erase types.
+*
* \return The offset of the Sector Erase command in the SFDP buffer.
* Returns 0 when the Sector Erase command is not found.
*
*******************************************************************************/
static uint32_t SfdpGetSectorEraseCommand(cy_stc_smif_mem_device_cfg_t *device,
- uint8_t const sfdpBuffer[])
+ uint8_t const sfdpBuffer[],
+ cy_stc_smif_erase_type_t eraseTypeStc[])
{
uint32_t eraseOffset;
if (FOUR_BYTE_ADDRESS == device->numOfAddrBytes)
@@ -2364,6 +2515,11 @@ static uint32_t SfdpGetSectorEraseCommand(cy_stc_smif_mem_device_cfg_t *device,
/* Calculate the offset for the sector Erase command in the 4-byte Address Instruction Table, DWORD 2 */
eraseOffset = FOUR_BYTE_ADDR_ERASE_TYPE_1 + eraseType;
+ /* Update all erase commands for 4-bytes*/
+ for(uint32_t i = 0UL; i< ERASE_TYPE_COUNT; i++)
+ {
+ eraseTypeStc[i].eraseCmd = sfdpBuffer[FOUR_BYTE_ADDR_ERASE_TYPE_1 + i];
+ }
/* Get the sector Erase command
* from the 4-byte Address Instruction Table, DWORD 2
*/
@@ -2413,6 +2569,371 @@ static uint32_t SfdpGetSectorEraseCommand(cy_stc_smif_mem_device_cfg_t *device,
}
+/*******************************************************************************
+* Function Name: ReadAnyReg
+****************************************************************************//**
+*
+* This function reads any registers by address. This function is a blocking
+* function, it will block the execution flow until the status register is read.
+*
+* \param base
+* Holds the base address of the SMIF block registers.
+*
+* \param slaveSelect
+* The slave select line for the device.
+*
+* \param value
+* The value of the register.
+*
+* \param command
+* The command required to read the status/configuration register.
+*
+* \param address
+* The register address array.
+*
+* \param addressSize
+* The size of the address array.
+*
+* \param context
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
+*
+* \return A status of the command reception.
+* - \ref CY_SMIF_SUCCESS
+* - \ref CY_SMIF_CMD_FIFO_FULL
+* - \ref CY_SMIF_EXCEED_TIMEOUT
+* - \ref CY_SMIF_CMD_NOT_FOUND
+*
+*******************************************************************************/
+static cy_en_smif_status_t ReadAnyReg(SMIF_Type *base,
+ cy_en_smif_slave_select_t slaveSelect,
+ uint8_t *value,
+ uint8_t command,
+ uint8_t const *address,
+ uint32_t addressSize,
+ cy_stc_smif_context_t const *context)
+{
+ cy_en_smif_status_t result = CY_SMIF_CMD_NOT_FOUND;
+
+ /* Read the memory register */
+ result = Cy_SMIF_TransmitCommand(base, command, CY_SMIF_WIDTH_SINGLE,
+ address, addressSize,
+ CY_SMIF_WIDTH_SINGLE, slaveSelect,
+ CY_SMIF_TX_NOT_LAST_BYTE, context);
+
+ if (CY_SMIF_SUCCESS == result)
+ {
+ result = Cy_SMIF_ReceiveDataBlocking( base, value,
+ CY_SMIF_READ_ONE_BYTE, CY_SMIF_WIDTH_SINGLE, context);
+ }
+
+ return(result);
+}
+
+
+/*******************************************************************************
+* Function Name: SfdpEnterFourByteAddressing
+****************************************************************************//**
+*
+* This function sets 4-byte address mode for a memory device as defined in
+* 16th DWORD of JEDEC Basic Flash Parameter Table.
+*
+* \note The entry methods which do not support the required
+* operation of writing into the register.
+*
+* \param base
+* Holds the base address of the SMIF block registers.
+*
+* \param entryMethodByte
+* The byte which defines the supported method to enter 4-byte addressing mode.
+*
+* \param device
+* The device structure instance declared by the user. This is where the detected
+* parameters are stored and returned.
+*
+* \param slaveSelect
+* The slave select line for the device.
+*
+* \param context
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
+*
+* \return A status of 4-byte addressing mode command transmit.
+* - \ref CY_SMIF_SUCCESS
+* - \ref CY_SMIF_EXCEED_TIMEOUT
+* - \ref CY_SMIF_CMD_NOT_FOUND
+*******************************************************************************/
+static cy_en_smif_status_t SfdpEnterFourByteAddressing(SMIF_Type *base, uint8_t entryMethodByte,
+ cy_stc_smif_mem_device_cfg_t *device,
+ cy_en_smif_slave_select_t slaveSelect,
+ cy_stc_smif_context_t const *context)
+{
+ cy_en_smif_status_t result = CY_SMIF_CMD_NOT_FOUND;
+ if ((entryMethodByte & CY_SMIF_SFDP_ENTER_4_BYTE_METHOD_ALWAYS_4_BYTE) != 0U)
+ {
+ /* Memory always operates in 4-byte mode */
+ result = CY_SMIF_SUCCESS;
+ }
+ if ((entryMethodByte & CY_SMIF_SFDP_ENTER_4_BYTE_METHOD_B7) != 0U)
+ {
+ if ((entryMethodByte & CY_SMIF_SFDP_ENTER_4_BYTE_METHOD_WR_EN_B7) != 0U)
+ {
+ /* To enter a 4-byte addressing write enable is required */
+ cy_stc_smif_mem_cmd_t* writeEn = device->writeEnCmd;
+ if(NULL != writeEn)
+ {
+ result = Cy_SMIF_TransmitCommand(base,
+ (uint8_t) writeEn->command,
+ writeEn->cmdWidth,
+ CY_SMIF_CMD_WITHOUT_PARAM,
+ CY_SMIF_CMD_WITHOUT_PARAM,
+ CY_SMIF_WIDTH_NA,
+ slaveSelect,
+ CY_SMIF_TX_LAST_BYTE,
+ context);
+ }
+ }
+ if ((CY_SMIF_CMD_NOT_FOUND == result) || (CY_SMIF_SUCCESS == result))
+ {
+ /* To enter a 4-byte addressing B7 instruction is required*/
+ result = Cy_SMIF_TransmitCommand(base,
+ CY_SMIF_SFDP_ENTER_4_BYTE_METHOD_B7_CMD,
+ CY_SMIF_WIDTH_SINGLE,
+ CY_SMIF_CMD_WITHOUT_PARAM,
+ CY_SMIF_CMD_WITHOUT_PARAM,
+ CY_SMIF_WIDTH_NA,
+ slaveSelect,
+ CY_SMIF_TX_LAST_BYTE,
+ context);
+ }
+ }
+
+ return result;
+}
+
+
+/*******************************************************************************
+* Function Name: SfdpGetEraseSizeAndCmd
+****************************************************************************//**
+*
+* Fills arrays with an erase size and cmd for all erase types.
+*
+* \param sfdpBuffer
+* The pointer to an array with the Basic Flash Parameter table buffer.
+*
+* \param eraseTypeCmd
+* The pointer to an array with the erase commands for all erase types.
+*
+* \param eraseTypeSize
+* The pointer to an array with the erase size for all erase types.
+*
+*******************************************************************************/
+static void SfdpGetEraseSizeAndCmd(uint8_t const sfdpBuffer[],
+ cy_stc_smif_erase_type_t eraseType[])
+{
+ uint32_t idx = 0UL;
+ for (uint32_t currET = 0UL; currET < ERASE_TYPE_COUNT; currET++)
+ {
+ /* The erase size in the SFDP buffer defined as power of two */
+ eraseType[currET].eraseSize = 1UL << sfdpBuffer[CY_SMIF_SFDP_BFPT_BYTE_1C + idx];
+ eraseType[currET].eraseCmd = sfdpBuffer[CY_SMIF_SFDP_BFPT_BYTE_1D + idx];
+ idx += TYPE_STEP;
+ }
+}
+
+
+/*******************************************************************************
+* Function Name: SfdpPopulateRegionInfo
+****************************************************************************//**
+*
+* Reads the current configuration for regions and populates regionInfo
+* structures.
+*
+* \param base
+* Holds the base address of the SMIF block registers.
+*
+* \param sectorMapBuff
+* The pointer to an array with the Sector Map Parameter Table buffer.
+*
+* \param device
+* The device structure instance declared by the user. This is where the detected
+* parameters are stored and returned.
+*
+* \param slaveSelect
+* The slave select line for the device.
+*
+* \param context
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
+*
+* \param eraseTypeSize
+* The pointer to an array with the erase size for all erase types.
+*
+* \param eraseTypeCmd
+* The pointer to an array with the erase commands for all erase types.
+*
+* \param eraseTypeTime
+* The pointer to an array with the erase time for all erase types.
+*
+* \return A status of the Sector Map Parameter Table parsing.
+* - \ref CY_SMIF_SUCCESS
+* - \ref CY_SMIF_SFDP_CORRUPTED_TABLE
+* - \ref CY_SMIF_NOT_HYBRID_MEM
+*
+*******************************************************************************/
+static cy_en_smif_status_t SfdpPopulateRegionInfo(SMIF_Type *base,
+ uint8_t const sectorMapBuff[],
+ uint32_t const buffLength,
+ cy_stc_smif_mem_device_cfg_t *device,
+ cy_en_smif_slave_select_t slaveSelect,
+ const cy_stc_smif_context_t *context,
+ cy_stc_smif_erase_type_t eraseType[])
+{
+ uint8_t currCmd;
+ uint8_t regMask;
+ uint8_t regValue;
+ uint8_t currRegisterAddr[ERASE_TYPE_COUNT] = {0U};
+ uint8_t regionInfoIdx = 0U;
+ uint32_t currTableIdx = 0UL;
+ uint32_t addrBytesNum = 0UL;
+ uint32_t addrCode = 0UL;
+ cy_en_smif_status_t result = CY_SMIF_NOT_HYBRID_MEM;
+
+ /* Loop across all command descriptors to find current configuration */
+ while(SECTOR_MAP_COMAND_DESCRIPTOR_TYPE == (sectorMapBuff[currTableIdx] & SECTOR_MAP_DESCRIPTOR_MASK))
+ {
+ currCmd = sectorMapBuff[currTableIdx + CY_SMIF_SFDP_SECTOR_MAP_CMD_OFFSET];
+ regMask = sectorMapBuff[currTableIdx + CY_SMIF_SFDP_SECTOR_MAP_REG_MSK_OFFSET];
+ regValue = 0U;
+
+ /* Get the address length for configuration detection */
+ addrCode = _FLD2VAL(CY_SMIF_SFDP_SECTOR_MAP_ADDR_BYTES, sectorMapBuff[currTableIdx + CY_SMIF_SFDP_SECTOR_MAP_ADDR_CODE_OFFSET]);
+ switch(addrCode)
+ {
+ case CY_SMIF_SFDP_THREE_BYTES_ADDR_CODE:
+ /* No address cycle */
+ addrBytesNum = 0UL;
+ break;
+ case CY_SMIF_SFDP_THREE_OR_FOUR_BYTES_ADDR_CODE:
+ addrBytesNum = CY_SMIF_THREE_BYTES_ADDR;
+ break;
+ case CY_SMIF_SFDP_FOUR_BYTES_ADDR_CODE:
+ addrBytesNum = CY_SMIF_FOUR_BYTES_ADDR;
+ break;
+ default:
+ /* Use the current settings */
+ addrBytesNum = device->numOfAddrBytes;
+ break;
+ }
+
+ /* Get the control register address */
+ for(uint32_t i = 0UL; i < addrBytesNum; i++)
+ {
+ /* Offset for control register in SFDP has little-endian byte order, need to swap it */
+ currRegisterAddr[i] = sectorMapBuff[(currTableIdx + CY_SMIF_SFDP_SECTOR_MAP_REG_ADDR_OFFSET + addrBytesNum) - i - 1UL];
+ }
+
+ /* Read the value of the register for the current configuration detection*/
+ result = ReadAnyReg(base, slaveSelect, ®Value, currCmd, &currRegisterAddr[0], addrBytesNum, context);
+
+ if (CY_SMIF_SUCCESS == result)
+ {
+ /* Set the bit of the region idx to 1 if the config matches */
+ regionInfoIdx = ((uint8_t)(regionInfoIdx << 1U)) | (((regValue & regMask) == 0U)?(0U):(1U));
+ }
+
+ currTableIdx += HEADER_LENGTH;
+ if (currTableIdx > buffLength)
+ {
+ result = CY_SMIF_SFDP_CORRUPTED_TABLE;
+ break;
+ }
+ }
+
+ if (CY_SMIF_SUCCESS == result)
+ {
+ /* Find the matching configuration map descriptor */
+ while(regionInfoIdx != sectorMapBuff[currTableIdx + 1UL])
+ {
+ /* Increment the table index to the next map */
+ currTableIdx += (sectorMapBuff[currTableIdx + CY_SMIF_SFDP_SECTOR_MAP_CONFIG_ID_OFFSET] + 2UL) * BYTES_IN_DWORD;
+ if (currTableIdx > buffLength)
+ {
+ result = CY_SMIF_SFDP_CORRUPTED_TABLE;
+ break;
+ }
+ }
+ }
+
+ if (CY_SMIF_SUCCESS == result)
+ {
+ /* Populate region data from the sector map */
+ uint8_t numOfRegions = sectorMapBuff[currTableIdx + CY_SMIF_SFDP_SECTOR_MAP_REGION_COUNT_OFFSET] + 1U;
+ device->hybridRegionCount = (uint32_t) numOfRegions;
+
+ if(numOfRegions <= 1U)
+ {
+ result = CY_SMIF_NOT_HYBRID_MEM;
+ }
+ else
+ {
+ uint8_t eraseTypeCode;
+ uint32_t currRegionAddr = 0UL;
+ uint32_t regionSize = 0UL;
+ uint8_t supportedEraseType;
+ uint8_t eraseTypeMask;
+ cy_stc_smif_hybrid_region_info_t *currRegionPtr;
+ for(uint8_t currRegion = 0U; currRegion< numOfRegions; currRegion++)
+ {
+ currRegionAddr = currRegionAddr + regionSize;
+ currTableIdx += BYTES_IN_DWORD;
+
+ supportedEraseType = 0U;
+ eraseTypeMask = 1U;
+ eraseTypeCode = sectorMapBuff[currTableIdx] & CY_SMIF_SFDP_SECTOR_MAP_SUPPORTED_ET_MASK;
+ while(0U == (eraseTypeCode & eraseTypeMask))
+ {
+ /* Erase type number defined as a bit position */
+ eraseTypeMask = eraseTypeMask << 1;
+ supportedEraseType++;
+ if(supportedEraseType > ERASE_TYPE_COUNT)
+ {
+ result = CY_SMIF_SFDP_CORRUPTED_TABLE;
+ break;
+ }
+ }
+
+ /* The region size as a zero-based count of 256 byte units */
+ regionSize = ((*( (uint32_t*) §orMapBuff[currTableIdx]) >> BITS_IN_BYTE) + 1UL) * SECTOR_MAP_REGION_SIZE_MULTIPLIER;
+ currRegionPtr = device->hybridRegionInfo[currRegion];
+
+ currRegionPtr->regionAddress = currRegionAddr;
+ currRegionPtr->eraseCmd = (uint32_t)eraseType[supportedEraseType].eraseCmd;
+ currRegionPtr->eraseTime = eraseType[supportedEraseType].eraseTime;
+ if(regionSize < eraseType[supportedEraseType].eraseSize)
+ {
+ /* One region with a single sector */
+ currRegionPtr->eraseSize = regionSize;
+ currRegionPtr->sectorsCount = 1UL;
+ }
+ else
+ {
+ currRegionPtr->eraseSize = eraseType[supportedEraseType].eraseSize;
+ currRegionPtr->sectorsCount = regionSize / eraseType[supportedEraseType].eraseSize;
+ }
+ }
+ }
+ }
+ return result;
+}
+
+
/*******************************************************************************
* Function Name: Cy_SMIF_MemSfdpDetect
****************************************************************************//**
@@ -2457,7 +2978,10 @@ static uint32_t SfdpGetSectorEraseCommand(cy_stc_smif_mem_device_cfg_t *device,
* The data line selection options for a slave device.
*
* \param context
-* Internal SMIF context data.
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return A status of the transmission.
* - \ref CY_SMIF_SUCCESS
@@ -2478,8 +3002,10 @@ cy_en_smif_status_t Cy_SMIF_MemSfdpDetect(SMIF_Type *base,
uint8_t sfdpBuffer[CY_SMIF_SFDP_LENGTH];
uint8_t sfdpAddress[CY_SMIF_SFDP_ADDRESS_LENGTH] = {0x00U, 0x00U, 0x00U};
uint8_t addr4ByteAddress[CY_SMIF_SFDP_ADDRESS_LENGTH] = {0x00U, 0x00U, 0x00U};
+ uint8_t sectorMapAddr[CY_SMIF_SFDP_ADDRESS_LENGTH] = {0x00U, 0x00U, 0x00U};
cy_en_smif_status_t result = CY_SMIF_NO_SFDP_SUPPORT;
cy_stc_smif_mem_cmd_t *cmdSfdp = device->readSfdpCmd;
+ cy_stc_smif_erase_type_t eraseType[ERASE_TYPE_COUNT];
/* Initialize the SFDP buffer */
for (uint32_t i = 0U; i < CY_SMIF_SFDP_LENGTH; i++)
@@ -2522,11 +3048,21 @@ cy_en_smif_status_t Cy_SMIF_MemSfdpDetect(SMIF_Type *base,
uint32_t id = (FOUR_BYTE_ADDR_ID_MSB << BITS_IN_BYTE) | FOUR_BYTE_ADDR_ID_LSB;
uint32_t addr4ByteTableLength = 0UL;
result = SfdpFindParameterTableAddress(id, sfdpBuffer, addr4ByteAddress, &addr4ByteTableLength);
-
+
+ /* Find the Sector Map Parameter Header */
+ id = (SECTOR_MAP_ID_MSB << BITS_IN_BYTE) | SECTOR_MAP_ID_LSB;
+ uint32_t sectorMapTableLength = 0UL;
+ result = SfdpFindParameterTableAddress(id, sfdpBuffer, sectorMapAddr, §orMapTableLength);
+ if (CY_SMIF_CMD_NOT_FOUND == result)
+ {
+ device->hybridRegionCount = 0UL;
+ device->hybridRegionInfo = NULL;
+ }
+
/* Find the JEDEC SFDP Basic SPI Flash Parameter Header */
id = (BASIC_SPI_ID_MSB << BITS_IN_BYTE) | BASIC_SPI_ID_LSB;
uint32_t basicSpiTableLength = 0UL;
- result = SfdpFindParameterTableAddress(id, sfdpBuffer, sfdpAddress, &basicSpiTableLength);
+ result = SfdpFindParameterTableAddress(id, sfdpBuffer, sfdpAddress, &basicSpiTableLength);
if (CY_SMIF_SUCCESS == result)
{
@@ -2536,10 +3072,10 @@ cy_en_smif_status_t Cy_SMIF_MemSfdpDetect(SMIF_Type *base,
CY_ASSERT_L1(NULL != device->eraseCmd);
CY_ASSERT_L1(NULL != device->chipEraseCmd);
CY_ASSERT_L1(NULL != device->programCmd);
- CY_ASSERT_L1(NULL != device->readStsRegWipCmd);
+ CY_ASSERT_L1(NULL != device->readStsRegWipCmd);
/* Get the JEDEC basic flash parameter table content into sfdpBuffer[] */
- result = SfdpReadBuffer(base,
+ result = SfdpReadBuffer(base,
cmdSfdp,
sfdpAddress,
slaveSelect,
@@ -2547,24 +3083,27 @@ cy_en_smif_status_t Cy_SMIF_MemSfdpDetect(SMIF_Type *base,
sfdpBuffer,
context);
+ /* The erase size and erase time for all 4 erase types */
+ SfdpGetEraseSizeAndCmd(sfdpBuffer, eraseType);
+
/* The number of address bytes used by the memory slave device */
device->numOfAddrBytes = SfdpGetNumOfAddrBytes(sfdpBuffer);
/* The external memory size */
device->memSize = SfdpGetMemoryDensity(sfdpBuffer);
-
+
/* The page size */
device->programSize = SfdpGetPageSize(sfdpBuffer);
/* The Write Enable command */
- SfdpSetWriteEnableCommand(device->writeEnCmd);
+ SfdpSetWriteEnableCommand(device->writeEnCmd);
/* The Write Disable command */
SfdpSetWriteDisableCommand(device->writeDisCmd);
/* The busy mask for the status registers */
device->stsRegBusyMask = CY_SMIF_STATUS_REG_BUSY_MASK;
-
+
/* The command to read the WIP-containing status register */
SfdpSetWipStatusRegisterCommand(device->readStsRegWipCmd);
@@ -2573,13 +3112,13 @@ cy_en_smif_status_t Cy_SMIF_MemSfdpDetect(SMIF_Type *base,
/* Chip Erase command */
SfdpSetChipEraseCommand(device->chipEraseCmd);
-
+
/* Chip Erase Time */
device->chipEraseTime = SfdpGetChipEraseTime(sfdpBuffer);
/* Page Program Time */
device->programTime = SfdpGetPageProgramTime(sfdpBuffer);
-
+
/* The Read command for 3-byte addressing. The preference order quad > dual > single SPI */
cy_stc_smif_mem_cmd_t *cmdRead = device->readCmd;
cy_en_smif_protocol_mode_t pMode = SfdpGetReadCmdParams(sfdpBuffer, dataSelect, cmdRead);
@@ -2588,11 +3127,15 @@ cy_en_smif_status_t Cy_SMIF_MemSfdpDetect(SMIF_Type *base,
uint32_t eraseTypeOffset = 1UL;
if (FOUR_BYTE_ADDRESS == device->numOfAddrBytes)
{
- /* Get the JEDEC 4-byte Address Instruction Table content into sfdpBuffer[] */
+ /* Enter 4-byte addressing mode */
+ result = SfdpEnterFourByteAddressing(base, sfdpBuffer[CY_SMIF_SFDP_BFPT_BYTE_3C], device, slaveSelect, context);
uint8_t fourByteAddressBuffer[CY_SMIF_SFDP_LENGTH];
- result = SfdpReadBuffer(base, cmdSfdp, addr4ByteAddress, slaveSelect,
- addr4ByteTableLength, fourByteAddressBuffer, context);
-
+ if (CY_SMIF_SUCCESS == result)
+ {
+ /* Get the JEDEC 4-byte Address Instruction Table content into sfdpBuffer[] */
+ result = SfdpReadBuffer(base, cmdSfdp, addr4ByteAddress, slaveSelect,
+ addr4ByteTableLength, fourByteAddressBuffer, context);
+ }
if (CY_SMIF_SUCCESS == result)
{
/* Rewrite the Read command instruction for 4-byte addressing mode */
@@ -2601,8 +3144,8 @@ cy_en_smif_status_t Cy_SMIF_MemSfdpDetect(SMIF_Type *base,
/* Get the Program command instruction for 4-byte addressing mode */
SfdpGetProgramFourBytesCmd(fourByteAddressBuffer, pMode, device->programCmd);
- /* Find the sector Erase command type with 4-byte addressing */
- eraseTypeOffset = SfdpGetSectorEraseCommand(device, fourByteAddressBuffer);
+ /* Find the sector Erase command type with 4-byte addressing */
+ eraseTypeOffset = SfdpGetSectorEraseCommand(device, fourByteAddressBuffer, eraseType);
}
}
else
@@ -2611,7 +3154,7 @@ cy_en_smif_status_t Cy_SMIF_MemSfdpDetect(SMIF_Type *base,
SfdpSetProgramCommand_1_1_1(device->programCmd);
/* Find the sector Erase command type with 3-byte addressing */
- eraseTypeOffset = SfdpGetSectorEraseCommand(device, sfdpBuffer);
+ eraseTypeOffset = SfdpGetSectorEraseCommand(device, sfdpBuffer, eraseType);
}
if (COMMAND_IS_NOT_FOUND != eraseTypeOffset)
@@ -2620,7 +3163,24 @@ cy_en_smif_status_t Cy_SMIF_MemSfdpDetect(SMIF_Type *base,
device->eraseSize = 0x01UL << sfdpBuffer[eraseTypeOffset - 1UL];
/* Erase Time Type (from the JEDEC basic flash parameter table) */
- device->eraseTime = SfdpGetEraseTime(eraseTypeOffset, sfdpBuffer);
+ device->eraseTime = SfdpGetEraseTime(eraseTypeOffset, sfdpBuffer, eraseType);
+ }
+
+ if (NULL != device->hybridRegionInfo)
+ {
+ /* Get the Sector Map Parameter Table into sfdpBuffer[] */
+ result = SfdpReadBuffer(base, cmdSfdp, sectorMapAddr, slaveSelect,
+ sectorMapTableLength, sfdpBuffer, context);
+ if (CY_SMIF_SUCCESS == result)
+ {
+ result = SfdpPopulateRegionInfo(base, sfdpBuffer, sectorMapTableLength, device, slaveSelect, context, eraseType);
+ if(result == CY_SMIF_NOT_HYBRID_MEM)
+ {
+ device->hybridRegionCount = 0UL;
+ device->hybridRegionInfo = NULL;
+ result = CY_SMIF_SUCCESS;
+ }
+ }
}
}
}
@@ -2653,8 +3213,10 @@ cy_en_smif_status_t Cy_SMIF_MemSfdpDetect(SMIF_Type *base,
* The timeout value in microseconds to apply while polling the memory.
*
* \param context
-* Passes a configuration structure that contains the transfer parameters of the
-* SMIF block.
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return The status of the operation.
* \ref CY_SMIF_SUCCESS - Memory is ready to accept new commands.
@@ -2721,8 +3283,10 @@ cy_en_smif_status_t Cy_SMIF_MemIsReady(SMIF_Type *base, cy_stc_smif_mem_config_t
* CY_SMIF_SUCCESS.
*
* \param context
-* Passes a configuration structure that contains the transfer parameters of the
-* SMIF block.
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return The status of the operation. See \ref cy_en_smif_status_t.
*
@@ -2771,8 +3335,10 @@ cy_en_smif_status_t Cy_SMIF_MemIsQuadEnabled(SMIF_Type *base, cy_stc_smif_mem_co
* The timeout value in microseconds to apply while polling the memory.
*
* \param context
-* Passes a configuration structure that contains the transfer parameters of the
-* SMIF block.
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return The status of the operation. See \ref cy_en_smif_status_t.
*
@@ -2821,8 +3387,10 @@ cy_en_smif_status_t Cy_SMIF_MemEnableQuadMode(SMIF_Type *base, cy_stc_smif_mem_c
* Transfer status value to be checked.
*
* \param context
-* Passes a configuration structure that contains the transfer parameters of the
-* SMIF block.
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return The status of the operation.
* \ref CY_SMIF_SUCCESS - SMIF block has completed the transfer
@@ -2881,6 +3449,36 @@ static void ValueToByteArray(uint32_t value, uint8_t *byteArray, uint32_t startP
}
+/*******************************************************************************
+* Function Name: ByteArrayToValue
+****************************************************************************//**
+*
+* Packs the byte array into a single value.
+*
+* \param byteArray
+* The byte array to unpack.
+*
+* \param size
+* The size of the array.
+*
+* \return
+* The 4-byte value filled from the array.
+*
+*
+*******************************************************************************/
+static uint32_t ByteArrayToValue(uint8_t const *byteArray, uint32_t size)
+{
+ uint32_t value = 0UL;
+ uint32_t idx = 0UL;
+ for (idx = 0UL; idx < size; idx++)
+ {
+ value <<= 8;
+ value |= ((uint32_t) byteArray[idx]);
+ }
+ return value;
+}
+
+
/*******************************************************************************
* Function Name: Cy_SMIF_MemRead
****************************************************************************//**
@@ -2906,8 +3504,10 @@ static void ValueToByteArray(uint32_t value, uint8_t *byteArray, uint32_t startP
* The size of data to read.
*
* \param context
-* Passes a configuration structure that contains the transfer parameters of the
-* SMIF block.
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return The status of the operation. See \ref cy_en_smif_status_t.
*
@@ -2986,8 +3586,10 @@ cy_en_smif_status_t Cy_SMIF_MemRead(SMIF_Type *base, cy_stc_smif_mem_config_t co
* The size of data to write.
*
* \param context
-* Passes a configuration structure that contains the transfer parameters of the
-* SMIF block.
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return The status of the operation. See \ref cy_en_smif_status_t.
*
@@ -3084,67 +3686,120 @@ cy_en_smif_status_t Cy_SMIF_MemWrite(SMIF_Type *base, cy_stc_smif_mem_config_t c
* The size of data to erase.
*
* \param context
-* Passes a configuration structure that contains the transfer parameters of the
-* SMIF block.
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return The status of the operation. See \ref cy_en_smif_status_t.
*
+* \note The address should be aligned with the start address of the sector. \n
+* The length should be equal to the sum of all erased sectors.
+*
* \funcusage
* \snippet smif/snippet/main.c snippet_Cy_SMIF_MemEraseSector
*
*******************************************************************************/
-cy_en_smif_status_t Cy_SMIF_MemEraseSector(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig,
- uint32_t address, uint32_t length,
+cy_en_smif_status_t Cy_SMIF_MemEraseSector(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig,
+ uint32_t address, uint32_t length,
cy_stc_smif_context_t const *context)
{
cy_en_smif_status_t status = CY_SMIF_BAD_PARAM;
- uint32_t offset = 0UL;
- uint32_t chunk = 0UL;
+ uint32_t endAddress = address + length;
+ uint32_t eraseEnd = 0UL;
+ uint32_t hybridRegionStart = 0UL;
uint8_t addrArray[CY_SMIF_FOUR_BYTES_ADDR] = {0U};
+ cy_stc_smif_hybrid_region_info_t* hybrInfo = NULL;
CY_ASSERT_L1(NULL != memConfig);
- uint32_t eraseSectorSize = memConfig->deviceCfg->eraseSize;
+ cy_stc_smif_mem_device_cfg_t *device = memConfig->deviceCfg;
+ uint32_t eraseSectorSize = device->eraseSize;
+ uint32_t maxEraseTime = device->eraseTime;
- if(((address + length) <= memConfig->deviceCfg->memSize) && /* Check if the address exceeds the memory size */
- (0UL == (address % eraseSectorSize)) && /* Check if the start address and the sector size are aligned */
- (0UL == ((address + length) % eraseSectorSize))) /* Check if the end address and the sector size are aligned */
+ /* In case of hybrid memory - update sector size and offset for first sector */
+ status = Cy_SMIF_MemLocateHybridRegion(memConfig, &hybrInfo, address);
+ if (CY_SMIF_SUCCESS == status)
{
- while(length > 0UL)
- {
- /* Get the number of bytes which can be erase during one operation */
- offset = address % eraseSectorSize;
- chunk = ((offset + length) < eraseSectorSize) ? length : (eraseSectorSize - offset);
+ hybridRegionStart = hybrInfo->regionAddress;
+ eraseSectorSize = hybrInfo->eraseSize;
+ eraseEnd = (hybrInfo->sectorsCount * eraseSectorSize) + hybridRegionStart;
+ }
- /* The Write Enable bit may be cleared by the memory after every successful
- * operation of write/erase operations. Therefore, it must be set for
- * every loop.
- */
- status = Cy_SMIF_MemCmdWriteEnable(base, memConfig, context);
+ /* Check if the end address not equal to start address */
+ if(length == 0UL)
+ {
+ status = CY_SMIF_BAD_PARAM;
+ }
- if(CY_SMIF_SUCCESS == status)
+ /* Check if the start address and the sector size are aligned */
+ if((0UL == ((address - hybridRegionStart) % eraseSectorSize)) && (status != CY_SMIF_BAD_PARAM))
+ {
+ /* If the memory is hybrid and there is more than one region to
+ * erase - update the sector size and offset for the last sector */
+ if(endAddress < eraseEnd)
+ {
+ status = Cy_SMIF_MemLocateHybridRegion(memConfig, &hybrInfo, (endAddress - 1UL));
+ if (CY_SMIF_SUCCESS == status)
{
- ValueToByteArray(address, &addrArray[0], 0UL,
- memConfig->deviceCfg->numOfAddrBytes);
+ hybridRegionStart = hybrInfo->regionAddress;
+ eraseSectorSize = hybrInfo->eraseSize;
+ }
+ }
- /* Send the command to erase one sector */
- status = Cy_SMIF_MemCmdSectorErase(base, (cy_stc_smif_mem_config_t* )memConfig,
- (const uint8_t *)addrArray, context);
+ /* Check if the end address and the sector size are aligned */
+ if((0UL == ((endAddress - hybridRegionStart) % eraseSectorSize)) && (status != CY_SMIF_BAD_PARAM))
+ {
+ while(length > 0UL)
+ {
+ /* In case of hybrid memory - update erase size and time for current region */
+ status = Cy_SMIF_MemLocateHybridRegion(memConfig, &hybrInfo, address);
+ if (CY_SMIF_SUCCESS == status)
+ {
+ maxEraseTime = hybrInfo->eraseTime;
+ eraseSectorSize = hybrInfo->eraseSize;
+ hybridRegionStart = hybrInfo->regionAddress;
+ eraseEnd = (hybrInfo->sectorsCount * eraseSectorSize) + hybridRegionStart;
+ if(endAddress < eraseEnd)
+ {
+ eraseEnd = endAddress;
+ }
+ }
+ else
+ {
+ eraseEnd = endAddress;
+ }
- if(CY_SMIF_SUCCESS == status)
+ while (address < eraseEnd)
{
- /* Wait until the erase operation is completed or a timeout occurs. eraseTime is in milliseconds */
- status = Cy_SMIF_MemIsReady(base, memConfig,
- (memConfig->deviceCfg->eraseTime * ONE_MILLI_IN_MICRO), context);
+ /* The Write Enable bit may be cleared by the memory after every successful
+ * operation of write/erase operations. Therefore, it must be set for
+ * every loop.
+ */
+ status = Cy_SMIF_MemCmdWriteEnable(base, memConfig, context);
+ if(CY_SMIF_SUCCESS == status)
+ {
+ ValueToByteArray(address, &addrArray[0], 0UL, device->numOfAddrBytes);
+
+ /* Send the command to erase one sector */
+ status = Cy_SMIF_MemCmdSectorErase(base, (cy_stc_smif_mem_config_t* )memConfig,
+ (const uint8_t *)addrArray, context);
+ if(CY_SMIF_SUCCESS == status)
+ {
+ /* Wait until the erase operation is completed or a timeout occurs.
+ * Note: eraseTime is in milliseconds */
+ status = Cy_SMIF_MemIsReady(base, memConfig, (maxEraseTime * ONE_MILLI_IN_MICRO), context);
- /* Recalculate the next sector address offset */
- address += chunk;
- length -= chunk;
+ /* Recalculate the next sector address offset */
+ address += eraseSectorSize;
+ length -= eraseSectorSize;
+ }
+ }
+
+ if(CY_SMIF_SUCCESS != status)
+ {
+ break;
+ }
}
}
-
- if(CY_SMIF_SUCCESS != status)
- {
- break;
- }
}
}
@@ -3167,8 +3822,10 @@ cy_en_smif_status_t Cy_SMIF_MemEraseSector(SMIF_Type *base, cy_stc_smif_mem_conf
* The memory device configuration.
*
* \param context
-* Passes a configuration structure that contains the transfer parameters of the
-* SMIF block.
+* This is the pointer to the context structure \ref cy_stc_smif_context_t
+* allocated by the user. The structure is used during the SMIF
+* operation for internal configuration and data retention. The user must not
+* modify anything in this structure.
*
* \return The status of the operation. See \ref cy_en_smif_status_t.
*
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_sysclk.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_sysclk.c
index 73688148e58..e1c6b4de03a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_sysclk.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_sysclk.c
@@ -1,12 +1,12 @@
/***************************************************************************//**
* \file cy_sysclk.c
-* \version 1.50
+* \version 1.60
*
* Provides an API implementation of the sysclk driver.
*
********************************************************************************
* \copyright
-* Copyright 2016-2019 Cypress Semiconductor Corporation
+* Copyright 2016-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -63,6 +63,25 @@ void Cy_SysClk_ExtClkSetFrequency(uint32_t freq)
extFreq = freq;
}
}
+
+
+/*******************************************************************************
+* Function Name: Cy_SysClk_ExtClkGetFrequency
+****************************************************************************//**
+*
+* Returns the frequency of the External Clock Source (EXTCLK) from the
+* internal storage.
+*
+* \return The frequency of the External Clock Source.
+*
+* \funcusage
+* \snippet sysclk/snippet/main.c snippet_Cy_SysClk_ExtClkSetFrequency
+*
+*******************************************************************************/
+uint32_t Cy_SysClk_ExtClkGetFrequency(void)
+{
+ return (extFreq);
+}
/** \} group_sysclk_ext_funcs */
@@ -280,6 +299,27 @@ cy_en_sysclk_status_t Cy_SysClk_EcoEnable(uint32_t timeoutus)
return (retVal);
}
+
+
+/*******************************************************************************
+* Function Name: Cy_SysClk_EcoGetFrequency
+****************************************************************************//**
+*
+* Returns the frequency of the external crystal oscillator (ECO).
+*
+* \return The frequency of the ECO.
+*
+* \note If the ECO is not enabled or stable - a zero is returned.
+*
+* \funcusage
+* \snippet sysclk/snippet/main.c snippet_Cy_SysClk_EcoEnable
+*
+*******************************************************************************/
+uint32_t Cy_SysClk_EcoGetFrequency(void)
+{
+ return ((CY_SYSCLK_ECOSTAT_STABLE == Cy_SysClk_EcoGetStatus()) ? ecoFreq : 0UL);
+}
+
/** \} group_sysclk_eco_funcs */
@@ -372,6 +412,131 @@ cy_en_clkpath_in_sources_t Cy_SysClk_ClkPathGetSource(uint32_t clkPath)
}
return (retVal);
}
+
+
+/*******************************************************************************
+* Function Name: Cy_SysClk_ClkPathMuxGetFrequency
+****************************************************************************//**
+*
+* Returns the output frequency of the clock path mux.
+*
+* \return The output frequency of the path mux.
+*
+* \note If the return value equals zero, that means either:
+* - the selected path mux source signal frequency is unknown (e.g. dsi_out, etc.) or
+* - the selected path mux source is not configured/enabled/stable (e.g. ECO, EXTCLK, etc.).
+*
+* \funcusage
+* \snippet sysclk/snippet/main.c snippet_Cy_SysClk_ClkPathSetSource
+*
+*******************************************************************************/
+uint32_t Cy_SysClk_ClkPathMuxGetFrequency(uint32_t clkPath)
+{
+ CY_ASSERT_L1(clkPath < CY_SRSS_NUM_CLKPATH);
+
+ uint32_t freq = 0UL; /* The path mux output frequency in Hz, 0 = an unknown frequency */
+
+ /* Get the frequency of the source, i.e., the path mux input */
+ switch(Cy_SysClk_ClkPathGetSource(clkPath))
+ {
+ case CY_SYSCLK_CLKPATH_IN_IMO: /* The IMO frequency is fixed at 8 MHz */
+ freq = CY_SYSCLK_IMO_FREQ;
+ break;
+
+ case CY_SYSCLK_CLKPATH_IN_EXT:
+ freq = Cy_SysClk_ExtClkGetFrequency();
+ break;
+
+ case CY_SYSCLK_CLKPATH_IN_ECO:
+ freq = Cy_SysClk_EcoGetFrequency();
+ break;
+
+ case CY_SYSCLK_CLKPATH_IN_ALTHF:
+ freq = Cy_SysClk_AltHfGetFrequency();
+ break;
+
+ case CY_SYSCLK_CLKPATH_IN_ILO:
+ freq = (0UL != (SRSS_CLK_ILO_CONFIG & SRSS_CLK_ILO_CONFIG_ENABLE_Msk)) ? CY_SYSCLK_ILO_FREQ : 0UL;
+ break;
+
+ case CY_SYSCLK_CLKPATH_IN_WCO:
+ freq = (Cy_SysClk_WcoOkay()) ? CY_SYSCLK_WCO_FREQ : 0UL;
+ break;
+
+ case CY_SYSCLK_CLKPATH_IN_PILO:
+ freq = (0UL != (SRSS_CLK_PILO_CONFIG & SRSS_CLK_PILO_CONFIG_PILO_EN_Msk)) ? CY_SYSCLK_PILO_FREQ : 0UL;
+ break;
+
+ case CY_SYSCLK_CLKPATH_IN_ALTLF:
+ freq = Cy_SysClk_AltLfGetFrequency();
+ break;
+
+ default:
+ /* Don't know the frequency of dsi_out, leave freq = 0UL */
+ break;
+ }
+
+ return (freq);
+}
+
+
+/*******************************************************************************
+* Function Name: Cy_SysClk_ClkPathGetFrequency
+****************************************************************************//**
+*
+* Returns the output frequency of the clock path mux.
+*
+* \return The output frequency of the path mux.
+*
+* \note If the return value equals zero, that means either:
+* - the selected path mux source signal frequency is unknown (e.g. dsi_out, etc.) or
+* - the selected path mux source is not configured/enabled/stable (e.g. ECO, EXTCLK, etc.).
+*
+* \funcusage
+* \snippet sysclk/snippet/main.c snippet_Cy_SysClk_FllEnable
+*
+*******************************************************************************/
+uint32_t Cy_SysClk_ClkPathGetFrequency(uint32_t clkPath)
+{
+ CY_ASSERT_L1(clkPath < CY_SRSS_NUM_CLKPATH);
+
+ uint32_t freq = Cy_SysClk_ClkPathMuxGetFrequency(clkPath);
+ uint32_t fDiv = 0UL; /* FLL/PLL multiplier/feedback divider */
+ uint32_t rDiv = 0UL; /* FLL/PLL reference divider */
+ uint32_t oDiv = 0UL; /* FLL/PLL output divider */
+ bool enabled = false; /* FLL or PLL enable status; n/a for direct */
+
+ if (clkPath == (uint32_t)CY_SYSCLK_CLKHF_IN_CLKPATH0) /* FLL? (always path 0) */
+ {
+ cy_stc_fll_manual_config_t fllCfg = {0UL,0U,CY_SYSCLK_FLL_CCO_RANGE0,false,0U,0U,0U,0U,CY_SYSCLK_FLLPLL_OUTPUT_AUTO,0U};
+ Cy_SysClk_FllGetConfiguration(&fllCfg);
+ enabled = (Cy_SysClk_FllIsEnabled()) && (CY_SYSCLK_FLLPLL_OUTPUT_INPUT != fllCfg.outputMode);
+ fDiv = fllCfg.fllMult;
+ rDiv = fllCfg.refDiv;
+ oDiv = (fllCfg.enableOutputDiv) ? 2UL : 1UL;
+ }
+ else if (clkPath <= CY_SRSS_NUM_PLL) /* PLL? (always path 1...N)*/
+ {
+ cy_stc_pll_manual_config_t pllcfg = {0U,0U,0U,false,CY_SYSCLK_FLLPLL_OUTPUT_AUTO};
+ (void)Cy_SysClk_PllGetConfiguration(clkPath, &pllcfg);
+ enabled = (Cy_SysClk_PllIsEnabled(clkPath)) && (CY_SYSCLK_FLLPLL_OUTPUT_INPUT != pllcfg.outputMode);
+ fDiv = pllcfg.feedbackDiv;
+ rDiv = pllcfg.referenceDiv;
+ oDiv = pllcfg.outputDiv;
+ }
+ else
+ {
+ /* Do nothing with the path mux frequency */
+ }
+
+ if (enabled) /* If FLL or PLL is enabled and not bypassed */
+ {
+ freq = (uint32_t)CY_SYSLIB_DIV_ROUND(((uint64_t)freq * (uint64_t)fDiv),
+ ((uint64_t)rDiv * (uint64_t)oDiv));
+ }
+
+ return (freq);
+}
/** \} group_sysclk_path_src_funcs */
@@ -1816,82 +1981,9 @@ cy_en_syspm_status_t Cy_SysClk_DeepSleepCallback(cy_stc_syspm_callback_params_t
uint32_t Cy_SysClk_ClkHfGetFrequency(uint32_t clkHf)
{
/* variables holding intermediate clock frequencies, dividers and FLL/PLL settings */
- bool enabled = false; /* FLL or PLL enable status; n/a for direct */
- uint32_t freq = 0UL; /* path (FLL, PLL, or direct) frequency, in Hz, 0 = unknown frequency */
- uint32_t fDiv = 0UL; /* FLL/PLL multiplier/feedback divider */
- uint32_t rDiv = 0UL; /* FLL/PLL reference divider */
- uint32_t oDiv = 0UL; /* FLL/PLL output divider */
uint32_t pDiv = 1UL << (uint32_t)Cy_SysClk_ClkHfGetDivider(clkHf); /* root prescaler (1/2/4/8) */
uint32_t path = (uint32_t) Cy_SysClk_ClkHfGetSource(clkHf); /* path input for root 0 (clkHf[0]) */
- cy_en_clkpath_in_sources_t source = Cy_SysClk_ClkPathGetSource((uint32_t)path); /* source input for path (FLL, PLL, or direct) */
-
- /* get the frequency of the source, i.e., the path mux input */
- switch(source)
- {
- case CY_SYSCLK_CLKPATH_IN_IMO: /* IMO frequency is fixed at 8 MHz */
- freq = CY_SYSCLK_IMO_FREQ;
- break;
-
- case CY_SYSCLK_CLKPATH_IN_EXT:
- freq = extFreq;
- break;
-
- case CY_SYSCLK_CLKPATH_IN_ECO:
- freq = (CY_SYSCLK_ECOSTAT_STABLE == Cy_SysClk_EcoGetStatus()) ? ecoFreq : 0UL;
- break;
-
- #if defined(CY_IP_MXBLESS)
- case CY_SYSCLK_CLKPATH_IN_ALTHF:
- freq = cy_BleEcoClockFreqHz;
- break;
- #endif /* CY_IP_MXBLESS */
-
- case CY_SYSCLK_CLKPATH_IN_ILO:
- freq = (0UL != (SRSS_CLK_ILO_CONFIG & SRSS_CLK_ILO_CONFIG_ENABLE_Msk)) ? CY_SYSCLK_ILO_FREQ : 0UL;
- break;
-
- case CY_SYSCLK_CLKPATH_IN_WCO:
- freq = (Cy_SysClk_WcoOkay()) ? CY_SYSCLK_WCO_FREQ : 0UL;
- break;
-
- case CY_SYSCLK_CLKPATH_IN_PILO:
- freq = (0UL != (SRSS_CLK_PILO_CONFIG & SRSS_CLK_PILO_CONFIG_PILO_EN_Msk)) ? CY_SYSCLK_PILO_FREQ : 0UL;
- break;
-
- default:
- /* don't know the frequency of dsi_out, or clk_altlf */
- freq = 0UL; /* unknown frequency */
- break;
- }
-
- if (path == (uint32_t)CY_SYSCLK_CLKHF_IN_CLKPATH0) /* FLL? (always path 0) */
- {
- cy_stc_fll_manual_config_t fllCfg = {0UL,0U,CY_SYSCLK_FLL_CCO_RANGE0,false,0U,0U,0U,0U,CY_SYSCLK_FLLPLL_OUTPUT_AUTO,0U};
- Cy_SysClk_FllGetConfiguration(&fllCfg);
- enabled = (Cy_SysClk_FllIsEnabled()) && (CY_SYSCLK_FLLPLL_OUTPUT_INPUT != fllCfg.outputMode);
- fDiv = fllCfg.fllMult;
- rDiv = fllCfg.refDiv;
- oDiv = (fllCfg.enableOutputDiv) ? 2UL : 1UL;
- }
- else if (path <= CY_SRSS_NUM_PLL) /* PLL? (always path 1...N)*/
- {
- cy_stc_pll_manual_config_t pllcfg = {0U,0U,0U,false,CY_SYSCLK_FLLPLL_OUTPUT_AUTO};
- (void)Cy_SysClk_PllGetConfiguration(path, &pllcfg);
- enabled = (Cy_SysClk_PllIsEnabled(path)) && (CY_SYSCLK_FLLPLL_OUTPUT_INPUT != pllcfg.outputMode);
- fDiv = pllcfg.feedbackDiv;
- rDiv = pllcfg.referenceDiv;
- oDiv = pllcfg.outputDiv;
- }
- else
- {
- /* Direct select path */
- }
-
- if (enabled) /* if FLL or PLL enabled and not bypassed */
- {
- freq = (uint32_t)CY_SYSLIB_DIV_ROUND(((uint64_t)freq * (uint64_t)fDiv),
- ((uint64_t)rDiv * (uint64_t)oDiv));
- }
+ uint32_t freq = Cy_SysClk_ClkPathGetFrequency(path);
/* Divide the path input frequency down and return the result */
return (CY_SYSLIB_DIV_ROUND(freq, pDiv));
@@ -1900,7 +1992,6 @@ uint32_t Cy_SysClk_ClkHfGetFrequency(uint32_t clkHf)
/** \} group_sysclk_clk_hf_funcs */
-
/* ========================================================================== */
/* ===================== clk_peripherals SECTION ====================== */
/* ========================================================================== */
@@ -1971,4 +2062,63 @@ uint32_t Cy_SysClk_PeriphGetFrequency(cy_en_divider_types_t dividerType, uint32_
/** \} group_sysclk_clk_peripheral_funcs */
+/**
+* \addtogroup group_sysclk_clk_timer_funcs
+* \{
+*/
+
+
+/*******************************************************************************
+* Function Name: Cy_SysClk_ClkTimerGetFrequency
+****************************************************************************//**
+*
+* Reports the frequency of the timer clock (clk_timer).
+* \note If the the timer clock is not enabled - a zero frequency is reported.
+*
+* \funcusage
+* \snippet sysclk/snippet/main.c snippet_Cy_SysClk_ClkTimerEnable
+*
+*******************************************************************************/
+uint32_t Cy_SysClk_ClkTimerGetFrequency(void)
+{
+ uint32_t freq = 0UL;
+
+ if (Cy_SysClk_ClkTimerIsEnabled())
+ {
+ freq = Cy_SysClk_ClkHfGetFrequency(0UL);
+
+ switch (Cy_SysClk_ClkTimerGetSource())
+ {
+ case CY_SYSCLK_CLKTIMER_IN_IMO:
+ freq = CY_SYSCLK_IMO_FREQ;
+ break;
+
+ case CY_SYSCLK_CLKTIMER_IN_HF0_NODIV:
+ break;
+
+ case CY_SYSCLK_CLKTIMER_IN_HF0_DIV2:
+ freq /= 2UL;
+ break;
+
+ case CY_SYSCLK_CLKTIMER_IN_HF0_DIV4:
+ freq /= 4UL;
+ break;
+
+ case CY_SYSCLK_CLKTIMER_IN_HF0_DIV8:
+ freq /= 8UL;
+ break;
+
+ default:
+ freq = 0UL;
+ break;
+ }
+ }
+
+ /* Divide the input frequency down and return the result */
+ return (CY_SYSLIB_DIV_ROUND(freq, 1UL + (uint32_t)Cy_SysClk_ClkTimerGetDivider()));
+}
+
+/** \} group_sysclk_clk_timer_funcs */
+
+
/* [] END OF FILE */
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_syslib.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_syslib.c
index f2a231fd48f..3121c7665b8 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_syslib.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_syslib.c
@@ -1,12 +1,12 @@
/***************************************************************************//**
* \file cy_syslib.c
-* \version 2.50
+* \version 2.50.1
*
* Description:
* Provides system API implementation for the SysLib driver.
*
********************************************************************************
-* Copyright 2016-2019 Cypress Semiconductor Corporation
+* Copyright 2016-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_syspm.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_syspm.c
index 828d53fcfc2..a2d7434da00 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_syspm.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_syspm.c
@@ -1,12 +1,12 @@
/***************************************************************************//**
* \file cy_syspm.c
-* \version 4.50
+* \version 5.0
*
* This driver provides the source code for API power management.
*
********************************************************************************
* \copyright
-* Copyright 2016-2019 Cypress Semiconductor Corporation
+* Copyright 2016-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -189,6 +189,9 @@ typedef void (*cy_cb_syspm_deep_sleep_t)(cy_en_syspm_waitfor_t waitFor, bool *wa
/* Mask for the RAM read assist bits */
#define CPUSS_TRIM_RAM_CTL_RA_MASK ((uint32_t) 0x3U << 8U)
+/* Mask for the RAM write check bits */
+#define CPUSS_TRIM_RAM_CTL_WC_MASK (0x3UL << 10U)
+
/* The define for SROM opcode to set the flash voltage bit */
#define FLASH_VOLTAGE_BIT_ULP_OPCODE (0x0C000003U)
@@ -1057,7 +1060,7 @@ he LP mode
* are registered.
*
* \return
-* - CY_SYSPM_SUCCESS - Entered the system LP mode.
+* - CY_SYSPM_SUCCESS - Entered the system LP mode or the device is already in LP mode.
* - CY_SYSPM_INVALID_STATE - The system LP mode was not set. The system LP mode
* was not set because the protection context value is higher than zero
* (PC > 0) or the device revision does not support modifying registers
@@ -1199,7 +1202,7 @@ cy_en_syspm_status_t Cy_SysPm_SystemEnterLp(void)
* are registered.
*
* \return
-* - CY_SYSPM_SUCCESS - Entered system ULP mode.
+* - CY_SYSPM_SUCCESS - Entered the system ULP mode or the device is already in ULP mode.
* - CY_SYSPM_INVALID_STATE - System ULP mode was not set. The ULP mode was not
* set because the protection context value is higher than zero (PC > 0) or the
* device revision does not support modifying registers (to enter system
@@ -1687,7 +1690,8 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource)
* See \ref cy_en_syspm_buck_voltage1_t.
*
* \return
-* - CY_SYSPM_SUCCESS - The voltage is set.
+* - CY_SYSPM_SUCCESS - The voltage is set as requested.
+* (There is no change if the new voltage is the same as the previous voltage.)
* - CY_SYSPM_INVALID_STATE - The voltage was not set. The voltage cannot be set
* because the protection context value is higher than zero (PC > 0) or the
* device revision does not support modifying registers via syscall.
@@ -3143,7 +3147,9 @@ static void SetWriteAssistTrimLp(void)
*******************************************************************************/
static bool IsVoltageChangePossible(void)
{
- bool retVal = true;
+ bool retVal = false;
+ uint32_t trimRamCheckVal = (CPUSS_TRIM_RAM_CTL & CPUSS_TRIM_RAM_CTL_WC_MASK);
+
if (Cy_SysLib_GetDevice() == CY_SYSLIB_DEVICE_PSOC6ABLE2)
{
@@ -3151,6 +3157,13 @@ static bool IsVoltageChangePossible(void)
retVal = ((Cy_SysLib_GetDeviceRevision() > SYSPM_DEVICE_PSOC6ABLE2_REV_0B) || (curProtContext == 0U));
}
+ else
+ {
+ CPUSS_TRIM_RAM_CTL &= ~CPUSS_TRIM_RAM_CTL_WC_MASK;
+ CPUSS_TRIM_RAM_CTL |= ((~trimRamCheckVal) & CPUSS_TRIM_RAM_CTL_WC_MASK);
+
+ retVal = (trimRamCheckVal != (CPUSS_TRIM_RAM_CTL & CPUSS_TRIM_RAM_CTL_WC_MASK));
+ }
return retVal;
}
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/.cymigration b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/.cymigration
index af97141caa6..e7a0834a726 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/.cymigration
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/.cymigration
@@ -61,7 +61,7 @@
-
+
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/canfd-1.0.cypersonality b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/canfd-1.0.cypersonality
index f0350f9baec..ef801e10d06 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/canfd-1.0.cypersonality
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/canfd-1.0.cypersonality
@@ -3,14 +3,14 @@
@@ -378,7 +381,7 @@ treated.">
((sfid2_10_9_SidFilter$idx << 9U) | sfid2_5_0_SidFilter$idx)}`U, \
.sfid1 = `${sfid1_SidFilter$idx}`U, \
.sfec = `${sfecSidFilter$idx}`, \
- .sft = `${sftSidFilter$idx}`, \
+ .sft = `${sftSidFilterVal$idx}`, \
}" />
((sfid2_10_9_SidFilter$idx << 9U) | sfid2_5_0_SidFilter$idx)}`U" />
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/connectivity_wifi-1.0.cypersonality b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/connectivity_wifi-1.0.cypersonality
index b6af7770d73..766a22504ef 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/connectivity_wifi-1.0.cypersonality
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/connectivity_wifi-1.0.cypersonality
@@ -3,14 +3,14 @@
+
@@ -296,8 +297,9 @@
-
-
+
+
+
@@ -335,7 +337,7 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/pdm_pcm-1.0.cypersonality b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/pdm_pcm-1.0.cypersonality
index 99503b3fd4d..754a0f6fa02 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/pdm_pcm-1.0.cypersonality
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/pdm_pcm-1.0.cypersonality
@@ -3,14 +3,14 @@
+
@@ -192,8 +193,9 @@
-
-
+
+
+
@@ -218,7 +220,7 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/seglcd-1.1.cypersonality b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/seglcd-1.1.cypersonality
index 2b6285774ee..8c5c631cca3 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/seglcd-1.1.cypersonality
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/seglcd-1.1.cypersonality
@@ -3,14 +3,14 @@
-
-
+
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/smif-1.1.cypersonality b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/smif-1.1.cypersonality
index 4eacb689b1e..9079ed46d1b 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/smif-1.1.cypersonality
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/smif-1.1.cypersonality
@@ -3,14 +3,14 @@
-
+
@@ -70,7 +70,7 @@
-
+
@@ -78,7 +78,7 @@
-
+
@@ -86,7 +86,7 @@
-
+
@@ -94,7 +94,7 @@
-
+
@@ -102,7 +102,7 @@
-
+
@@ -110,7 +110,7 @@
-
+
@@ -118,7 +118,7 @@
-
+
@@ -128,7 +128,7 @@
-
+
@@ -136,7 +136,7 @@
-
+
@@ -144,7 +144,7 @@
-
+
@@ -152,7 +152,7 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/platform/dma-1.0.cypersonality b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/platform/dma-1.0.cypersonality
index 14847f18b3a..4014dd92ec6 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/platform/dma-1.0.cypersonality
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/platform/dma-1.0.cypersonality
@@ -3,14 +3,14 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/platform/sysclock-1.2.cypersonality b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/platform/sysclock-1.2.cypersonality
index 4e4b6e146cf..66c39e46968 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/platform/sysclock-1.2.cypersonality
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/platform/sysclock-1.2.cypersonality
@@ -343,6 +343,7 @@
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/001-91989.revision b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/001-91989.revision
new file mode 100644
index 00000000000..b5f91032683
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/001-91989.revision
@@ -0,0 +1 @@
+CG
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/MXS40.revision b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/MXS40.revision
new file mode 100644
index 00000000000..3cafba36f13
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/MXS40.revision
@@ -0,0 +1 @@
+258628
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012C0WKWBG/base/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012C0WKWBG/base/view.xml
new file mode 100644
index 00000000000..3900a174c79
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012C0WKWBG/base/view.xml
@@ -0,0 +1,16 @@
+
+
+ 0x00000000
+ 0x000
+ 0
+ 0
+ CortexM4
+ Cypress
+ 0
+ 1310720
+ 251-WLCSP
+ 251
+ 3200
+ 4400
+ The CYW43012C0WKWBG device.
+
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012C0WKWBG/info.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012C0WKWBG/info.xml
new file mode 100644
index 00000000000..9203713583c
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012C0WKWBG/info.xml
@@ -0,0 +1,6 @@
+
+
+ CYW43012C0WKWBG
+ The CYW43012C0WKWBG devices
+ true
+
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012C0WKWBG/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012C0WKWBG/studio/presentation
new file mode 100644
index 00000000000..c4e820824c4
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012C0WKWBG/studio/presentation
@@ -0,0 +1,2 @@
+Connectivity
+43012
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012C0WKWBG/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012C0WKWBG/studio/view.xml
new file mode 100644
index 00000000000..6edfd810af3
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012C0WKWBG/studio/view.xml
@@ -0,0 +1,23 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0EKUBG/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0EKUBG/studio/presentation
index 3d4d778bec5..c4e820824c4 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0EKUBG/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0EKUBG/studio/presentation
@@ -1,2 +1,2 @@
-Connectivity
-43012
+Connectivity
+43012
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0KFFBH/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0KFFBH/studio/presentation
index 3d4d778bec5..c4e820824c4 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0KFFBH/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0KFFBH/studio/presentation
@@ -1,2 +1,2 @@
-Connectivity
-43012
+Connectivity
+43012
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012WKWBG/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012WKWBG/studio/presentation
index 3d4d778bec5..c4e820824c4 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012WKWBG/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012WKWBG/studio/presentation
@@ -1,2 +1,2 @@
-Connectivity
-43012
+Connectivity
+43012
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW43438KUBG/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW43438KUBG/studio/presentation
index 5ec34f1652b..8d1f11ae896 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW43438KUBG/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW43438KUBG/studio/presentation
@@ -1,2 +1,2 @@
-Connectivity
-43438
+Connectivity
+43438
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKUBG/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKUBG/studio/presentation
index ffe87890355..2dfac14f37b 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKUBG/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKUBG/studio/presentation
@@ -1,2 +1,2 @@
-Connectivity
-4343W
+Connectivity
+4343W
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKWBG/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKWBG/studio/presentation
index ffe87890355..2dfac14f37b 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKWBG/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKWBG/studio/presentation
@@ -1,2 +1,2 @@
-Connectivity
-4343W
+Connectivity
+4343W
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A256K/PSoC6A256K/base/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A256K/PSoC6A256K/base/view.xml
new file mode 100644
index 00000000000..1c0dee34624
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A256K/PSoC6A256K/base/view.xml
@@ -0,0 +1,16 @@
+
+
+ 0xFFFF
+ 0xFF
+ F
+ F
+ CortexM0p,CortexM4
+ Cypress
+ 262144
+ 131072
+ 68-QFN
+ 68
+ 1700
+ 3600
+ The PSoC6A256K device.
+
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A256K/PSoC6A256K/info.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A256K/PSoC6A256K/info.xml
new file mode 100644
index 00000000000..bd1a5977c8c
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A256K/PSoC6A256K/info.xml
@@ -0,0 +1,6 @@
+
+
+ PSoC6A256K
+ The PSoC6A256K devices
+ true
+
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A256K/info.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A256K/info.xml
new file mode 100644
index 00000000000..9b82c14cd4b
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A256K/info.xml
@@ -0,0 +1,5 @@
+
+
+ PSoC6A256K
+ The PSoC6A256K devices
+
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C6248AZI-S2D14/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C6248AZI-S2D14/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C6248AZI-S2D14/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C6248AZI-S2D14/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C6248AZI-S2D44/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C6248AZI-S2D44/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C6248AZI-S2D44/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C6248AZI-S2D44/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C6248BZI-S2D44/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C6248BZI-S2D44/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C6248BZI-S2D44/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C6248BZI-S2D44/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C6248FNI-S2D43/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C6248FNI-S2D43/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C6248FNI-S2D43/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C6248FNI-S2D43/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AAZI-D44/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AAZI-D44/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AAZI-D44/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AAZI-D44/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AAZI-S2D14/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AAZI-S2D14/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AAZI-S2D14/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AAZI-S2D14/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AAZI-S2D44/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AAZI-S2D44/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AAZI-S2D44/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AAZI-S2D44/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-D44/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-D44/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-D44/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-D44/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-S2D04/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-S2D04/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-S2D04/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-S2D04/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-S2D14/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-S2D14/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-S2D14/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-S2D14/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-S2D44/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-S2D44/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-S2D44/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-S2D44/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-S2D44A0/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-S2D44A0/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-S2D44A0/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ABZI-S2D44A0/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AFNI-D43/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AFNI-D43/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AFNI-D43/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AFNI-D43/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AFNI-S2D43/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AFNI-S2D43/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AFNI-S2D43/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624AFNI-S2D43/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ALQI-D42/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ALQI-D42/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ALQI-D42/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CY8C624ALQI-D42/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYB0644ABZI-S2D44/base/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYB0644ABZI-S2D44/base/view.xml
index 9e4a8b3ad5a..a4d7d4e022d 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYB0644ABZI-S2D44/base/view.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYB0644ABZI-S2D44/base/view.xml
@@ -1,9 +1,9 @@
- 0xE430
+ 0xE4700x1021
- 1
+ 2CortexM0p,CortexM4Cypress1900544
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYB0644ABZI-S2D44/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYB0644ABZI-S2D44/studio/presentation
index 6a8bdde3e3d..6cd221015f4 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYB0644ABZI-S2D44/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYB0644ABZI-S2D44/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 64
+PSoC 6
+PSoC 64
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYB0644ABZI-S2D44/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYB0644ABZI-S2D44/studio/view.xml
index 9b8bed892c9..d3c5001c8e2 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYB0644ABZI-S2D44/studio/view.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYB0644ABZI-S2D44/studio/view.xml
@@ -49,7 +49,7 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYS0644ABZI-S2D44/base/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYS0644ABZI-S2D44/base/view.xml
new file mode 100644
index 00000000000..229a90da03c
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYS0644ABZI-S2D44/base/view.xml
@@ -0,0 +1,16 @@
+
+
+ 0xE4A0
+ 0x102
+ 1
+ 2
+ CortexM0p,CortexM4
+ Cypress
+ 1900544
+ 1048576
+ 124-BGA
+ 124
+ 1700
+ 3600
+ The CYS0644ABZI-S2D44 device.
+
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYS0644ABZI-S2D44/info.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYS0644ABZI-S2D44/info.xml
new file mode 100644
index 00000000000..a89889b763a
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYS0644ABZI-S2D44/info.xml
@@ -0,0 +1,6 @@
+
+
+ CYS0644ABZI-S2D44
+ The CYS0644ABZI-S2D44 devices
+ true
+
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYS0644ABZI-S2D44/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYS0644ABZI-S2D44/studio/presentation
new file mode 100644
index 00000000000..6cd221015f4
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYS0644ABZI-S2D44/studio/presentation
@@ -0,0 +1,2 @@
+PSoC 6
+PSoC 64
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYS0644ABZI-S2D44/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYS0644ABZI-S2D44/studio/view.xml
new file mode 100644
index 00000000000..1ca4a73beca
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYS0644ABZI-S2D44/studio/view.xml
@@ -0,0 +1,59 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/studio/clocks.cysem b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/studio/clocks.cysem
index 44caf60459c..25ec63fbdb3 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/studio/clocks.cysem
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/studio/clocks.cysem
@@ -468,7 +468,7 @@
2
- Watch Crystal Oscillator: This source is driven from an off-chip watch crystal that provides an extremely accurate source. This clock is stopped in the hibernate power mode.
+ Watch Crystal Oscillator: This source is driven from an off-chip watch crystal that provides an extremely accurate source. This clock runs in hibernate power mode.
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D02/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D02/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D02/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D02/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D12/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D12/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D12/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D12/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D42/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D42/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D42/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D42/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D62/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D62/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D62/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D62/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D72/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D72/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D72/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245AZI-S3D72/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D11/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D11/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D11/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D11/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D11/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D11/studio/view.xml
index 37705405931..f99a653de31 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D11/studio/view.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D11/studio/view.xml
@@ -33,7 +33,7 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D41/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D41/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D41/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D41/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D41/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D41/studio/view.xml
index a3fb55c953d..9201578557d 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D41/studio/view.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D41/studio/view.xml
@@ -33,7 +33,7 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D71/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D71/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D71/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D71/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D71/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D71/studio/view.xml
index 08aaff161bd..2e28ce6934f 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D71/studio/view.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245FNI-S3D71/studio/view.xml
@@ -33,7 +33,7 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D02/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D02/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D02/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D02/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D12/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D12/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D12/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D12/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D42/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D42/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D42/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D42/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D62/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D62/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D62/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D62/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D72/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D72/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D72/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245LQI-S3D72/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245W-S3D72/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245W-S3D72/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245W-S3D72/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CY8C6245W-S3D72/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CYB06445LQI-S3D42/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CYB06445LQI-S3D42/studio/presentation
index 6a8bdde3e3d..6cd221015f4 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CYB06445LQI-S3D42/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CYB06445LQI-S3D42/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 64
+PSoC 6
+PSoC 64
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/studio/clocks.cysem b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/studio/clocks.cysem
index f160ae144a7..b8d28ed2dc7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/studio/clocks.cysem
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/studio/clocks.cysem
@@ -433,7 +433,7 @@
2
- Watch Crystal Oscillator: This source is driven from an off-chip watch crystal that provides an extremely accurate source. This clock is stopped in the hibernate power mode.
+ Watch Crystal Oscillator: This source is driven from an off-chip watch crystal that provides an extremely accurate source. This clock runs in hibernate power mode.
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6016BZI-F04/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6016BZI-F04/studio/presentation
index 976b687d88c..23e88077a48 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6016BZI-F04/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6016BZI-F04/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 60
+PSoC 6
+PSoC 60
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6036BZI-F04/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6036BZI-F04/studio/presentation
index 976b687d88c..23e88077a48 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6036BZI-F04/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6036BZI-F04/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 60
+PSoC 6
+PSoC 60
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6116BZI-F54/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6116BZI-F54/studio/presentation
index 7e90374eb12..5a9f775be91 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6116BZI-F54/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6116BZI-F54/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 61
+PSoC 6
+PSoC 61
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6117BZI-F34/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6117BZI-F34/studio/presentation
index 7e90374eb12..5a9f775be91 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6117BZI-F34/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6117BZI-F34/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 61
+PSoC 6
+PSoC 61
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6117FDI-F02/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6117FDI-F02/studio/presentation
index 7e90374eb12..5a9f775be91 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6117FDI-F02/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6117FDI-F02/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 61
+PSoC 6
+PSoC 61
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6117WI-F34/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6117WI-F34/studio/presentation
index 7e90374eb12..5a9f775be91 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6117WI-F34/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6117WI-F34/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 61
+PSoC 6
+PSoC 61
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6136BZI-F14/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6136BZI-F14/studio/presentation
index 7e90374eb12..5a9f775be91 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6136BZI-F14/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6136BZI-F14/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 61
+PSoC 6
+PSoC 61
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6136BZI-F34/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6136BZI-F34/studio/presentation
index 7e90374eb12..5a9f775be91 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6136BZI-F34/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6136BZI-F34/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 61
+PSoC 6
+PSoC 61
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6136FDI-F42/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6136FDI-F42/studio/presentation
index 7e90374eb12..5a9f775be91 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6136FDI-F42/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6136FDI-F42/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 61
+PSoC 6
+PSoC 61
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6136FTI-F42/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6136FTI-F42/studio/presentation
index 7e90374eb12..5a9f775be91 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6136FTI-F42/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6136FTI-F42/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 61
+PSoC 6
+PSoC 61
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137BZI-F14/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137BZI-F14/studio/presentation
index 7e90374eb12..5a9f775be91 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137BZI-F14/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137BZI-F14/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 61
+PSoC 6
+PSoC 61
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137BZI-F34/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137BZI-F34/studio/presentation
index 7e90374eb12..5a9f775be91 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137BZI-F34/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137BZI-F34/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 61
+PSoC 6
+PSoC 61
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137BZI-F54/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137BZI-F54/studio/presentation
index 7e90374eb12..5a9f775be91 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137BZI-F54/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137BZI-F54/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 61
+PSoC 6
+PSoC 61
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137FDI-F02/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137FDI-F02/studio/presentation
index 7e90374eb12..5a9f775be91 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137FDI-F02/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137FDI-F02/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 61
+PSoC 6
+PSoC 61
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137WI-F54/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137WI-F54/studio/presentation
index 7e90374eb12..5a9f775be91 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137WI-F54/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6137WI-F54/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 61
+PSoC 6
+PSoC 61
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6246BZI-D04/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6246BZI-D04/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6246BZI-D04/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6246BZI-D04/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BFI-D54/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BFI-D54/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BFI-D54/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BFI-D54/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BZI-AUD54/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BZI-AUD54/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BZI-AUD54/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BZI-AUD54/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BZI-D34/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BZI-D34/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BZI-D34/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BZI-D34/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BZI-D44/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BZI-D44/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BZI-D44/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BZI-D44/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BZI-D54/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BZI-D54/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BZI-D54/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247BZI-D54/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247FDI-D02/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247FDI-D02/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247FDI-D02/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247FDI-D02/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247FDI-D32/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247FDI-D32/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247FDI-D32/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247FDI-D32/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247FDI-D52/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247FDI-D52/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247FDI-D52/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247FDI-D52/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247FTI-D52/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247FTI-D52/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247FTI-D52/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247FTI-D52/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247WI-D54/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247WI-D54/studio/presentation
index 2d84ef27e9f..33e940a6d9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247WI-D54/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6247WI-D54/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 62
+PSoC 6
+PSoC 62
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6316BZI-BLF03/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6316BZI-BLF03/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6316BZI-BLF03/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6316BZI-BLF03/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6316BZI-BLF04/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6316BZI-BLF04/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6316BZI-BLF04/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6316BZI-BLF04/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6316BZI-BLF53/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6316BZI-BLF53/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6316BZI-BLF53/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6316BZI-BLF53/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6316BZI-BLF54/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6316BZI-BLF54/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6316BZI-BLF54/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6316BZI-BLF54/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BLD13/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BLD13/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BLD13/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BLD13/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BLD14/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BLD14/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BLD14/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BLD14/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BLF03/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BLF03/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BLF03/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BLF03/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BLF04/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BLF04/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BLF04/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BLF04/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BUD13/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BUD13/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BUD13/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336BZI-BUD13/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336LQI-BLF02/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336LQI-BLF02/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336LQI-BLF02/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336LQI-BLF02/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336LQI-BLF42/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336LQI-BLF42/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336LQI-BLF42/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6336LQI-BLF42/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6337BZI-BLF13/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6337BZI-BLF13/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6337BZI-BLF13/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6337BZI-BLF13/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD33/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD33/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD33/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD33/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD34/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD34/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD34/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD34/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD43/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD43/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD43/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD43/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD44/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD44/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD44/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD44/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD53/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD53/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD53/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD53/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD54/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD54/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD54/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BLD54/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BUD33/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BUD33/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BUD33/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BUD33/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BUD43/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BUD43/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BUD43/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BUD43/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BUD53/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BUD53/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BUD53/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347BZI-BUD53/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BLD13/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BLD13/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BLD13/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BLD13/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BLD33/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BLD33/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BLD33/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BLD33/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BLD43/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BLD43/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BLD43/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BLD43/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BLD53/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BLD53/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BLD53/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BLD53/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BUD13/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BUD13/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BUD13/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BUD13/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BUD33/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BUD33/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BUD33/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BUD33/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BUD43/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BUD43/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BUD43/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BUD43/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BUD53/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BUD53/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BUD53/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347FMI-BUD53/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347LQI-BLD52/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347LQI-BLD52/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347LQI-BLD52/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C6347LQI-BLD52/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C637BZI-BLD74/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C637BZI-BLD74/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C637BZI-BLD74/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C637BZI-BLD74/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C637BZI-MD76/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C637BZI-MD76/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C637BZI-MD76/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C637BZI-MD76/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C637FMI-BLD73/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C637FMI-BLD73/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C637FMI-BLD73/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C637FMI-BLD73/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C68237BZ-BLE/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C68237BZ-BLE/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C68237BZ-BLE/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C68237BZ-BLE/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C68237FM-BLE/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C68237FM-BLE/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C68237FM-BLE/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CY8C68237FM-BLE/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD53/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD53/studio/presentation
index 6a8bdde3e3d..6cd221015f4 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD53/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD53/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 64
+PSoC 6
+PSoC 64
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD54/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD54/studio/presentation
index 6a8bdde3e3d..6cd221015f4 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD54/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD54/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 64
+PSoC 6
+PSoC 64
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-D54/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-D54/studio/presentation
index 6a8bdde3e3d..6cd221015f4 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-D54/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-D54/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 64
+PSoC 6
+PSoC 64
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYBLE-416045-02/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYBLE-416045-02/studio/presentation
index d3b5d7b9fab..1bcadca24c7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYBLE-416045-02/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYBLE-416045-02/studio/presentation
@@ -1,2 +1,2 @@
-PSoC 6
-PSoC 63
+PSoC 6
+PSoC 63
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/clocks.cysem b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/clocks.cysem
index fa25ded8e91..19d1b2f0523 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/clocks.cysem
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/clocks.cysem
@@ -1,5 +1,5 @@
-
+
@@ -1082,7 +1082,7 @@ SYS_TICK
2
- Watch Crystal Oscillator: This source is driven from an off-chip watch crystal that provides an extremely accurate source. This clock is stopped in the hibernate power mode.
+ Watch Crystal Oscillator: This source is driven from an off-chip watch crystal that provides an extremely accurate source. This clock runs in hibernate power mode.
@@ -1628,8 +1628,8 @@ SYS_TICK
-
+
@@ -1866,17 +1866,17 @@ SYS_TICK
-
+
-
-
-
+
+
-
-
+
+
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/clocks.cyvis b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/clocks.cyvis
index 709240dc826..a0265f82a97 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/clocks.cyvis
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/clocks.cyvis
@@ -1,5 +1,5 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxprofile_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxprofile_v1.cydata
index 6b0476263f4..9f3fb6a694b 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxprofile_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxprofile_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40srss_v1-power.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40srss_v1-power.cydata
deleted file mode 100644
index a9be78bedbe..00000000000
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40srss_v1-power.cydata and /dev/null differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40srss_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40srss_v1.cydata
index 4c796d89b36..6546bc53b44 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40srss_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40srss_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxsdhc_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxsdhc_v1.cydata
index 06b597a9e2b..0974ae86069 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxsdhc_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxsdhc_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxtcpwm_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxtcpwm_v1.cydata
index 25d4895ca6f..83d0cdbe93c 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxtcpwm_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxtcpwm_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/features.mk b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/features.mk
index dc60a1a3edb..093c829b3ae 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/features.mk
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/features.mk
@@ -1,47 +1,50 @@
-# This file defines variables for various sets of devices. Each variable is a
-# list of the MPNs that have that capability or feature.
-
-# Major device capabilities.
-CY_DEVICES_WITH_M0P=CY8C6246BZI-D04 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6336BZI-BLD13 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6247FDI-D52 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6347LQI-BLD52 CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72
-CY_DEVICES_WITH_BLE=CY8C6336BZI-BLF03 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CY8C6336LQI-BLF02 CY8C6336LQI-BLF42 CY8C6347LQI-BLD52
-CY_DEVICES_WITH_UDBS=CY8C6116BZI-F54 CY8C6136BZI-F34 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6316BZI-BLF53 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C6247FDI-D32 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6247FDI-D52 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6316BZI-BLF54 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6347LQI-BLD52
-CY_DEVICES_WITH_FS_USB=CY8C6036BZI-F04 CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6246BZI-D04 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C637BZI-MD76 CY8C6137FDI-F02 CY8C6117FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6136FDI-F42 CY8C6247FDI-D52 CY8C6136FTI-F42 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-D54 CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72
-CY_DEVICES_WITH_CAPSENSE=CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6247FDI-D32 CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6136FDI-F42 CY8C6247FDI-D52 CY8C6136FTI-F42 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6336LQI-BLF42 CY8C6347LQI-BLD52 CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245W-S3D72
-CY_DEVICES_WITH_CRYPTO=CY8C6116BZI-F54 CY8C6137BZI-F54 CY8C6247BZI-D44 CY8C6247BZI-D54 CY8C6316BZI-BLF53 CY8C6347BZI-BLD43 CY8C6347BZI-BLD53 CY8C6347FMI-BLD43 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6347BZI-BUD43 CY8C6347BZI-BUD53 CY8C6136FDI-F42 CY8C6247FDI-D52 CY8C6136FTI-F42 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6316BZI-BLF54 CY8C6347BZI-BLD44 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD43 CY8C6137WI-F54 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6336LQI-BLF42 CY8C6347LQI-BLD52 CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245W-S3D72
-
-# Different classifications of devices.
-CY_DEVICES_WITH_DIE_PSOC6ABLE2=CY8C6036BZI-F04 CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6246BZI-D04 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6336BZI-BLF03 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6137FDI-F02 CY8C6117FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6136FDI-F42 CY8C6247FDI-D52 CY8C6136FTI-F42 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6336LQI-BLF02 CY8C6336LQI-BLF42 CY8C6347LQI-BLD52
-CY_DEVICES_WITH_DIE_PSOC6A2M=CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43
-CY_DEVICES_WITH_DIE_PSOC6A512K=CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72
-
-CY_DEVICES_WITH_FLASH_KB_512=CY8C6036BZI-F04 CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6246BZI-D04 CY8C6336BZI-BLF03 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6336BZI-BUD13 CY8C6136FDI-F42 CY8C6136FTI-F42 CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6336LQI-BLF02 CY8C6336LQI-BLF42 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72
-CY_DEVICES_WITH_FLASH_KB_1024=CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6137FDI-F02 CY8C6117FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6247FDI-D52 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CY8C6347LQI-BLD52 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43
-CY_DEVICES_WITH_FLASH_KB_832=CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54
-CY_DEVICES_WITH_FLASH_KB_2048=CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C624ALQI-D42 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14
-CY_DEVICES_WITH_FLASH_KB_1856=CYB0644ABZI-S2D44
-CY_DEVICES_WITH_FLASH_KB_448=CYB06445LQI-S3D42
-
-CY_DEVICES_WITH_SRAM_KB_128=CY8C6036BZI-F04 CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6246BZI-D04 CY8C6336BZI-BLF03 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6336BZI-BUD13 CY8C6136FDI-F42 CY8C6136FTI-F42 CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6336LQI-BLF02 CY8C6336LQI-BLF42
-CY_DEVICES_WITH_SRAM_KB_288=CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6137FDI-F02 CY8C6117FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6247FDI-D52 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6347LQI-BLD52
-CY_DEVICES_WITH_SRAM_KB_1024=CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14
-CY_DEVICES_WITH_SRAM_KB_512=CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43
-CY_DEVICES_WITH_SRAM_KB_256=CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72
-
-CY_DEVICES_WITH_MAX_SPEED_MHZ_150=CY8C6036BZI-F04 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6246BZI-D04 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6336BZI-BLF03 CY8C6336BZI-BLD13 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6137FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6136FDI-F42 CY8C6247FDI-D52 CY8C6136FTI-F42 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6336BZI-BLF04 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6336LQI-BLF02 CY8C6336LQI-BLF42 CY8C6347LQI-BLD52 CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72
-CY_DEVICES_WITH_MAX_SPEED_MHZ_50=CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6117BZI-F34 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6117FDI-F02 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6117WI-F34
-
-CY_DEVICES_WITH_PACKAGE_124-BGA=CY8C6036BZI-F04 CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6246BZI-D04 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C637BZI-MD76 CY8C6247BZI-AUD54 CY8C6247BFI-D54 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CYB06447BZI-D54 CY8C624ABZI-D44 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C6248BZI-D44 CYB0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C6248BZI-S2D44
-CY_DEVICES_WITH_PACKAGE_116-BGA-BLE=CY8C6336BZI-BLF03 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C637BZI-BLD74 CY8C68237BZ-BLE CY8C6337BZI-BLF13 CYB06447BZI-BLD53
-CY_DEVICES_WITH_PACKAGE_104-M-CSP-BLE=CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637FMI-BLD73 CY8C68237FM-BLE
-CY_DEVICES_WITH_PACKAGE_80-WLCSP=CY8C6137FDI-F02 CY8C6117FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6136FDI-F42 CY8C6247FDI-D52 CY8C6136FTI-F42 CY8C6247FTI-D52
-CY_DEVICES_WITH_PACKAGE_116-BGA-USB=CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53
-CY_DEVICES_WITH_PACKAGE_124-BGA-SIP=CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CYB06447BZI-BLD54
-CY_DEVICES_WITH_PACKAGE_43-SMT=CYBLE-416045-02
-CY_DEVICES_WITH_PACKAGE_104-M-CSP-BLE-USB=CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33
-CY_DEVICES_WITH_PACKAGE_68-QFN-BLE=CY8C6336LQI-BLF02 CY8C6336LQI-BLF42 CY8C6347LQI-BLD52
-CY_DEVICES_WITH_PACKAGE_128-TQFP=CY8C624AAZI-D44 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C6248AZI-D44 CY8C624AAZI-S2D44 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14 CY8C6248AZI-S2D44
-CY_DEVICES_WITH_PACKAGE_100-WLCSP=CY8C624AFNI-D43 CY8C6248FNI-D43 CY8C624AFNI-S2D43 CY8C6248FNI-S2D43
-CY_DEVICES_WITH_PACKAGE_68-QFN=CY8C624ALQI-D42 CY8C6245LQI-S3D72 CY8C6245LQI-S3D62 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245LQI-S3D12 CY8C6245LQI-S3D02
-CY_DEVICES_WITH_PACKAGE_100-TQFP=CY8C6245AZI-S3D72 CY8C6245AZI-S3D62 CY8C6245AZI-S3D42 CY8C6245AZI-S3D12 CY8C6245AZI-S3D02 CY8C6245W-S3D72
-CY_DEVICES_WITH_PACKAGE_49-WLCSP=CY8C6245FNI-S3D71 CY8C6245FNI-S3D41 CY8C6245FNI-S3D11
-
+# This file defines variables for various sets of devices. Each variable is a
+# list of the MPNs that have that capability or feature.
+
+# Major device capabilities.
+CY_DEVICES_WITH_M0P=CY8C6246BZI-D04 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6336BZI-BLD13 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6247FDI-D52 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6347LQI-BLD52 CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CYS0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72 PSoC6A256K
+CY_DEVICES_WITH_BLE=CY8C6336BZI-BLF03 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CY8C6336LQI-BLF02 CY8C6336LQI-BLF42 CY8C6347LQI-BLD52
+CY_DEVICES_WITH_UDBS=CY8C6116BZI-F54 CY8C6136BZI-F34 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6316BZI-BLF53 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C6247FDI-D32 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6247FDI-D52 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6316BZI-BLF54 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6347LQI-BLD52
+CY_DEVICES_WITH_FS_USB=CY8C6036BZI-F04 CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6246BZI-D04 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C637BZI-MD76 CY8C6137FDI-F02 CY8C6117FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6136FDI-F42 CY8C6247FDI-D52 CY8C6136FTI-F42 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-D54 CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CYS0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72 PSoC6A256K
+CY_DEVICES_WITH_CAPSENSE=CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6247FDI-D32 CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6136FDI-F42 CY8C6247FDI-D52 CY8C6136FTI-F42 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6336LQI-BLF42 CY8C6347LQI-BLD52 CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CYS0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245W-S3D72
+CY_DEVICES_WITH_CRYPTO=CY8C6116BZI-F54 CY8C6137BZI-F54 CY8C6247BZI-D44 CY8C6247BZI-D54 CY8C6316BZI-BLF53 CY8C6347BZI-BLD43 CY8C6347BZI-BLD53 CY8C6347FMI-BLD43 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6347BZI-BUD43 CY8C6347BZI-BUD53 CY8C6136FDI-F42 CY8C6247FDI-D52 CY8C6136FTI-F42 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6316BZI-BLF54 CY8C6347BZI-BLD44 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD43 CY8C6137WI-F54 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6336LQI-BLF42 CY8C6347LQI-BLD52 CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CYS0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245W-S3D72
+CY_DEVICES_SECURE=CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CYB0644ABZI-S2D44 CYS0644ABZI-S2D44 CYB06445LQI-S3D42
+
+# Different classifications of devices.
+CY_DEVICES_WITH_DIE_PSOC6ABLE2=CY8C6036BZI-F04 CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6246BZI-D04 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6336BZI-BLF03 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6137FDI-F02 CY8C6117FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6136FDI-F42 CY8C6247FDI-D52 CY8C6136FTI-F42 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6336LQI-BLF02 CY8C6336LQI-BLF42 CY8C6347LQI-BLD52
+CY_DEVICES_WITH_DIE_PSOC6A2M=CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CYS0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43
+CY_DEVICES_WITH_DIE_PSOC6A512K=CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72
+CY_DEVICES_WITH_DIE_PSOC6A256K=PSoC6A256K
+
+CY_DEVICES_WITH_FLASH_KB_512=CY8C6036BZI-F04 CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6246BZI-D04 CY8C6336BZI-BLF03 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6336BZI-BUD13 CY8C6136FDI-F42 CY8C6136FTI-F42 CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6336LQI-BLF02 CY8C6336LQI-BLF42 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72
+CY_DEVICES_WITH_FLASH_KB_1024=CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6137FDI-F02 CY8C6117FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6247FDI-D52 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CY8C6347LQI-BLD52 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43
+CY_DEVICES_WITH_FLASH_KB_832=CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54
+CY_DEVICES_WITH_FLASH_KB_2048=CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C624ALQI-D42 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14
+CY_DEVICES_WITH_FLASH_KB_1856=CYB0644ABZI-S2D44 CYS0644ABZI-S2D44
+CY_DEVICES_WITH_FLASH_KB_448=CYB06445LQI-S3D42
+CY_DEVICES_WITH_FLASH_KB_256=PSoC6A256K
+
+CY_DEVICES_WITH_SRAM_KB_128=CY8C6036BZI-F04 CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6246BZI-D04 CY8C6336BZI-BLF03 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6336BZI-BUD13 CY8C6136FDI-F42 CY8C6136FTI-F42 CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6336LQI-BLF02 CY8C6336LQI-BLF42 PSoC6A256K
+CY_DEVICES_WITH_SRAM_KB_288=CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6137FDI-F02 CY8C6117FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6247FDI-D52 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6347LQI-BLD52
+CY_DEVICES_WITH_SRAM_KB_1024=CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CYS0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14
+CY_DEVICES_WITH_SRAM_KB_512=CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43
+CY_DEVICES_WITH_SRAM_KB_256=CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72
+
+CY_DEVICES_WITH_MAX_SPEED_MHZ_150=CY8C6036BZI-F04 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6246BZI-D04 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6336BZI-BLF03 CY8C6336BZI-BLD13 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6137FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6136FDI-F42 CY8C6247FDI-D52 CY8C6136FTI-F42 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6336BZI-BLF04 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6336LQI-BLF02 CY8C6336LQI-BLF42 CY8C6347LQI-BLD52 CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CYS0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72 PSoC6A256K
+CY_DEVICES_WITH_MAX_SPEED_MHZ_50=CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6117BZI-F34 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6117FDI-F02 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6117WI-F34
+
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+CY_DEVICES_WITH_PACKAGE_80-WLCSP=CY8C6137FDI-F02 CY8C6117FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6136FDI-F42 CY8C6247FDI-D52 CY8C6136FTI-F42 CY8C6247FTI-D52
+CY_DEVICES_WITH_PACKAGE_116-BGA-USB=CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53
+CY_DEVICES_WITH_PACKAGE_124-BGA-SIP=CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CYB06447BZI-BLD54
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+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/version.dat b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/version.dat
index c7973f67375..ad49616d539 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/version.dat
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/version.dat
@@ -1 +1 @@
-1.1.3.51
+1.1.3.98
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/version.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/version.xml
index b1f03ef7600..5e023aea7ec 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/version.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/version.xml
@@ -1 +1 @@
-1.1.3.51
+1.1.3.98
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/version.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/version.xml
index 909bd30c581..eda4fd96d1b 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/version.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/version.xml
@@ -1 +1 @@
-1.4.0.1889
+1.4.1.2240