From cb032d23652eeaad05c4821dcf6cb1bab32be004 Mon Sep 17 00:00:00 2001 From: "Jost, Chris" <79271064+chrJost@users.noreply.github.com> Date: Wed, 24 Feb 2021 09:57:51 +0100 Subject: [PATCH 1/2] enable USBDEVICE for STM32L5 --- .../TARGET_STM/TARGET_STM32L5/system_clock.c | 17 +++++++++++++---- targets/TARGET_STM/USBPhyHw.h | 2 ++ targets/targets.json | 3 ++- 3 files changed, 17 insertions(+), 5 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32L5/system_clock.c b/targets/TARGET_STM/TARGET_STM32L5/system_clock.c index e116c834ed8..ad787cb76e1 100644 --- a/targets/TARGET_STM/TARGET_STM32L5/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32L5/system_clock.c @@ -147,7 +147,7 @@ uint8_t SetSysClock_PLL_MSI(void) RCC_OscInitStruct.MSIState = RCC_MSI_ON; RCC_OscInitStruct.HSEState = RCC_HSE_OFF; RCC_OscInitStruct.HSIState = RCC_HSI_OFF; -#if DEVICE_TRNG +#if DEVICE_TRNG || DEVICE_USBDEVICE RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; #else RCC_OscInitStruct.HSI48State = RCC_HSI48_OFF; @@ -176,12 +176,21 @@ uint8_t SetSysClock_PLL_MSI(void) return 0; // FAIL } -#if DEVICE_TRNG RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; +#if DEVICE_TRNG PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG; PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48; - HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); -#endif + if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { + return 0; // FAIL + } +#endif +#if DEVICE_USBDEVICE + RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; + RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; + if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { + return 0; // FAIL + } +#endif return 1; // OK } diff --git a/targets/TARGET_STM/USBPhyHw.h b/targets/TARGET_STM/USBPhyHw.h index a98ad48c48a..c8a94947b1e 100644 --- a/targets/TARGET_STM/USBPhyHw.h +++ b/targets/TARGET_STM/USBPhyHw.h @@ -45,6 +45,8 @@ #if defined(TARGET_STM32F1) || defined(TARGET_STM32F3) || defined(TARGET_STM32WB) || defined(TARGET_STM32G4) #define USBHAL_IRQn USB_LP_IRQn +#elif defined(TARGET_STM32L5) +#define USBHAL_IRQn USB_FS_IRQn #else #define USBHAL_IRQn USB_IRQn #endif diff --git a/targets/targets.json b/targets/targets.json index da2b25251f9..8e800ed8b03 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -3951,7 +3951,8 @@ "FLASH", "MPU", "SERIAL_ASYNCH", - "TRNG" + "TRNG", + "USBDEVICE" ] }, "MCU_STM32L552xE": { From 96c31e15da6a4f27c7d3691a39af6572159f7fe1 Mon Sep 17 00:00:00 2001 From: "Jost, Chris" <79271064+chrJost@users.noreply.github.com> Date: Wed, 24 Feb 2021 14:41:04 +0100 Subject: [PATCH 2/2] fixed copy paste errors --- targets/TARGET_STM/TARGET_STM32L5/system_clock.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32L5/system_clock.c b/targets/TARGET_STM/TARGET_STM32L5/system_clock.c index ad787cb76e1..ef740466c4c 100644 --- a/targets/TARGET_STM/TARGET_STM32L5/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32L5/system_clock.c @@ -180,14 +180,14 @@ uint8_t SetSysClock_PLL_MSI(void) #if DEVICE_TRNG PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG; PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48; - if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { return 0; // FAIL } #endif #if DEVICE_USBDEVICE - RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; - RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; - if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { return 0; // FAIL } #endif