From f6283f5b03a503cee34b0812231c2ce331eac137 Mon Sep 17 00:00:00 2001 From: gorazd Date: Mon, 4 Dec 2017 10:12:39 +0100 Subject: [PATCH 1/2] ff_lpc546xx: add enet fsl_phy.c/.h move to ../drivers to reuse it lwip: add hardware_init.c --- .../hardware_init_LPC546XX.c | 227 ++++++++++++++++++ .../hardware_init_LPC546XX.c} | 0 .../{TARGET_LPCXpresso => drivers}/fsl_phy.c | 0 .../{TARGET_LPCXpresso => drivers}/fsl_phy.h | 0 targets/targets.json | 1 - 5 files changed, 227 insertions(+), 1 deletion(-) create mode 100644 features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NXP/TARGET_LPC546XX/TARGET_FF_LPC546XX/hardware_init_LPC546XX.c rename features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NXP/TARGET_LPC546XX/{harware_init_LPC546XX.c => TARGET_LPCXpresso/hardware_init_LPC546XX.c} (100%) rename targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/{TARGET_LPCXpresso => drivers}/fsl_phy.c (100%) rename targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/{TARGET_LPCXpresso => drivers}/fsl_phy.h (100%) diff --git a/features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NXP/TARGET_LPC546XX/TARGET_FF_LPC546XX/hardware_init_LPC546XX.c b/features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NXP/TARGET_LPC546XX/TARGET_FF_LPC546XX/hardware_init_LPC546XX.c new file mode 100644 index 00000000000..096689e5e51 --- /dev/null +++ b/features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NXP/TARGET_LPC546XX/TARGET_FF_LPC546XX/hardware_init_LPC546XX.c @@ -0,0 +1,227 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "fsl_iocon.h" + +#define IOCON_PIO_DIGITAL_EN 0x0100u /*!<@brief Enables digital function */ +#define IOCON_PIO_FUNC0 0x00u /*!<@brief Selects pin function 0 */ +#define IOCON_PIO_FUNC1 0x01u /*!<@brief Selects pin function 1 */ +#define IOCON_PIO_FUNC6 0x06u /*!<@brief Selects pin function 6 */ +#define IOCON_PIO_FUNC7 0x07u /*!<@brief Selects pin function 7 */ +#define IOCON_PIO_INPFILT_OFF 0x0200u /*!<@brief Input filter disabled */ +#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */ +#define IOCON_PIO_MODE_INACT 0x00u /*!<@brief No addition pin function */ +#define IOCON_PIO_MODE_PULLUP 0x20u /*!<@brief Selects pull-up function */ +#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!<@brief Open drain is disabled */ +#define IOCON_PIO_SLEW_FAST 0x0400u /*!<@brief Fast mode, slew rate control is disabled */ +#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */ + +/******************************************************************************* + * Code + ******************************************************************************/ +void lpc546xx_init_eth_hardware(void) +{ + CLOCK_EnableClock(kCLOCK_InputMux); + + /* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */ + CLOCK_EnableClock(kCLOCK_Iocon); + + const uint32_t port0_pin10_config = (/* Pin is configured as SWO */ + IOCON_PIO_FUNC6 | + /* No addition pin function */ + IOCON_PIO_MODE_INACT | + /* Input function is not inverted */ + IOCON_PIO_INV_DI | + /* Enables digital function */ + IOCON_PIO_DIGITAL_EN | + /* Input filter disabled */ + IOCON_PIO_INPFILT_OFF | + /* Open drain is disabled */ + IOCON_PIO_OPENDRAIN_DI); + /* PORT0 PIN10 (coords: P2) is configured as SWO */ + IOCON_PinMuxSet(IOCON, 0U, 10U, port0_pin10_config); + + const uint32_t port1_pin10_config = (/* Pin is configured as ENET_TXD1 */ + IOCON_PIO_FUNC1 /* IOCON_PIO_FUNC1 */ | + /* No addition pin function */ + IOCON_PIO_MODE_INACT | + /* Input function is not inverted */ + IOCON_PIO_INV_DI | + /* Enables digital function */ + IOCON_PIO_DIGITAL_EN | + /* Input filter disabled */ + IOCON_PIO_INPFILT_OFF | + /* Standard mode, output slew rate control is enabled */ + IOCON_PIO_SLEW_STANDARD | + /* Open drain is disabled */ + IOCON_PIO_OPENDRAIN_DI); + /* PORT1 PIN10 (coords: E14) is configured as ENET_TXD1 */ + IOCON_PinMuxSet(IOCON, 1U, 10U, port1_pin10_config); + + + const uint32_t port1_pin18_config = (/* Pin is configured as ENET_PHY_RST */ + IOCON_PIO_FUNC0 | + /* Selects pull-up function */ + IOCON_PIO_MODE_PULLUP | + /* Input function is not inverted */ + IOCON_PIO_INV_DI | + /* Enables digital function */ + IOCON_PIO_DIGITAL_EN | + /* Input filter disabled */ + IOCON_PIO_INPFILT_OFF | + /* Standard mode, output slew rate control is enabled */ + IOCON_PIO_SLEW_STANDARD | + /* Open drain is disabled */ + IOCON_PIO_OPENDRAIN_DI); + /* PORT1 PIN18 (coords: H11) is configured as ENET_PHY_RST */ + IOCON_PinMuxSet(IOCON, 1U, 18U, port1_pin18_config); + + const uint32_t port1_pin14_config = (/* Pin is configured as ENET_RX_DV */ + IOCON_PIO_FUNC1 | + /* No addition pin function */ + IOCON_PIO_MODE_INACT | + /* Input function is not inverted */ + IOCON_PIO_INV_DI | + /* Enables digital function */ + IOCON_PIO_DIGITAL_EN | + /* Input filter disabled */ + IOCON_PIO_INPFILT_OFF | + /* Standard mode, output slew rate control is enabled */ + IOCON_PIO_SLEW_STANDARD | + /* Open drain is disabled */ + IOCON_PIO_OPENDRAIN_DI); + /* PORT1 PIN14 (coords: B9) is configured as ENET_RX_DV */ + IOCON_PinMuxSet(IOCON, 1U, 14U, port1_pin14_config); + + const uint32_t port1_pin12_config = (/* Pin is configured as ENET_RXD0 */ + IOCON_PIO_FUNC1 | + /* No addition pin function */ + IOCON_PIO_MODE_INACT | + /* Input function is not inverted */ + IOCON_PIO_INV_DI | + /* Enables digital function */ + IOCON_PIO_DIGITAL_EN | + /* Input filter disabled */ + IOCON_PIO_INPFILT_OFF | + /* Standard mode, output slew rate control is enabled */ + IOCON_PIO_SLEW_STANDARD | + /* Open drain is disabled */ + IOCON_PIO_OPENDRAIN_DI); + /* PORT1 PIN12 (coords: A9) is configured as ENET_RXD0 */ + IOCON_PinMuxSet(IOCON, 1U, 12U, port1_pin12_config); + + const uint32_t port1_pin13_config = (/* Pin is configured as ENET_RXD1 */ + IOCON_PIO_FUNC1 | + /* No addition pin function */ + IOCON_PIO_MODE_INACT | + /* Input function is not inverted */ + IOCON_PIO_INV_DI | + /* Enables digital function */ + IOCON_PIO_DIGITAL_EN | + /* Input filter disabled */ + IOCON_PIO_INPFILT_OFF | + /* Standard mode, output slew rate control is enabled */ + IOCON_PIO_SLEW_STANDARD | + /* Open drain is disabled */ + IOCON_PIO_OPENDRAIN_DI); + /* PORT4 PIN12 (coords: A6) is configured as ENET_RXD1 */ + IOCON_PinMuxSet(IOCON, 1U, 13U, port1_pin13_config); + + const uint32_t port1_pin11_config = (/* Pin is configured as ENET_TX_EN */ + IOCON_PIO_FUNC1 | + /* No addition pin function */ + IOCON_PIO_MODE_INACT | + /* Input function is not inverted */ + IOCON_PIO_INV_DI | + /* Enables digital function */ + IOCON_PIO_DIGITAL_EN | + /* Input filter disabled */ + IOCON_PIO_INPFILT_OFF | + /* Standard mode, output slew rate control is enabled */ + IOCON_PIO_SLEW_STANDARD | + /* Open drain is disabled */ + IOCON_PIO_OPENDRAIN_DI); + /* PORT4 PIN13 (coords: B6) is configured as ENET_TX_EN */ + IOCON_PinMuxSet(IOCON, 1U, 11U, port1_pin11_config); + + const uint32_t port1_pin15_config = (/* Pin is configured as ENET_RX_CLK */ + IOCON_PIO_FUNC1 | + /* No addition pin function */ + IOCON_PIO_MODE_INACT | + /* Input function is not inverted */ + IOCON_PIO_INV_DI | + /* Enables digital function */ + IOCON_PIO_DIGITAL_EN | + /* Input filter disabled */ + IOCON_PIO_INPFILT_OFF | + /* Standard mode, output slew rate control is enabled */ + IOCON_PIO_SLEW_STANDARD | + /* Open drain is disabled */ + IOCON_PIO_OPENDRAIN_DI); + /* PORT4 PIN14 (coords: B5) is configured as ENET_RX_CLK */ + IOCON_PinMuxSet(IOCON, 1U, 15U, port1_pin15_config); + + const uint32_t port1_pin16_config = (/* Pin is configured as ENET_MDC */ + IOCON_PIO_FUNC1 | + /* No addition pin function */ + IOCON_PIO_MODE_INACT | + /* Input function is not inverted */ + IOCON_PIO_INV_DI | + /* Enables digital function */ + IOCON_PIO_DIGITAL_EN | + /* Input filter disabled */ + IOCON_PIO_INPFILT_OFF | + /* Standard mode, output slew rate control is enabled */ + IOCON_PIO_SLEW_STANDARD | + /* Open drain is disabled */ + IOCON_PIO_OPENDRAIN_DI); + /* PORT4 PIN15 (coords: A4) is configured as ENET_MDC */ + IOCON_PinMuxSet(IOCON, 1U, 16U, port1_pin16_config); + + const uint32_t port1_pin17_config = (/* Pin is configured as ENET_MDIO */ + IOCON_PIO_FUNC1 | + /* No addition pin function */ + IOCON_PIO_MODE_INACT | + /* Input function is not inverted */ + IOCON_PIO_INV_DI | + /* Enables digital function */ + IOCON_PIO_DIGITAL_EN | + /* Input filter disabled */ + IOCON_PIO_INPFILT_OFF | + /* Standard mode, output slew rate control is enabled */ + IOCON_PIO_SLEW_STANDARD | + /* Open drain is disabled */ + IOCON_PIO_OPENDRAIN_DI); + /* PORT4 PIN16 (coords: C4) is configured as ENET_MDIO */ + IOCON_PinMuxSet(IOCON, 1U, 17U, port1_pin17_config); + + const uint32_t port1_pin9_config = (/* Pin is configured as ENET_TXD0 */ + IOCON_PIO_FUNC1 | + /* No addition pin function */ + IOCON_PIO_MODE_INACT | + /* Input function is not inverted */ + IOCON_PIO_INV_DI | + /* Enables digital function */ + IOCON_PIO_DIGITAL_EN | + /* Input filter disabled */ + IOCON_PIO_INPFILT_OFF | + /* Standard mode, output slew rate control is enabled */ + IOCON_PIO_SLEW_STANDARD | + /* Open drain is disabled */ + IOCON_PIO_OPENDRAIN_DI); + /* PORT4 PIN8 (coords: B14) is configured as ENET_TXD0 */ + IOCON_PinMuxSet(IOCON, 1U, 9U, port1_pin9_config); +} diff --git a/features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NXP/TARGET_LPC546XX/harware_init_LPC546XX.c b/features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NXP/TARGET_LPC546XX/TARGET_LPCXpresso/hardware_init_LPC546XX.c similarity index 100% rename from features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NXP/TARGET_LPC546XX/harware_init_LPC546XX.c rename to features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NXP/TARGET_LPC546XX/TARGET_LPCXpresso/hardware_init_LPC546XX.c diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_LPCXpresso/fsl_phy.c b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/drivers/fsl_phy.c similarity index 100% rename from targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_LPCXpresso/fsl_phy.c rename to targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/drivers/fsl_phy.c diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_LPCXpresso/fsl_phy.h b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/drivers/fsl_phy.h similarity index 100% rename from targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_LPCXpresso/fsl_phy.h rename to targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/drivers/fsl_phy.h diff --git a/targets/targets.json b/targets/targets.json index a9f032c925c..a8a462136b0 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -744,7 +744,6 @@ "FF_LPC546XX": { "inherits": ["LPC546XX"], "extra_labels_remove" : ["LPCXpresso"], - "features_remove": ["LWIP"], "supported_form_factors": [""], "detect_code": ["8081"] }, From 676e56d6feb0f8da4d59f082bca4540cb04cf26a Mon Sep 17 00:00:00 2001 From: gorazd Date: Wed, 6 Dec 2017 09:40:27 +0100 Subject: [PATCH 2/2] ff_lpc546xx: change led1 and led3 and p26 pins --- .../TARGET_LPC546XX/TARGET_FF_LPC546XX/PeripheralPins.c | 2 +- .../TARGET_LPC546XX/TARGET_FF_LPC546XX/PinNames.h | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/PeripheralPins.c b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/PeripheralPins.c index bb555ca3b71..ca4d335efa3 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/PeripheralPins.c +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/PeripheralPins.c @@ -120,6 +120,6 @@ const PinMap PinMap_PWM[] = { {P0_19 , PWM_3, 4}, {P0_22 , PWM_4, 4}, {P0_28 , PWM_8, 4}, - {P0_29 , PWM_9, 4}, + {P1_31 , PWM_7, 4}, {NC , NC, 0} }; diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/PinNames.h b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/PinNames.h index bc22e8e4bce..c51fe2c23cd 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/PinNames.h +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/PinNames.h @@ -183,9 +183,9 @@ typedef enum { // mbed original LED naming - LED1 = P0_13, + LED1 = P1_3, LED2 = P1_27, - LED3 = P0_14, + LED3 = P1_26, LED4 = P1_28, @@ -223,7 +223,7 @@ typedef enum { p23 = P0_19, p24 = P0_22, p25 = P0_28, - p26 = P0_29, + p26 = P1_31, p27 = P1_30, p28 = P1_29, p29 = P0_0,