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Add atomic loads and stores and barriers #9247
Add atomic load and store functions, and add barriers to the existing atomic functions.
File currently has no explicit barriers - we don't support SMP, so don't need CPU barriers.
But we do need to worry about compiler barriers - particularly if link time optimisation is activated so that the compiler can see inside these functions. The assembler or intrinsics that access PRIMASK for
Pull request type
I'm in two minds about this one - if people are directly accessing atomics with raw load or store, they're probably doing something weird and should be using something higher-level, but maybe there's no good alternative. This is being added to cover the
pan- left a comment
I'm puzzled with the atomic load/store implementation proposed - I must be missing something
mbed_critical currently has no SMP support, and has no CPU barriers at all. These new functions are consistent with the rest of the file - compiler barriers only, assuming 1 CPU, and protect against other threads or interrupts on that single CPU.
Those don't have any barrier/ordering functionality in the CPU.
So these implementations are to add the necessary equivalent compiler barrier on a plain load or store, that we get automatically whenever we happen to use
(Edit, oops, no, LDREX and STREX are not actually compiler barriers, necessarily. I'm going to need to add some.)
Without the barrier, this can go wrong:
The "do some stuff" could be reordered after the flag clear by the compiler, so that we are modifying the state with the flag clear. Existing attempts to do the equivalent with a "volatile bool" suffer the same problem - they should change to use atomic_flag to get the barrier that's being added here.
With LTO off, this was avoided because the "call outside this C file" to
An alternative would be to implement the atomic loads and stores like
Reworked the comments more - provide both