diff --git a/docs/design-documents/platform/memory-model/ram_memory_model.md b/docs/design-documents/platform/memory-model/ram_memory_model.md new file mode 100644 index 00000000000..725c1ccd080 --- /dev/null +++ b/docs/design-documents/platform/memory-model/ram_memory_model.md @@ -0,0 +1,105 @@ +# RAM memory model update - Mbed OS + +# Table of contents + +1. [RAM memory model update - Mbed OS](#mbed-os-ram-memory-model). +1. [Table of contents](#table-of-contents). + 1. [Revision history](#revision-history). +1. [Introduction](#introduction). + 1. [Current RAM memory model](#current-ram-memory-model). + 1. [Proposed RAM memory model](#proposed-ram-memory-model). +1. [Phases](#phases). +1. Detailed Design (#detailed-design). +1. [Tools and configuration changes](#tools-and-configuration-changes). + +### Revision history + +1.0 - A brief description of this version. For example, Initial revision - Author name - Date. +**NOTE: You may also specify the Mbed OS version this revision of design document applies to.** +1.1 - Added new section - Author name - Date. + +# Introduction + +### Current RAM memory model + +Single memory space is shared between stack and heap memory, start address is fixed but the size of both regions varies based on application and usage runtime. +Heap starts at the first address after the end of ZI growing up into higher memory address and stack starts at the last memory address of RAM growing downward into lower addresses. + + +----------------------+ Stack Start (Last address of RAM) + | ISR stack | + | Main Stack(No RTOS) | + | | | + | V | + +----------------------+ + | ^ | + | | | + | Heap | + +----------------------+ HEAP Start + | ZI | + |(Idle, Timer and Main | + | stack is in ZI for | + | RTOS) | + +----------------------+ + | | + +----------------------+ First address of RAM + +#### Drawbacks: +1. Collisions between stack and heap are hard to detect and result in hardfault. +1. Cannot check stack limit - In case of new ARM architecture stack limit registers are available to verify stack boundaries, but this feature cannot be used with dynamic stack size. +1. Stack size unification cannot be achieved across various targets. +1. GCC ARM: Memory allocator request memory at 4K boundary end of HEAP memory should be 4K aligned. Placing ISR stack (1K) after HEAP memory in case of RTOS, results in loss of 3K RAM memory +1. Memory allocators do not support HEAP split into multiple banks, hence with single region memory model HEAP is used only till end of first bank. + +### Proposed RAM memory model + +2-region memory model for heap and stack. Defined boundaries for ISR stack memory. Heap memory can be dynamic (starts at end of ZI and ends at last RAM address) or with fix boundaries in separate RAM bank. + + +----------------------+ Heap Ends (Last address of RAM) + | ^ | + | | | + | Heap | + +----------------------+ HEAP Start + | ZI | + |(Idle, Timer and Main | + | stack is in ZI for | + | RTOS) | + +----------------------+Stack Ends + | ISR stack | + | Main Stack(No RTOS) | + | | | + | V | + +----------------------+Stack Start + | | + +----------------------+ First address of RAM + +#### Drawbacks: +1. ISR Stack is not dynamic - This drawback is mainly for bare metal implementation (RTOS-less) where ISR and Main stack is same. With this limitation application writer should know if stack or heap will be usued more and tweaks the values accordingly. + +# Phases: +This feature will be implemented in different phases as follow: + +Phase 1 (5.12 Release): +1. Adopt 2-region memory model for Stack and Heap memory. +1. Unify the stack size accross all targets (RTOS: ISR stack - 1K Main thread Stack - 4K; Bare Metal(No RTOS) ISR/Main Stack - 4K) + +Phase 2: +1. Heap memory to be dynamic and starts at the end of ZI growing up till end of RAM memory (In case of single RAM bank) + Heap memory to be dynamic and assigned partial or full RAM bank in case of multiple RAM banks, based on calculation of other RAM regions. +1. ISR Stack to be placed after vectors or before ZI memory section. + +Note: Heap split support across multiple RAM banks, can also be achieved post this change. + +# Detailed Design +1. Update tools to set define `MBED_BOOT_STACK_SIZE` from target config option `target.boot-stack-size` +1. Linker Scripts - Update linker scripts for ARM, IAR and GCC toolchain to use MBED_BOOT_STACK_SIZE define for standardizing size of ISR stack. +1. Update __user_setup_stackheap() implementation to adopt 2-region RAM memory model. +__user_setup_stackheap() works with systems where the application starts with a value of sp (r13) that is already correct. To make use of sp(stack base), implement __user_setup_stackheap() to set up r0 (heap base), r2 (heap limit), and r3 (stack limit) (for a two-region model) and return. +Reference http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.kui0099a/armlib_cjagaaha.htm http://www.keil.com/support/man/docs/armlib/armlib_chr1359122863069.htm +1. Modify _sbrk() implementation for GCC to use 2-region memory model + +# Tools and configuration changes + +1. Target config option "target.boot-stack-size" which is passed to the linker as the define "MBED_BOOT_STACK_SIZE" so the linker can adjust the stack accordingly. + Boot stack size - the size of ISR and main stack will be 4K as default in targets.json for bare metal (non-RTOS) builds. + Boot stack size - the size of ISR stack will be over-written as 1K in `rtos/mbed_lib.json` for RTOS builds. + diff --git a/platform/mbed_retarget.cpp b/platform/mbed_retarget.cpp index d2d39bbd7b7..350e611d097 100644 --- a/platform/mbed_retarget.cpp +++ b/platform/mbed_retarget.cpp @@ -908,21 +908,44 @@ extern "C" long PREFIX(_flen)(FILEHANDLE fh) // Do not compile this code for TFM secure target #if !defined(COMPONENT_SPE) || !defined(TARGET_TFM) -extern "C" char Image$$RW_IRAM1$$ZI$$Limit[]; +#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) +__asm(".global __use_two_region_memory\n\t"); +__asm(".global __use_no_semihosting\n\t"); + +#else +#pragma import(__use_two_region_memory) +#endif + +#if !defined(HEAP_START) +// Heap here is considered starting after ZI ends to Stack start +extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[]; +extern uint32_t Image$$RW_IRAM1$$ZI$$Limit[]; +#define HEAP_START Image$$RW_IRAM1$$ZI$$Limit +#define HEAP_SIZE ((uint32_t)((uint32_t) Image$$ARM_LIB_STACK$$ZI$$Base - (uint32_t) HEAP_START)) +#endif + +#define HEAP_LIMIT ((uint32_t)((uint32_t)HEAP_START + (uint32_t)HEAP_SIZE)) extern "C" MBED_WEAK __value_in_regs struct __initial_stackheap _mbed_user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) { - uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit; - uint32_t sp_limit = __current_sp(); + uint32_t heap_base = (uint32_t)HEAP_START; + struct __initial_stackheap r; - zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned + // Ensure heap_base is 8-byte aligned + heap_base = (heap_base + 7) & ~0x7; + r.heap_base = (uint32_t)heap_base; + r.heap_limit = (uint32_t)HEAP_LIMIT; - struct __initial_stackheap r; - r.heap_base = zi_limit; - r.heap_limit = sp_limit; return r; } +extern "C" __value_in_regs struct __argc_argv $Super$$__rt_lib_init(unsigned heapbase, unsigned heaptop); + +extern "C" __value_in_regs struct __argc_argv $Sub$$__rt_lib_init(unsigned heapbase, unsigned heaptop) +{ + return $Super$$__rt_lib_init((unsigned)HEAP_START, (unsigned)HEAP_LIMIT); +} + extern "C" __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) { return _mbed_user_setup_stackheap(R0, R1, R2, R3); @@ -1211,46 +1234,22 @@ extern "C" WEAK void __cxa_pure_virtual(void) // SP. This make it compatible with RTX RTOS thread stacks. #if defined(TOOLCHAIN_GCC_ARM) -#if defined(TARGET_CORTEX_A) || (defined(TARGET_TFM) && defined(COMPONENT_SPE)) -extern "C" uint32_t __HeapLimit; -#endif +extern "C" uint32_t __end__; +extern "C" uint32_t __HeapLimit; // Turn off the errno macro and use actual global variable instead. #undef errno extern "C" int errno; -// Dynamic memory allocation related syscall. -#if defined(TWO_RAM_REGIONS) - -// Overwrite _sbrk() to support two region model (heap and stack are two distinct regions). -// __wrap__sbrk() is implemented in: -// TARGET_STM32L4 targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4/l4_retarget.c -extern "C" void *__wrap__sbrk(int incr); -extern "C" caddr_t _sbrk(int incr) -{ - return (caddr_t) __wrap__sbrk(incr); -} -#else -// Linker defined symbol used by _sbrk to indicate where heap should start. -extern "C" uint32_t __end__; // Weak attribute allows user to override, e.g. to use external RAM for dynamic memory. extern "C" WEAK caddr_t _sbrk(int incr) { - static unsigned char *heap = (unsigned char *)&__end__; - unsigned char *prev_heap = heap; - unsigned char *new_heap = heap + incr; - -#if defined(TARGET_CORTEX_A) || (defined(TARGET_TFM) && defined(COMPONENT_SPE)) - if (new_heap >= (unsigned char *)&__HeapLimit) { /* __HeapLimit is end of heap section */ -#else - if (new_heap >= (unsigned char *)__get_MSP()) { -#endif - errno = ENOMEM; - return (caddr_t) -1; - } + static uint32_t heap = (uint32_t) &__end__; + uint32_t prev_heap = heap; + uint32_t new_heap = heap + incr; - // Additional heap checking if set - if (mbed_heap_size && (new_heap >= mbed_heap_start + mbed_heap_size)) { + /* __HeapLimit is end of heap section */ + if (new_heap > (uint32_t) &__HeapLimit) { errno = ENOMEM; return (caddr_t) -1; } @@ -1259,7 +1258,6 @@ extern "C" WEAK caddr_t _sbrk(int incr) return (caddr_t) prev_heap; } #endif -#endif #if defined(TOOLCHAIN_GCC_ARM) extern "C" void _exit(int return_code) diff --git a/platform/mbed_sdk_boot.c b/platform/mbed_sdk_boot.c index 9f3aef1899f..e56d7d07857 100644 --- a/platform/mbed_sdk_boot.c +++ b/platform/mbed_sdk_boot.c @@ -68,7 +68,7 @@ void mbed_copy_nvic(void) /* Toolchain specific main code */ -#if defined (__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 5010060)) +#if defined (__ARMCC_VERSION) int $Super$$main(void); diff --git a/rtos/TARGET_CORTEX/TOOLCHAIN_ARM_STD/mbed_boot_arm_std.c b/rtos/TARGET_CORTEX/TOOLCHAIN_ARM_STD/mbed_boot_arm_std.c index 8eb4f1ce473..412058517d5 100644 --- a/rtos/TARGET_CORTEX/TOOLCHAIN_ARM_STD/mbed_boot_arm_std.c +++ b/rtos/TARGET_CORTEX/TOOLCHAIN_ARM_STD/mbed_boot_arm_std.c @@ -27,18 +27,14 @@ __value_in_regs struct __argc_argv __rt_lib_init(unsigned heapbase, unsigned heaptop); void _platform_post_stackheap_init(void); -#if !defined(ISR_STACK_SIZE) extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[]; extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Length[]; -#define ISR_STACK_START ((unsigned char*)Image$$ARM_LIB_STACK$$ZI$$Base) -#define ISR_STACK_SIZE ((uint32_t)Image$$ARM_LIB_STACK$$ZI$$Length) -#endif #if !defined(HEAP_START) -/* Defined by linker script */ -extern uint32_t Image$$RW_IRAM1$$ZI$$Limit[]; -#define HEAP_START ((unsigned char*)Image$$RW_IRAM1$$ZI$$Limit) -#define HEAP_SIZE ((uint32_t)((uint32_t)ISR_STACK_START - (uint32_t)HEAP_START)) +// Heap here is considered starting after ZI ends to Stack start +extern uint32_t Image$$RW_IRAM1$$ZI$$Limit[]; +#define HEAP_START Image$$RW_IRAM1$$ZI$$Limit +#define HEAP_SIZE ((uint32_t)((uint32_t)Image$$ARM_LIB_STACK$$ZI$$Base - (uint32_t)HEAP_START)) #endif /* @@ -58,23 +54,11 @@ extern uint32_t Image$$RW_IRAM1$$ZI$$Limit[]; */ void __rt_entry(void) { - unsigned char *free_start = HEAP_START; - uint32_t free_size = HEAP_SIZE; - -#ifdef ISR_STACK_START - /* Interrupt stack explicitly specified */ - mbed_stack_isr_size = ISR_STACK_SIZE; - mbed_stack_isr_start = ISR_STACK_START; -#else - /* Interrupt stack - reserve space at the end of the free block */ - mbed_stack_isr_size = ISR_STACK_SIZE < free_size ? ISR_STACK_SIZE : free_size; - mbed_stack_isr_start = free_start + free_size - mbed_stack_isr_size; - free_size -= mbed_stack_isr_size; -#endif + mbed_stack_isr_start = (unsigned char *) Image$$ARM_LIB_STACK$$ZI$$Base; + mbed_stack_isr_size = (uint32_t) Image$$ARM_LIB_STACK$$ZI$$Length; + mbed_heap_start = (unsigned char *) HEAP_START; + mbed_heap_size = (uint32_t) HEAP_SIZE; - /* Heap - everything else */ - mbed_heap_size = free_size; - mbed_heap_start = free_start; mbed_init(); _platform_post_stackheap_init(); diff --git a/rtos/TARGET_CORTEX/TOOLCHAIN_GCC_ARM/mbed_boot_gcc_arm.c b/rtos/TARGET_CORTEX/TOOLCHAIN_GCC_ARM/mbed_boot_gcc_arm.c index 3921a3f7d16..c3a9eb9650a 100644 --- a/rtos/TARGET_CORTEX/TOOLCHAIN_GCC_ARM/mbed_boot_gcc_arm.c +++ b/rtos/TARGET_CORTEX/TOOLCHAIN_GCC_ARM/mbed_boot_gcc_arm.c @@ -29,19 +29,10 @@ static osMutexId_t env_mutex_id; static mbed_rtos_storage_mutex_t env_mutex_obj; static osMutexAttr_t env_mutex_attr; -#if !defined(ISR_STACK_SIZE) -extern uint32_t __StackLimit; -extern uint32_t __StackTop; -#define ISR_STACK_START ((unsigned char*)&__StackLimit) -#define ISR_STACK_SIZE ((uint32_t)((uint32_t)&__StackTop - (uint32_t)&__StackLimit)) -#endif - -#if !defined(HEAP_START) -/* Defined by linker script */ -extern uint32_t __end__[]; -#define HEAP_START ((unsigned char*)__end__) -#define HEAP_SIZE ((uint32_t)((uint32_t)ISR_STACK_START - (uint32_t)HEAP_START)) -#endif +extern uint32_t __StackLimit; +extern uint32_t __StackTop; +extern uint32_t __end__; +extern uint32_t __HeapLimit; extern void __libc_init_array(void); @@ -52,24 +43,10 @@ extern void __libc_init_array(void); */ void software_init_hook(void) { - unsigned char *free_start = HEAP_START; - uint32_t free_size = HEAP_SIZE; - -#ifdef ISR_STACK_START - /* Interrupt stack explicitly specified */ - mbed_stack_isr_size = ISR_STACK_SIZE; - mbed_stack_isr_start = ISR_STACK_START; -#else - /* Interrupt stack - reserve space at the end of the free block */ - mbed_stack_isr_size = ISR_STACK_SIZE < free_size ? ISR_STACK_SIZE : free_size; - mbed_stack_isr_start = free_start + free_size - mbed_stack_isr_size; - free_size -= mbed_stack_isr_size; -#endif - - /* Heap - everything else */ - mbed_heap_size = free_size; - mbed_heap_start = free_start; - + mbed_stack_isr_start = (unsigned char *) &__StackLimit; + mbed_stack_isr_size = (uint32_t) &__StackTop - (uint32_t) &__StackLimit; + mbed_heap_start = (unsigned char *) &__end__; + mbed_heap_size = (uint32_t) &__HeapLimit - (uint32_t) &__end__; mbed_init(); mbed_rtos_start(); diff --git a/rtos/TARGET_CORTEX/mbed_boot.c b/rtos/TARGET_CORTEX/mbed_boot.c index c3f691888b2..1f2460ba7ea 100644 --- a/rtos/TARGET_CORTEX/mbed_boot.c +++ b/rtos/TARGET_CORTEX/mbed_boot.c @@ -40,34 +40,18 @@ * Memory layout notes: * ==================== * - * IAR Default Memory layout notes: - * -Heap defined by "HEAP" region in .icf file - * -Interrupt stack defined by "CSTACK" region in .icf file - * -Value INITIAL_SP is ignored - * - * IAR Custom Memory layout notes: - * -There is no custom layout available for IAR - everything must be defined in - * the .icf file and use the default layout - * - * - * GCC Default Memory layout notes: - * -Block of memory from symbol __end__ to define INITIAL_SP used to setup interrupt - * stack and heap in the function set_stack_heap() - * -ISR_STACK_SIZE can be overridden to be larger or smaller - * - * GCC Custom Memory layout notes: - * -Heap can be explicitly placed by defining both HEAP_START and HEAP_SIZE - * -Interrupt stack can be explicitly placed by defining both ISR_STACK_START and ISR_STACK_SIZE - * - * - * ARM Memory layout - * -Block of memory from end of region "RW_IRAM1" to define INITIAL_SP used to setup interrupt - * stack and heap in the function set_stack_heap() - * -ISR_STACK_SIZE can be overridden to be larger or smaller - * - * ARM Custom Memory layout notes: - * -Heap can be explicitly placed by defining both HEAP_START and HEAP_SIZE - * -Interrupt stack can be explicitly placed by defining both ISR_STACK_START and ISR_STACK_SIZE + * IAR Memory layout : + * - Heap defined by "HEAP" region in .icf file + * - Interrupt stack defined by "CSTACK" region in .icf file + * - Value INITIAL_SP is ignored + * + * GCC Memory layout : + * - Heap explicitly placed in linker script (*.ld file) and heap start (__end___) and heap end (__HeapLimit) should be defined in linker script + * - Interrupt stack placed in linker script **.ld file) and stack start (__StackTop) and stack end (__StackLimit) should be defined in linker script + * + * ARM Memory layout : + * - Heap can be explicitly placed by adding ARM_LIB_HEAP section in scatter file and defining both HEAP_START and HEAP_SIZE + * - Interrupt stack placed in scatter files (*.sct) by adding ARM_LIB_STACK section * */ diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld index e791e0baaf2..caba1ee8634 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -202,6 +202,7 @@ SECTIONS PROVIDE(end = .); __HeapBase = .; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; __heap_limit = .; /* Add for _sbrk */ } > RAM diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_GCC_ARM/MPS2.ld index 0c7568e2bb6..a9b1f9979c5 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -202,6 +202,7 @@ SECTIONS PROVIDE(end = .); __HeapBase = .; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; __heap_limit = .; /* Add for _sbrk */ } > RAM diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_GCC_ARM/MPS2.ld index 2990cee1dec..f68d5566c6b 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -202,6 +202,7 @@ SECTIONS PROVIDE(end = .); __HeapBase = .; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; __heap_limit = .; /* Add for _sbrk */ } > RAM diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_GCC_ARM/MPS2.ld index 6d3557e00fe..151501f1e45 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -202,6 +202,7 @@ SECTIONS PROVIDE(end = .); __HeapBase = .; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; __heap_limit = .; /* Add for _sbrk */ } > RAM diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_GCC_ARM/MPS2.ld index 7fdc930e1b7..4ba2050e8d8 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -202,6 +202,7 @@ SECTIONS PROVIDE(end = .); __HeapBase = .; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; __heap_limit = .; /* Add for _sbrk */ } > RAM diff --git a/targets/TARGET_ARM_FM/mbed_rtx.h b/targets/TARGET_ARM_FM/mbed_rtx.h index 85b1a4eee87..ce1f1e5c0df 100644 --- a/targets/TARGET_ARM_FM/mbed_rtx.h +++ b/targets/TARGET_ARM_FM/mbed_rtx.h @@ -24,7 +24,6 @@ #define INITIAL_SP (ZBT_SRAM2_START + ZBT_SRAM2_SIZE) #endif - #endif /* defined(TARGET_...) */ #endif /* MBED_MBED_RTX_H */ diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_GCC_ARM/samd21g18a.ld b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_GCC_ARM/samd21g18a.ld index 7c1a79b9b23..b5c27ac3e6f 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_GCC_ARM/samd21g18a.ld +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_GCC_ARM/samd21g18a.ld @@ -105,6 +105,7 @@ MEMORY { . = ALIGN(8); __end__ = . ; . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; + __HeapLimit = .; } > ram /* stack section */ diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_GCC_ARM/samd21j18a.ld b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_GCC_ARM/samd21j18a.ld index d35c80cbe2f..52f2992e41a 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_GCC_ARM/samd21j18a.ld +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_GCC_ARM/samd21j18a.ld @@ -105,6 +105,7 @@ MEMORY { . = ALIGN(8); __end__ = . ; . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; + __HeapLimit = .; } > ram /* stack section */ diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_GCC_ARM/saml21j18a.ld b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_GCC_ARM/saml21j18a.ld index 68a37eda361..3797cf95d4f 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_GCC_ARM/saml21j18a.ld +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_GCC_ARM/saml21j18a.ld @@ -105,6 +105,7 @@ MEMORY { . = ALIGN(8); __end__ = . ; . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; + __HeapLimit = .; } > ram /* stack section */ diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_GCC_ARM/samr21g18a.ld b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_GCC_ARM/samr21g18a.ld index a547756f2cd..9c04e8d1bcb 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_GCC_ARM/samr21g18a.ld +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_GCC_ARM/samr21g18a.ld @@ -105,6 +105,7 @@ MEMORY { . = ALIGN(8); __end__ = . ; . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; + __HeapLimit = .; } > ram /* stack section */ diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM4/TARGET_SAMG55J19/device/TOOLCHAIN_GCC_ARM/samg55j19.ld b/targets/TARGET_Atmel/TARGET_SAM_CortexM4/TARGET_SAMG55J19/device/TOOLCHAIN_GCC_ARM/samg55j19.ld index 85291c7d5de..2ffdfb67c29 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM4/TARGET_SAMG55J19/device/TOOLCHAIN_GCC_ARM/samg55j19.ld +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM4/TARGET_SAMG55J19/device/TOOLCHAIN_GCC_ARM/samg55j19.ld @@ -105,6 +105,7 @@ MEMORY { . = ALIGN(8); __end__ = . ; . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; + __HeapLimit = .; } > ram /* stack section */ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_4343W/device/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_4343W/device/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld index 8b0f1ec04dd..f580494c6bc 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_4343W/device/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_4343W/device/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld @@ -314,6 +314,7 @@ SECTIONS __end__ = .; end = __end__; KEEP(*(.heap*)) + . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; __HeapLimit = .; } > ram diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld index fad6275f262..4003149ad10 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld @@ -314,6 +314,7 @@ SECTIONS __end__ = .; end = __end__; KEEP(*(.heap*)) + . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; __HeapLimit = .; } > ram diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld index fad6275f262..4003149ad10 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld @@ -314,6 +314,7 @@ SECTIONS __end__ = .; end = __end__; KEEP(*(.heap*)) + . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; __HeapLimit = .; } > ram diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CMOD_062_4343W/device/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CMOD_062_4343W/device/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld index 8b0f1ec04dd..f580494c6bc 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CMOD_062_4343W/device/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CMOD_062_4343W/device/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld @@ -314,6 +314,7 @@ SECTIONS __end__ = .; end = __end__; KEEP(*(.heap*)) + . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; __HeapLimit = .; } > ram diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW943012P6EVB_01/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW943012P6EVB_01/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld index fad6275f262..4003149ad10 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW943012P6EVB_01/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW943012P6EVB_01/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld @@ -314,6 +314,7 @@ SECTIONS __end__ = .; end = __end__; KEEP(*(.heap*)) + . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; __HeapLimit = .; } > ram diff --git a/targets/TARGET_Cypress/TARGET_PSOC6_FUTURE/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld b/targets/TARGET_Cypress/TARGET_PSOC6_FUTURE/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld index 9de1257d3fa..98cd01d7521 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6_FUTURE/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6_FUTURE/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld @@ -297,6 +297,7 @@ SECTIONS __end__ = .; end = __end__; KEEP(*(.heap*)) + . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; __HeapLimit = .; } > ram diff --git a/targets/TARGET_Cypress/TARGET_PSOC6_FUTURE/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld b/targets/TARGET_Cypress/TARGET_PSOC6_FUTURE/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld index f65b095fff3..3c3d9cb3cd6 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6_FUTURE/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6_FUTURE/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld @@ -295,6 +295,7 @@ SECTIONS __end__ = .; end = __end__; KEEP(*(.heap*)) + . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; __HeapLimit = .; } > ram diff --git a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_ARM_STD/MK20D5.sct b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_ARM_STD/MK20D5.sct index ee7bf245cc8..30354ca1f7a 100644 --- a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_ARM_STD/MK20D5.sct +++ b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_ARM_STD/MK20D5.sct @@ -14,10 +14,14 @@ LR_IROM1 0x00000000 0x20000 { ; load region size_region (132k) } ; 8_byte_aligned(62 vect * 4 bytes) = 8_byte_aligned(0xF8) = 0xF8 ; 0x4000 - 0xF8 = 0x3F08 - RW_IRAM1 0x1FFFE0F8 0x3F08-Stack_Size { + RW_IRAM1 0x1FFFE0F8 0x3F08 { .ANY (+RW +ZI) } - ARM_LIB_STACK 0x1FFFE0F8+0x3F08 EMPTY -Stack_Size { ; Stack region growing down + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x1FFFE000+0x4000-Stack_Size-AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap region growing up + } + + ARM_LIB_STACK 0x1FFFE000+0x4000 EMPTY -Stack_Size { ; Stack region growing down } } diff --git a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_GCC_ARM/MK20D5.ld b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_GCC_ARM/MK20D5.ld index 01a9d637dcd..d8f919f2528 100644 --- a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_GCC_ARM/MK20D5.ld +++ b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_GCC_ARM/MK20D5.ld @@ -147,6 +147,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device/TOOLCHAIN_ARM_STD/MK20DX256.sct b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device/TOOLCHAIN_ARM_STD/MK20DX256.sct index 88fcdc0a580..5624a27d43e 100644 --- a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device/TOOLCHAIN_ARM_STD/MK20DX256.sct +++ b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device/TOOLCHAIN_ARM_STD/MK20DX256.sct @@ -14,9 +14,13 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k) } ; 8_byte_aligned(112 vect * 4 bytes) = 8_byte_aligned(0x1C0) = 0x1C0 ; 0x10000 - 0x1C0 = 0xFE40 - RW_IRAM1 0x1FFF81C0 0xFE40-Stack_Size { + RW_IRAM1 0x1FFF81C0 0xFE40 { .ANY (+RW +ZI) } - ARM_LIB_STACK 0x1FFF81C0+0xFE40 EMPTY -Stack_Size { ; Stack region growing down + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x1FFF8000+0x10000-Stack_Size-AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap region growing up + } + + ARM_LIB_STACK 0x1FFF8000+0x10000 EMPTY -Stack_Size { ; Stack region growing down } } diff --git a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device/TOOLCHAIN_GCC_ARM/MK20DX256.ld b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device/TOOLCHAIN_GCC_ARM/MK20DX256.ld index 64e4f2831f1..243b82a6efb 100644 --- a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device/TOOLCHAIN_GCC_ARM/MK20DX256.ld +++ b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device/TOOLCHAIN_GCC_ARM/MK20DX256.ld @@ -148,6 +148,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_ARM_STD/MKL05Z4.sct b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_ARM_STD/MKL05Z4.sct index 4b8533287bd..04c532dbdf4 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_ARM_STD/MKL05Z4.sct +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_ARM_STD/MKL05Z4.sct @@ -14,9 +14,13 @@ LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) } ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 ; 0x1000 - 0xC0 = 0xF40 - RW_IRAM1 0x1FFFFCC0 0xF40-Stack_Size { + RW_IRAM1 0x1FFFF000 0xF40 { .ANY (+RW +ZI) } - ARM_LIB_STACK 0x1FFFFCC0+0xF40 EMPTY -Stack_Size { ; Stack region growing down + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x1FFFF000+0x1000-Stack_Size-AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap region growing up + } + + ARM_LIB_STACK 0x1FFFF000+0x1000 EMPTY -Stack_Size { ; Stack region growing down } } diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_GCC_ARM/MKL05Z4.ld b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_GCC_ARM/MKL05Z4.ld index 75fe86f173e..bbd0d7f588f 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_GCC_ARM/MKL05Z4.ld +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_GCC_ARM/MKL05Z4.ld @@ -138,6 +138,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + .= ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct index b171491a5f4..2bd884450af 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct @@ -12,12 +12,17 @@ LR_IROM1 0x00000000 0x20000 { ; load region size_region (32k) *(InRoot$$Sections) .ANY (+RO) } + ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 ; 0x4000 - 0xC0 = 0x3F40 - RW_IRAM1 0x1FFFF0C0 0x3F40-Stack_Size { + RW_IRAM1 0x1FFFF0C0 0x3F40 { .ANY (+RW +ZI) } - ARM_LIB_STACK 0x1FFFF0C0+0x3F40 EMPTY -Stack_Size { ; Stack region growing down + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x1FFFF000+0x4000-Stack_Size-AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap region growing up + } + + ARM_LIB_STACK 0x1FFFF000+0x4000 EMPTY -Stack_Size { ; Stack region growing down } } diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_ARM/MKL25Z4.ld b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_ARM/MKL25Z4.ld index d1d0125a05b..27567fdc18d 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_ARM/MKL25Z4.ld +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_ARM/MKL25Z4.ld @@ -147,6 +147,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_GCC_ARM/MKL26Z4.ld b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_GCC_ARM/MKL26Z4.ld index d1d0125a05b..27567fdc18d 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_GCC_ARM/MKL26Z4.ld +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_GCC_ARM/MKL26Z4.ld @@ -147,6 +147,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct index b736beb0cf6..240279cc1d6 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct @@ -14,10 +14,14 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k) } ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 ; 0x8000 - 0xC0 = 0x7F40 - RW_IRAM1 0x1FFFE0C0 0x7F40-Stack_Size { + RW_IRAM1 0x1FFFE0C0 0x7F40 { .ANY (+RW +ZI) } - ARM_LIB_STACK 0x1FFFE0C0+0x7F40 EMPTY -Stack_Size { ; Stack region growing down + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x1FFFE000+0x8000-Stack_Size-AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap region growing up + } + + ARM_LIB_STACK 0x1FFFE000+0x8000 EMPTY -Stack_Size { ; Stack region growing down } } diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_GCC_ARM/MKL46Z4.ld b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_GCC_ARM/MKL46Z4.ld index 709d473daa9..598380d50e2 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_GCC_ARM/MKL46Z4.ld +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_GCC_ARM/MKL46Z4.ld @@ -147,6 +147,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct index 7e4b127455d..6b60940001c 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct @@ -92,12 +92,6 @@ #define Stack_Size MBED_BOOT_STACK_SIZE #endif -#if (defined(__heap_size__)) - #define Heap_Size __heap_size__ -#else - #define Heap_Size 0x0400 -#endif - LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address * (RESET,+FIRST) @@ -122,10 +116,12 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; lo RW_m_data m_data_start m_data_size { ; RW data .ANY (+RW +ZI) } - RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data + RW_m_data_2 m_data_2_start m_data_2_size { ; RW data .ANY (+RW +ZI) } - RW_IRAM1 ImageLimit(RW_m_data_2) { ; Heap region growing up + RW_IRAM1 ImageLimit(RW_m_data_2) { + } + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (m_data_2_start + m_data_2_size - Stack_Size - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap region growing up } ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down } diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_GCC_ARM/MK66FN2M0xxx18.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_GCC_ARM/MK66FN2M0xxx18.ld index 76dda197a47..be721cab0f9 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_GCC_ARM/MK66FN2M0xxx18.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_GCC_ARM/MK66FN2M0xxx18.ld @@ -57,8 +57,6 @@ __ram_vector_table__ = 1; * the stack where main runs is determined via the RTOS. */ __stack_size__ = MBED_BOOT_STACK_SIZE; -__heap_size__ = 0x6000; - #if !defined(MBED_APP_START) #define MBED_APP_START 0 #endif @@ -67,7 +65,6 @@ __heap_size__ = 0x6000; #define MBED_APP_SIZE 0x200000 #endif -HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0400 : 0x0; M_CRASH_DATA_RAM_SIZE = 0x100; @@ -253,7 +250,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); __HeapBase = .; - . += HEAP_SIZE; + . = ORIGIN(m_data_2) + LENGTH(m_data_2) - STACK_SIZE; __HeapLimit = .; __heap_limit = .; /* Add for _sbrk */ } > m_data_2 diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct index b780a35be2d..db753599413 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct @@ -119,10 +119,12 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load RW_m_data m_data_start m_data_size { ; RW data .ANY (+RW +ZI) } - RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data + RW_m_data_2 m_data_2_start m_data_2_size { ; RW data .ANY (+RW +ZI) } - RW_IRAM1 ImageLimit(RW_m_data_2) { ; Heap region growing up + RW_IRAM1 ImageLimit(RW_m_data_2) { + } + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (m_data_2_start + m_data_2_size - Stack_Size - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap region growing up } ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down } diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_GCC_ARM/MK82FN256xxx15.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_GCC_ARM/MK82FN256xxx15.ld index 4df3cc9e8df..e345bc9092b 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_GCC_ARM/MK82FN256xxx15.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_GCC_ARM/MK82FN256xxx15.ld @@ -60,9 +60,6 @@ __ram_vector_table__ = 1; * the stack where main runs is determined via the RTOS. */ __stack_size__ = MBED_BOOT_STACK_SIZE; -__heap_size__ = 0x6000; - -HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x03C0 : 0x0; @@ -247,7 +244,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); __HeapBase = .; - . += HEAP_SIZE; + . = ORIGIN(m_data_2) + LENGTH(m_data_2) - STACK_SIZE; __HeapLimit = .; __heap_limit = .; /* Add for _sbrk */ } > m_data_2 diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct index 2ad3b089a56..ea89ca13d65 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct @@ -82,12 +82,6 @@ #define Stack_Size MBED_BOOT_STACK_SIZE #endif -#if (defined(__heap_size__)) - #define Heap_Size __heap_size__ -#else - #define Heap_Size 0x0400 -#endif - LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address * (RESET,+FIRST) @@ -107,10 +101,12 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; lo VECTOR_RAM m_interrupts_start EMPTY 0 { } #endif - RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data + RW_m_data m_data_start m_data_size { ; RW data .ANY (+RW +ZI) } - RW_IRAM1 +0 { ; Heap region growing up + RW_IRAM1 +0 { + } + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (m_data_start + m_data_size - Stack_Size - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap region growing up } ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down } diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_GCC_ARM/MKL27Z64xxx4.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_GCC_ARM/MKL27Z64xxx4.ld index 0775ebe86d3..17844afbbd7 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_GCC_ARM/MKL27Z64xxx4.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_GCC_ARM/MKL27Z64xxx4.ld @@ -57,13 +57,8 @@ __ram_vector_table__ = 1; #define MBED_BOOT_STACK_SIZE 0x400 #endif -/* With the RTOS in use, this does not affect the main stack size. The size of - * the stack where main runs is determined via the RTOS. */ __stack_size__ = MBED_BOOT_STACK_SIZE; -/* With the RTOS in use, this does not affect the main heap size. */ -__heap_size__ = 0x0; -HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0200 : 0x0; @@ -249,7 +244,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); __HeapBase = .; - . += HEAP_SIZE; + . = ORIGIN(m_data) + LENGTH(m_data) - STACK_SIZE; __HeapLimit = .; __heap_limit = .; /* Add for _sbrk */ } > m_data diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct index fe3a7917c7a..98f5dd3a467 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct @@ -80,12 +80,6 @@ #define Stack_Size MBED_BOOT_STACK_SIZE #endif -#if (defined(__heap_size__)) - #define Heap_Size __heap_size__ -#else - #define Heap_Size 0x0400 -#endif - LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address * (RESET,+FIRST) @@ -105,10 +99,12 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load VECTOR_RAM m_interrupts_start EMPTY 0 { } #endif - RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data + RW_m_data m_data_start m_data_size { ; RW data .ANY (+RW +ZI) } - RW_IRAM1 +0 { ; Heap region growing up + RW_IRAM1 +0 { + } + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (m_data_start + m_data_size - Stack_Size - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap region growing up } ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down } diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_GCC_ARM/MKL43Z256xxx4.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_GCC_ARM/MKL43Z256xxx4.ld index 8b0d6c78204..67370a5b29d 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_GCC_ARM/MKL43Z256xxx4.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_GCC_ARM/MKL43Z256xxx4.ld @@ -58,9 +58,6 @@ __ram_vector_table__ = 1; * the stack where main runs is determined via the RTOS. */ __stack_size__ = MBED_BOOT_STACK_SIZE; -__heap_size__ = 0x2800; - -HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0200 : 0x0; @@ -246,7 +243,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); __HeapBase = .; - . += HEAP_SIZE; + . = ORIGIN(m_data) + LENGTH(m_data) - STACK_SIZE; __HeapLimit = .; __heap_limit = .; /* Add for _sbrk */ } > m_data diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_ARM_STD/MKL82Z128xxx7.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_ARM_STD/MKL82Z128xxx7.sct index f6dc71617bd..38c09790b5d 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_ARM_STD/MKL82Z128xxx7.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_ARM_STD/MKL82Z128xxx7.sct @@ -92,12 +92,6 @@ #define Stack_Size MBED_BOOT_STACK_SIZE #endif -#if (defined(__heap_size__)) - #define Heap_Size __heap_size__ -#else - #define Heap_Size 0x0400 -#endif - LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address * (RESET,+FIRST) @@ -120,10 +114,12 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load VECTOR_RAM m_interrupts_start EMPTY 0 { } #endif - RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data + RW_m_data m_data_start m_data_size { ; RW data .ANY (+RW +ZI) } - RW_IRAM1 +0 { ; Heap region growing up + RW_IRAM1 +0 { + } + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (m_data_start + m_data_size - Stack_Size - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap region growing up } ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down } diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_GCC_ARM/MKL82Z128xxx7.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_GCC_ARM/MKL82Z128xxx7.ld index 35b92a4f008..b7da21905e3 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_GCC_ARM/MKL82Z128xxx7.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_GCC_ARM/MKL82Z128xxx7.ld @@ -61,9 +61,6 @@ __ram_vector_table__ = 1; * the stack where main runs is determined via the RTOS. */ __stack_size__ = MBED_BOOT_STACK_SIZE; -__heap_size__ = 0x6000; - -HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0140 : 0x0; @@ -258,7 +255,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); __HeapBase = .; - . += HEAP_SIZE; + . = ORIGIN(m_data) + LENGTH(m_data) - STACK_SIZE; __HeapLimit = .; __heap_limit = .; /* Add for _sbrk */ } > m_data diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_ARM_STD/MKW24D512xxx5.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_ARM_STD/MKW24D512xxx5.sct index 295ed6e98ab..d979b3dafaa 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_ARM_STD/MKW24D512xxx5.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_ARM_STD/MKW24D512xxx5.sct @@ -88,12 +88,6 @@ #define Stack_Size MBED_BOOT_STACK_SIZE #endif -#if (defined(__heap_size__)) - #define Heap_Size __heap_size__ -#else - #define Heap_Size 0x0400 -#endif - LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address * (RESET,+FIRST) @@ -116,10 +110,12 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load RW_m_data m_data_start m_data_size { ; RW data .ANY (+RW +ZI) } - RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data + RW_m_data_2 m_data_2_start m_data_2_size { ; RW data .ANY (+RW +ZI) } - RW_IRAM1 ImageLimit(RW_m_data_2) { ; Heap region growing up + RW_IRAM1 ImageLimit(RW_m_data_2) { + } + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (m_data_2_start + m_data_2_size - Stack_Size - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap region growing up } ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down } diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_GCC_ARM/MKW24D512xxx5.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_GCC_ARM/MKW24D512xxx5.ld index 11029890da4..a5d44b1081e 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_GCC_ARM/MKW24D512xxx5.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_GCC_ARM/MKW24D512xxx5.ld @@ -56,8 +56,6 @@ __ram_vector_table__ = 1; * the stack where main runs is determined via the RTOS. */ __stack_size__ = MBED_BOOT_STACK_SIZE; -__heap_size__ = 0x4000; - #if !defined(MBED_APP_START) #define MBED_APP_START 0 #endif @@ -66,7 +64,6 @@ __heap_size__ = 0x4000; #define MBED_APP_SIZE 0x80000 #endif -HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0400 : 0x0; @@ -243,7 +240,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); __HeapBase = .; - . += HEAP_SIZE; + . = ORIGIN(m_data_2) + LENGTH(m_data_2) - STACK_SIZE; __HeapLimit = .; __heap_limit = .; /* Add for _sbrk */ } > m_data_2 diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct index 05b2803a5d9..bfcdea89346 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct @@ -85,12 +85,6 @@ #define Stack_Size MBED_BOOT_STACK_SIZE #endif -#if (defined(__heap_size__)) - #define Heap_Size __heap_size__ -#else - #define Heap_Size 0x0400 -#endif - LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address * (RESET,+FIRST) @@ -110,10 +104,12 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load VECTOR_RAM m_interrupts_start EMPTY 0 { } #endif - RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data + RW_m_data m_data_start m_data_size { ; RW data .ANY (+RW +ZI) } - RW_IRAM1 +0 { ; Heap region growing up + RW_IRAM1 +0 { + } + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (m_data_start + m_data_size - Stack_Size - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap region growing up } ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down } diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_GCC_ARM/MKW41Z512xxx4.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_GCC_ARM/MKW41Z512xxx4.ld index 3c47f304062..f8087641fd0 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_GCC_ARM/MKW41Z512xxx4.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_GCC_ARM/MKW41Z512xxx4.ld @@ -60,13 +60,8 @@ __ram_vector_table__ = 1; #define MBED_BOOT_STACK_SIZE 0x400 #endif -/* With the RTOS in use, this does not affect the main stack size. The size of - * the stack where main runs is determined via the RTOS. */ __stack_size__ = MBED_BOOT_STACK_SIZE; -__heap_size__ = 0x6000; - -HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0200 : 0x0; @@ -248,7 +243,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); __HeapBase = .; - . += HEAP_SIZE; + . = ORIGIN(m_data) + LENGTH(m_data) - STACK_SIZE; __HeapLimit = .; __heap_limit = .; /* Add for _sbrk */ } > m_data diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct index 085982585f4..55dcd6101a1 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct @@ -86,12 +86,6 @@ #define Stack_Size MBED_BOOT_STACK_SIZE #endif -#if (defined(__heap_size__)) - #define Heap_Size __heap_size__ -#else - #define Heap_Size 0x0400 -#endif - LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address * (RESET,+FIRST) @@ -114,12 +108,13 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; lo RW_m_data m_data_start m_data_size { ; RW data .ANY (+RW +ZI) } - RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data + RW_m_data_2 m_data_2_start m_data_2_size { ; RW data .ANY (+RW +ZI) } - RW_IRAM1 ImageLimit(RW_m_data_2) { ; Heap region growing up + RW_IRAM1 ImageLimit(RW_m_data_2) { + } + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (m_data_2_start + m_data_2_size - Stack_Size - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap region growing up } ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down } } - diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_GCC_ARM/MK22FN512xxx12.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_GCC_ARM/MK22FN512xxx12.ld index ca5767e7e03..8ae9d22cb71 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_GCC_ARM/MK22FN512xxx12.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_GCC_ARM/MK22FN512xxx12.ld @@ -60,9 +60,6 @@ ENTRY(Reset_Handler) __ram_vector_table__ = 1; __stack_size__ = MBED_BOOT_STACK_SIZE; -__heap_size__ = 0x8000; - -HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0400 : 0x0; @@ -239,7 +236,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); __HeapBase = .; - . += HEAP_SIZE; + . = ORIGIN(m_data_2) + LENGTH(m_data_2) - STACK_SIZE; __HeapLimit = .; __heap_limit = .; /* Add for _sbrk */ } > m_data_2 diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_ARM_STD/MK24FN1M0xxx12.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_ARM_STD/MK24FN1M0xxx12.sct index 701bcf3257f..17c7baf2330 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_ARM_STD/MK24FN1M0xxx12.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_ARM_STD/MK24FN1M0xxx12.sct @@ -104,13 +104,23 @@ LR_IROM1 m_interrupts_start m_text_size+m_interrupts_size+m_flash_config_size { * (InRoot$$Sections) .ANY (+RO) } + +#if (defined(__ram_vector_table__)) + VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size { + } +#else + VECTOR_RAM m_interrupts_start EMPTY 0 { + } +#endif RW_m_data m_data_start m_data_size { ; RW data .ANY (+RW +ZI) } - RW_IRAM1 m_data_2_start m_data_2_size-Stack_Size { ; RW data + RW_m_data_2 m_data_2_start m_data_2_size { ; RW data .ANY (+RW +ZI) } - VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size { + RW_IRAM1 ImageLimit(RW_m_data_2) { + } + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (m_data_2_start + m_data_2_size - Stack_Size - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap region growing up } ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down } diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_GCC_ARM/MK24FN1M0xxx12.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_GCC_ARM/MK24FN1M0xxx12.ld index 51eee8cbfd5..1cd357321b8 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_GCC_ARM/MK24FN1M0xxx12.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_GCC_ARM/MK24FN1M0xxx12.ld @@ -57,7 +57,6 @@ ENTRY(Reset_Handler) __ram_vector_table__ = 1; __stack_size__ = MBED_BOOT_STACK_SIZE; -__heap_size__ = 0x10000; #if !defined(MBED_APP_START) #define MBED_APP_START 0 @@ -67,7 +66,6 @@ __heap_size__ = 0x10000; #define MBED_APP_SIZE 0x100000 #endif -HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x8000; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x10000; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0400 : 0x0; @@ -258,7 +256,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); __HeapBase = .; - . += HEAP_SIZE; + . = ORIGIN(m_data_2) + LENGTH(m_data_2) - STACK_SIZE; __HeapLimit = .; __heap_limit = .; /* Add for _sbrk */ } > m_data_2 diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_ARM_STD/MK64FN1M0xxx12.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_ARM_STD/MK64FN1M0xxx12.sct index 76653b8e6f2..9d890e90867 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_ARM_STD/MK64FN1M0xxx12.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_ARM_STD/MK64FN1M0xxx12.sct @@ -96,13 +96,7 @@ #define Stack_Size MBED_BOOT_STACK_SIZE #endif -#if (defined(__heap_size__)) - #define Heap_Size __heap_size__ -#else - #define Heap_Size 0x0400 -#endif - -LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region +LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address * (RESET,+FIRST) } @@ -129,9 +123,9 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; lo RW_m_data_2 m_data_2_start m_data_2_size { ; RW data .ANY (+RW +ZI) } - RW_IRAM1 ImageLimit(RW_m_data_2) { ; Heap region growing up + RW_IRAM1 ImageLimit(RW_m_data_2) { } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (m_data_2_start + m_data_2_size - Stack_Size - AlignExpr(ImageLimit(RW_IRAM1), 16)) { + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (m_data_2_start + m_data_2_size - Stack_Size - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap region growing up } ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down } diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_ARM_STD/sys.cpp b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_ARM_STD/sys.cpp deleted file mode 100644 index 604ba18369c..00000000000 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_ARM_STD/sys.cpp +++ /dev/null @@ -1,86 +0,0 @@ - /* - * Copyright (c) 2019-2019 ARM Limited. All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * Setup a fixed single stack/heap memory model, - * between the top of the RW/ZI region and the stackpointer - */ - -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) -#include -#endif - -#include -#include - -extern char Image$$ARM_LIB_STACK$$ZI$$Limit[]; -extern char Image$$ARM_LIB_HEAP$$Base[]; -extern char Image$$ARM_LIB_HEAP$$ZI$$Limit[]; -extern __value_in_regs struct __initial_stackheap _mbed_user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) { - - struct __initial_stackheap r; - r.heap_base = (uint32_t)Image$$ARM_LIB_HEAP$$Base; - r.heap_limit = (uint32_t)Image$$ARM_LIB_HEAP$$ZI$$Limit; - return r; -} - -#if !defined(MBED_CONF_RTOS_PRESENT) || !MBED_CONF_RTOS_PRESENT - -/* The single region memory model would check stack collision at run time, verifying that - * the heap pointer is underneath the stack pointer. With two-region memory model/RTOS-less or - * multiple threads(stacks)/RTOS, the check gets meaningless and we must disable it. */ -#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) -__asm(".global __use_two_region_memory\n\t"); -__asm(".global __use_no_semihosting\n\t"); -#else -#pragma import(__use_two_region_memory) -#endif - -/* Fix __user_setup_stackheap and ARM_LIB_STACK/ARM_LIB_HEAP cannot co-exist in RTOS-less build - * - * According AN241 (http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0241b/index.html), - * __rt_entry has the following call sequence: - * 1. _platform_pre_stackheap_init - * 2. __user_setup_stackheap or setup the Stack Pointer (SP) by another method - * 3. _platform_post_stackheap_init - * 4. __rt_lib_init - * 5. _platform_post_lib_init - * 6. main() - * 7. exit() - * - * Per our check, when __user_setup_stackheap and ARM_LIB_STACK/ARM_LIB_HEAP co-exist, neither - * does __user_setup_stackheap get called and nor is ARM_LIB_HEAP used to get heap base/limit, - * which are required to pass to __rt_lib_init later. To fix the issue, by subclass'ing - * __rt_lib_init, heap base/limit are replaced with Image$$ARM_LIB_HEAP$$ZI$$Base/Limit if - * ARM_LIB_HEAP region is defined in scatter file. - * - * The overriding __rt_lib_init is needed only for rtos-less code. For rtos code, __rt_entry is - * overridden and the overriding __rt_lib_init here gets meaningless. - */ -extern __value_in_regs struct __argc_argv $Super$$__rt_lib_init(unsigned heapbase, unsigned heaptop); - -__value_in_regs struct __argc_argv $Sub$$__rt_lib_init (unsigned heapbase, unsigned heaptop) -{ - return $Super$$__rt_lib_init((unsigned) Image$$ARM_LIB_HEAP$$Base, (unsigned) Image$$ARM_LIB_HEAP$$ZI$$Limit); -} - -#endif - -#ifdef __cplusplus -} -#endif diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_GCC_ARM/MK64FN1M0xxx12.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_GCC_ARM/MK64FN1M0xxx12.ld index 19e7e93db9f..cbfd3cc1bcd 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_GCC_ARM/MK64FN1M0xxx12.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_GCC_ARM/MK64FN1M0xxx12.ld @@ -65,13 +65,8 @@ __ram_vector_table__ = 1; #define MBED_BOOT_STACK_SIZE 0x400 #endif -/* With the RTOS in use, this does not affect the main stack size. The size of - * the stack where main runs is determined via the RTOS. */ __stack_size__ = MBED_BOOT_STACK_SIZE; -__heap_size__ = 0x6000; - -HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0400 : 0x0; M_CRASH_DATA_RAM_SIZE = 0x100; diff --git a/targets/TARGET_Freescale/mbed_rtx.h b/targets/TARGET_Freescale/mbed_rtx.h index 172dce07a66..dc34fa5227f 100644 --- a/targets/TARGET_Freescale/mbed_rtx.h +++ b/targets/TARGET_Freescale/mbed_rtx.h @@ -89,16 +89,6 @@ #ifndef INITIAL_SP #define INITIAL_SP (0x20030000UL) -#if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) -extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Base[]; -extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Length[]; -extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[]; -extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Length[]; -#define HEAP_START ((unsigned char*) Image$$ARM_LIB_HEAP$$ZI$$Base) -#define HEAP_SIZE ((uint32_t) Image$$ARM_LIB_HEAP$$ZI$$Length) -#define ISR_STACK_START ((unsigned char*)Image$$ARM_LIB_STACK$$ZI$$Base) -#define ISR_STACK_SIZE ((uint32_t)Image$$ARM_LIB_STACK$$ZI$$Length) -#endif #endif #elif defined(TARGET_SDT64B) @@ -133,4 +123,11 @@ extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Length[]; #endif +#if defined(__ARMCC_VERSION) +extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Base[]; +extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Length[]; +#define HEAP_START Image$$ARM_LIB_HEAP$$ZI$$Base +#define HEAP_SIZE Image$$ARM_LIB_HEAP$$ZI$$Length +#endif + #endif // MBED_MBED_RTX_H diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_GCC_ARM/GD32F307xG.ld b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_GCC_ARM/GD32F307xG.ld index 11d9a976162..bb290fcf96f 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_GCC_ARM/GD32F307xG.ld +++ b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_GCC_ARM/GD32F307xG.ld @@ -110,6 +110,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_GigaDevice/mbed_rtx.h b/targets/TARGET_GigaDevice/mbed_rtx.h index b39f0f9d020..d1a4341d1c6 100644 --- a/targets/TARGET_GigaDevice/mbed_rtx.h +++ b/targets/TARGET_GigaDevice/mbed_rtx.h @@ -45,15 +45,4 @@ #endif -#if (defined(__GNUC__) && !defined(__CC_ARM) && !defined(__ARMCC_VERSION) && defined(TWO_RAM_REGIONS)) -extern uint32_t __StackLimit[]; -extern uint32_t __StackTop[]; -extern uint32_t __end__[]; -extern uint32_t __HeapLimit[]; -#define HEAP_START ((unsigned char*)__end__) -#define HEAP_SIZE ((uint32_t)((uint32_t)__HeapLimit - (uint32_t)HEAP_START)) -#define ISR_STACK_START ((unsigned char*)__StackLimit) -#define ISR_STACK_SIZE ((uint32_t)((uint32_t)__StackTop - (uint32_t)__StackLimit)) -#endif - #endif /* MBED_MBED_RTX_H */ diff --git a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_GCC_ARM/max32600.ld b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_GCC_ARM/max32600.ld index 61f4774ef29..f6081302592 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_GCC_ARM/max32600.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_GCC_ARM/max32600.ld @@ -166,6 +166,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_GCC_ARM/max32610.ld b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_GCC_ARM/max32610.ld index 953f97ef995..7b2a35b2d34 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_GCC_ARM/max32610.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_GCC_ARM/max32610.ld @@ -166,6 +166,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_GCC_ARM/max32620.ld b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_GCC_ARM/max32620.ld index 5e8a39c53d4..1247d69fd59 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_GCC_ARM/max32620.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_GCC_ARM/max32620.ld @@ -160,6 +160,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_GCC_ARM/max32620.ld b/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_GCC_ARM/max32620.ld index 5e8a39c53d4..1247d69fd59 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_GCC_ARM/max32620.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_GCC_ARM/max32620.ld @@ -160,6 +160,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625NEXPAQ/max32625.ld b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625NEXPAQ/max32625.ld index 9e012681438..1b4731f34b3 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625NEXPAQ/max32625.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625NEXPAQ/max32625.ld @@ -160,6 +160,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_BOOT/max32625.ld b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_BOOT/max32625.ld index 0dc37d66372..e694cf40651 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_BOOT/max32625.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_BOOT/max32625.ld @@ -168,6 +168,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_NO_BOOT/max32625.ld b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_NO_BOOT/max32625.ld index 8fa66025cde..7cdeb7343c4 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_NO_BOOT/max32625.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_NO_BOOT/max32625.ld @@ -160,6 +160,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_GCC_ARM/max3263x.ld b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_GCC_ARM/max3263x.ld index 639fc3853a8..f4ed40d3749 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_GCC_ARM/max3263x.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_GCC_ARM/max3263x.ld @@ -160,6 +160,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld index c37b11ae44b..fba4b46f7d0 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld @@ -238,6 +238,7 @@ SECTIONS /* Expand the heap to reach the stack boundary. */ ASSERT(. <= (ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE), "heap region overflowed into stack"); . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + __HeapLimit = .; } > RAM PROVIDE(__heap_start = ADDR(.heap)); PROVIDE(__heap_size = SIZEOF(.heap)); diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld index eb739c16f24..590dd11ad4e 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld @@ -254,6 +254,7 @@ SECTIONS /* Expand the heap to reach the stack boundary. */ ASSERT(. <= (ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE), "heap region overflowed into stack"); . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + __HeapLimit = .; } > RAM PROVIDE(__heap_start = ADDR(.heap)); PROVIDE(__heap_size = SIZEOF(.heap)); diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/device/TOOLCHAIN_GCC_ARM/m2351_retarget.c b/targets/TARGET_NUVOTON/TARGET_M2351/device/TOOLCHAIN_GCC_ARM/m2351_retarget.c deleted file mode 100644 index eb09b0281d7..00000000000 --- a/targets/TARGET_NUVOTON/TARGET_M2351/device/TOOLCHAIN_GCC_ARM/m2351_retarget.c +++ /dev/null @@ -1,42 +0,0 @@ -/****************************************************************************** - * @file startup_NUC472_442.c - * @version V0.10 - * $Revision: 11 $ - * $Date: 15/09/02 10:02a $ - * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Source File for NUC472/442 MCU - * - * @note - * Copyright (C) 2013~2015 Nuvoton Technology Corp. All rights reserved. -*****************************************************************************/ - -#include "M2351.h" -#include -#include "nu_miscutil.h" - -extern uint32_t __mbed_sbrk_start; -extern uint32_t __mbed_krbs_start; - -#define NU_HEAP_ALIGN 4 - -/* Support heap with two-region model - * - * The default implementation of _sbrk() (in mbed_retarget.cpp) for GCC_ARM requires one-region - * model (heap and stack share one region), which doesn't fit two-region model (heap and stack - * are two distinct regions), e.g., stack in internal SRAM/heap in external SRAM on NUMAKER_PFM_NUC472. - * Hence, override _sbrk() here to support heap with two-region model. - */ -void *_sbrk(int incr) -{ - static uint32_t heap_ind = (uint32_t) &__mbed_sbrk_start; - uint32_t heap_ind_old = NU_ALIGN_UP(heap_ind, NU_HEAP_ALIGN); - uint32_t heap_ind_new = NU_ALIGN_UP(heap_ind_old + incr, NU_HEAP_ALIGN); - - if (heap_ind_new > (uint32_t) &__mbed_krbs_start) { - errno = ENOMEM; - return (void *) -1; - } - - heap_ind = heap_ind_new; - - return (void *) heap_ind_old; -} diff --git a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_GCC_ARM/m451_retarget.c b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_GCC_ARM/m451_retarget.c deleted file mode 100644 index bec0577d65d..00000000000 --- a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_GCC_ARM/m451_retarget.c +++ /dev/null @@ -1,42 +0,0 @@ -/****************************************************************************** - * @file startup_NUC472_442.c - * @version V0.10 - * $Revision: 11 $ - * $Date: 15/09/02 10:02a $ - * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Source File for NUC472/442 MCU - * - * @note - * Copyright (C) 2013~2015 Nuvoton Technology Corp. All rights reserved. -*****************************************************************************/ - -#include "M451Series.h" -#include -#include "nu_miscutil.h" - -extern uint32_t __mbed_sbrk_start; -extern uint32_t __mbed_krbs_start; - -#define NU_HEAP_ALIGN 32 - -/* Support heap with two-region model - * - * The default implementation of _sbrk() (in mbed_retarget.cpp) for GCC_ARM requires one-region - * model (heap and stack share one region), which doesn't fit two-region model (heap and stack - * are two distinct regions), e.g., stack in internal SRAM/heap in external SRAM on NUMAKER_PFM_NUC472. - * Hence, override _sbrk() here to support heap with two-region model. - */ -void *_sbrk(int incr) -{ - static uint32_t heap_ind = (uint32_t) &__mbed_sbrk_start; - uint32_t heap_ind_old = NU_ALIGN_UP(heap_ind, NU_HEAP_ALIGN); - uint32_t heap_ind_new = NU_ALIGN_UP(heap_ind_old + incr, NU_HEAP_ALIGN); - - if (heap_ind_new > (uint32_t) &__mbed_krbs_start) { - errno = ENOMEM; - return (void *) -1; - } - - heap_ind = heap_ind_new; - - return (void *) heap_ind_old; -} diff --git a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_GCC_ARM/m480_retarget.c b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_GCC_ARM/m480_retarget.c deleted file mode 100644 index 378fcec9ba3..00000000000 --- a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_GCC_ARM/m480_retarget.c +++ /dev/null @@ -1,42 +0,0 @@ -/****************************************************************************** - * @file startup_NUC472_442.c - * @version V0.10 - * $Revision: 11 $ - * $Date: 15/09/02 10:02a $ - * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Source File for M480 MCU - * - * @note - * Copyright (C) 2013~2015 Nuvoton Technology Corp. All rights reserved. -*****************************************************************************/ - -#include "M480.h" -#include -#include "nu_miscutil.h" - -extern uint32_t __mbed_sbrk_start; -extern uint32_t __mbed_krbs_start; - -#define NU_HEAP_ALIGN 32 - -/* Support heap with two-region model - * - * The default implementation of _sbrk() (in mbed_retarget.cpp) for GCC_ARM requires one-region - * model (heap and stack share one region), which doesn't fit two-region model (heap and stack - * are two distinct regions), e.g., stack in internal SRAM/heap in external SRAM on NUMAKER_PFM_NUC472. - * Hence, override _sbrk() here to support heap with two-region model. - */ -void *_sbrk(int incr) -{ - static uint32_t heap_ind = (uint32_t) &__mbed_sbrk_start; - uint32_t heap_ind_old = NU_ALIGN_UP(heap_ind, NU_HEAP_ALIGN); - uint32_t heap_ind_new = NU_ALIGN_UP(heap_ind_old + incr, NU_HEAP_ALIGN); - - if (heap_ind_new > (uint32_t) &__mbed_krbs_start) { - errno = ENOMEM; - return (void *) -1; - } - - heap_ind = heap_ind_new; - - return (void *) heap_ind_old; -} diff --git a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_GCC_ARM/nano100_retarget.c b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_GCC_ARM/nano100_retarget.c deleted file mode 100644 index 1c60c0bd1b1..00000000000 --- a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_GCC_ARM/nano100_retarget.c +++ /dev/null @@ -1,42 +0,0 @@ -/****************************************************************************** - * @file startup_NUC472_442.c - * @version V0.10 - * $Revision: 11 $ - * $Date: 15/09/02 10:02a $ - * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Source File for NUC472/442 MCU - * - * @note - * Copyright (C) 2013~2015 Nuvoton Technology Corp. All rights reserved. -*****************************************************************************/ - -#include "Nano100Series.h" -#include -#include "nu_miscutil.h" - -extern uint32_t __mbed_sbrk_start; -extern uint32_t __mbed_krbs_start; - -#define NU_HEAP_ALIGN 4 - -/* Support heap with two-region model - * - * The default implementation of _sbrk() (in mbed_retarget.cpp) for GCC_ARM requires one-region - * model (heap and stack share one region), which doesn't fit two-region model (heap and stack - * are two distinct regions), e.g., stack in internal SRAM/heap in external SRAM on NUMAKER_PFM_NUC472. - * Hence, override _sbrk() here to support heap with two-region model. - */ -void *_sbrk(int incr) -{ - static uint32_t heap_ind = (uint32_t) &__mbed_sbrk_start; - uint32_t heap_ind_old = NU_ALIGN_UP(heap_ind, NU_HEAP_ALIGN); - uint32_t heap_ind_new = NU_ALIGN_UP(heap_ind_old + incr, NU_HEAP_ALIGN); - - if (heap_ind_new > (uint32_t) &__mbed_krbs_start) { - errno = ENOMEM; - return (void *) -1; - } - - heap_ind = heap_ind_new; - - return (void *) heap_ind_old; -} diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/nuc472_retarget.c b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/nuc472_retarget.c deleted file mode 100644 index bb418a7d696..00000000000 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/nuc472_retarget.c +++ /dev/null @@ -1,42 +0,0 @@ -/****************************************************************************** - * @file startup_NUC472_442.c - * @version V0.10 - * $Revision: 11 $ - * $Date: 15/09/02 10:02a $ - * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Source File for NUC472/442 MCU - * - * @note - * Copyright (C) 2013~2015 Nuvoton Technology Corp. All rights reserved. -*****************************************************************************/ - -#include "NUC472_442.h" -#include -#include "nu_miscutil.h" - -extern uint32_t __mbed_sbrk_start; -extern uint32_t __mbed_krbs_start; - -#define NU_HEAP_ALIGN 32 - -/* Support heap with two-region model - * - * The default implementation of _sbrk() (in mbed_retarget.cpp) for GCC_ARM requires one-region - * model (heap and stack share one region), which doesn't fit two-region model (heap and stack - * are two distinct regions), e.g., stack in internal SRAM/heap in external SRAM on NUMAKER_PFM_NUC472. - * Hence, override _sbrk() here to support heap with two-region model. - */ -void *_sbrk(int incr) -{ - static uint32_t heap_ind = (uint32_t) &__mbed_sbrk_start; - uint32_t heap_ind_old = NU_ALIGN_UP(heap_ind, NU_HEAP_ALIGN); - uint32_t heap_ind_new = NU_ALIGN_UP(heap_ind_old + incr, NU_HEAP_ALIGN); - - if (heap_ind_new > (uint32_t) &__mbed_krbs_start) { - errno = ENOMEM; - return (void *) -1; - } - - heap_ind = heap_ind_new; - - return (void *) heap_ind_old; -} diff --git a/targets/TARGET_NUVOTON/TOOLCHAIN_ARM/sys.cpp b/targets/TARGET_NUVOTON/TOOLCHAIN_ARM/sys.cpp deleted file mode 100644 index 5a4f05d96e8..00000000000 --- a/targets/TARGET_NUVOTON/TOOLCHAIN_ARM/sys.cpp +++ /dev/null @@ -1,74 +0,0 @@ -/* mbed Microcontroller Library - stackheap - * Copyright (C) 2009-2011 ARM Limited. All rights reserved. - * - * Setup a fixed single stack/heap memory model, - * between the top of the RW/ZI region and the stackpointer - */ - -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) -#include -#endif - -#include -#include - -extern char Image$$ARM_LIB_STACK$$ZI$$Limit[]; -extern char Image$$ARM_LIB_HEAP$$Base[]; -extern char Image$$ARM_LIB_HEAP$$ZI$$Limit[]; -extern __value_in_regs struct __initial_stackheap _mbed_user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) { - - struct __initial_stackheap r; - r.heap_base = (uint32_t)Image$$ARM_LIB_HEAP$$Base; - r.heap_limit = (uint32_t)Image$$ARM_LIB_HEAP$$ZI$$Limit; - return r; -} - -#if !defined(MBED_CONF_RTOS_PRESENT) || !MBED_CONF_RTOS_PRESENT - -/* The single region memory model would check stack collision at run time, verifying that - * the heap pointer is underneath the stack pointer. With two-region memory model/RTOS-less or - * multiple threads(stacks)/RTOS, the check gets meaningless and we must disable it. */ -#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) -__asm(".global __use_two_region_memory\n\t"); -__asm(".global __use_no_semihosting\n\t"); -#else -#pragma import(__use_two_region_memory) -#endif - -/* Fix __user_setup_stackheap and ARM_LIB_STACK/ARM_LIB_HEAP cannot co-exist in RTOS-less build - * - * According AN241 (http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0241b/index.html), - * __rt_entry has the following call sequence: - * 1. _platform_pre_stackheap_init - * 2. __user_setup_stackheap or setup the Stack Pointer (SP) by another method - * 3. _platform_post_stackheap_init - * 4. __rt_lib_init - * 5. _platform_post_lib_init - * 6. main() - * 7. exit() - * - * Per our check, when __user_setup_stackheap and ARM_LIB_STACK/ARM_LIB_HEAP co-exist, neither - * does __user_setup_stackheap get called and nor is ARM_LIB_HEAP used to get heap base/limit, - * which are required to pass to __rt_lib_init later. To fix the issue, by subclass'ing - * __rt_lib_init, heap base/limit are replaced with Image$$ARM_LIB_HEAP$$ZI$$Base/Limit if - * ARM_LIB_HEAP region is defined in scatter file. - * - * The overriding __rt_lib_init is needed only for rtos-less code. For rtos code, __rt_entry is - * overridden and the overriding __rt_lib_init here gets meaningless. - */ -extern __value_in_regs struct __argc_argv $Super$$__rt_lib_init(unsigned heapbase, unsigned heaptop); - -__value_in_regs struct __argc_argv $Sub$$__rt_lib_init (unsigned heapbase, unsigned heaptop) -{ - return $Super$$__rt_lib_init((unsigned) Image$$ARM_LIB_HEAP$$Base, (unsigned) Image$$ARM_LIB_HEAP$$ZI$$Limit); -} - -#endif - -#ifdef __cplusplus -} -#endif diff --git a/targets/TARGET_NUVOTON/mbed_rtx.h b/targets/TARGET_NUVOTON/mbed_rtx.h index 137e4c1a246..fbea6a72421 100644 --- a/targets/TARGET_NUVOTON/mbed_rtx.h +++ b/targets/TARGET_NUVOTON/mbed_rtx.h @@ -21,24 +21,13 @@ #if defined(TARGET_NUVOTON) -#if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) +#if defined(__ARMCC_VERSION) extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Base[]; extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Length[]; - extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[]; - extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Length[]; - #define HEAP_START ((unsigned char*) Image$$ARM_LIB_HEAP$$ZI$$Base) - #define HEAP_SIZE ((uint32_t) Image$$ARM_LIB_HEAP$$ZI$$Length) - #define ISR_STACK_START ((unsigned char*)Image$$ARM_LIB_STACK$$ZI$$Base) - #define ISR_STACK_SIZE ((uint32_t)Image$$ARM_LIB_STACK$$ZI$$Length) + #define HEAP_START Image$$ARM_LIB_HEAP$$ZI$$Base + #define HEAP_SIZE Image$$ARM_LIB_HEAP$$ZI$$Length #elif defined(__GNUC__) - extern uint32_t __StackTop; - extern uint32_t __StackLimit; - extern uint32_t __end__; - extern uint32_t __HeapLimit; - #define HEAP_START ((unsigned char*) &__end__) - #define HEAP_SIZE ((uint32_t) ((uint32_t) &__HeapLimit - (uint32_t) HEAP_START)) - #define ISR_STACK_START ((unsigned char*) &__StackLimit) - #define ISR_STACK_SIZE ((uint32_t)((uint32_t) &__StackTop - (uint32_t) &__StackLimit)) + /* No region declarations needed */ #elif defined(__ICCARM__) /* No region declarations needed */ #else diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U24_301/LPC11U24.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U24_301/LPC11U24.ld index 7f4ed1e0107..6bed1c00ef6 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U24_301/LPC11U24.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U24_301/LPC11U24.ld @@ -138,6 +138,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U24_401/LPC11U24.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U24_401/LPC11U24.ld index 2a9a6880867..122fa8cc772 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U24_401/LPC11U24.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U24_401/LPC11U24.ld @@ -138,6 +138,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U34_421/LPC11U34.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U34_421/LPC11U34.ld index a4b155b3ac8..7d15795046b 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U34_421/LPC11U34.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U34_421/LPC11U34.ld @@ -136,6 +136,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_401/LPC11U35.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_401/LPC11U35.ld index 0eb20c94099..876f1f932a6 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_401/LPC11U35.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_401/LPC11U35.ld @@ -136,6 +136,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_501/LPC11U35.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_501/LPC11U35.ld index 0eb20c94099..876f1f932a6 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_501/LPC11U35.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_501/LPC11U35.ld @@ -136,6 +136,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_Y5_MBUG/LPC11U35.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_Y5_MBUG/LPC11U35.ld index 0eb20c94099..876f1f932a6 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_Y5_MBUG/LPC11U35.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_Y5_MBUG/LPC11U35.ld @@ -136,6 +136,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U37H_401/LPC11U37.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U37H_401/LPC11U37.ld index a819b2bbf74..56800d54312 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U37H_401/LPC11U37.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U37H_401/LPC11U37.ld @@ -137,6 +137,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U37_501/LPC11U37.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U37_501/LPC11U37.ld index b10a7ea25f4..15d44a9adef 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U37_501/LPC11U37.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U37_501/LPC11U37.ld @@ -136,6 +136,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPCCAPPUCCINO/LPC11U37.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPCCAPPUCCINO/LPC11U37.ld index b10a7ea25f4..15d44a9adef 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPCCAPPUCCINO/LPC11U37.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPCCAPPUCCINO/LPC11U37.ld @@ -136,6 +136,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_OC_MBUINO/LPC11U24.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_OC_MBUINO/LPC11U24.ld index 7f4ed1e0107..6bed1c00ef6 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_OC_MBUINO/LPC11U24.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_OC_MBUINO/LPC11U24.ld @@ -138,6 +138,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11CXX/LPC11C24.ld b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11CXX/LPC11C24.ld index 4ab4ab3f03a..b29c3afb52b 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11CXX/LPC11C24.ld +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11CXX/LPC11C24.ld @@ -133,6 +133,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11XX/LPC1114.ld b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11XX/LPC1114.ld index a646cdceb99..1b8f59a62c8 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11XX/LPC1114.ld +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11XX/LPC1114.ld @@ -133,6 +133,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_GCC_ARM/LPC1347.ld b/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_GCC_ARM/LPC1347.ld index 50b2210252b..626422c5131 100644 --- a/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_GCC_ARM/LPC1347.ld +++ b/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_GCC_ARM/LPC1347.ld @@ -133,6 +133,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/LPC1768.ld b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/LPC1768.ld index c1ea6ad1aa6..b8aaa13fae3 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/LPC1768.ld +++ b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/LPC1768.ld @@ -150,6 +150,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/TARGET_XBED_LPC1768/XBED_LPC1768.ld b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/TARGET_XBED_LPC1768/XBED_LPC1768.ld index 13831d40a82..8f86271fca1 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/TARGET_XBED_LPC1768/XBED_LPC1768.ld +++ b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/TARGET_XBED_LPC1768/XBED_LPC1768.ld @@ -137,6 +137,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_GCC_ARM/LPC4088.ld b/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_GCC_ARM/LPC4088.ld index a007f3fa45d..5b3d924be9a 100644 --- a/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_GCC_ARM/LPC4088.ld +++ b/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_GCC_ARM/LPC4088.ld @@ -137,6 +137,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_GCC_ARM/LPC4330.ld b/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_GCC_ARM/LPC4330.ld index 5c6f2cc06c0..798c3d71599 100644 --- a/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_GCC_ARM/LPC4330.ld +++ b/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_GCC_ARM/LPC4330.ld @@ -139,6 +139,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM1) + LENGTH(RAM1) - STACK_SIZE; __HeapLimit = .; } > RAM1 diff --git a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_GCC_ARM/LPC812.ld b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_GCC_ARM/LPC812.ld index 91a19902dbe..f51f0d6dfe7 100644 --- a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_GCC_ARM/LPC812.ld +++ b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_GCC_ARM/LPC812.ld @@ -133,6 +133,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_GCC_ARM/LPC810.ld b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_GCC_ARM/LPC810.ld index 2537d9e576f..c369ebf8b2a 100644 --- a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_GCC_ARM/LPC810.ld +++ b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_GCC_ARM/LPC810.ld @@ -133,6 +133,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_GCC_ARM/LPC812.ld b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_GCC_ARM/LPC812.ld index 91a19902dbe..f51f0d6dfe7 100644 --- a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_GCC_ARM/LPC812.ld +++ b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_GCC_ARM/LPC812.ld @@ -133,6 +133,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_GCC_ARM/LPC824.ld b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_GCC_ARM/LPC824.ld index 008625b3074..993670c7f88 100644 --- a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_GCC_ARM/LPC824.ld +++ b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_GCC_ARM/LPC824.ld @@ -133,6 +133,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/device/TOOLCHAIN_GCC_ARM/LPC824.ld b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/device/TOOLCHAIN_GCC_ARM/LPC824.ld index ce00f67d1f3..4817d52b1bc 100644 --- a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/device/TOOLCHAIN_GCC_ARM/LPC824.ld +++ b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/device/TOOLCHAIN_GCC_ARM/LPC824.ld @@ -134,6 +134,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_GCC_ARM/LPC54114J256_cm4_flash.ld b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_GCC_ARM/LPC54114J256_cm4_flash.ld index 178e173d344..a228f5113a8 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_GCC_ARM/LPC54114J256_cm4_flash.ld +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_GCC_ARM/LPC54114J256_cm4_flash.ld @@ -85,9 +85,6 @@ __ram_vector_table__ = 1; #endif __stack_size__ = MBED_BOOT_STACK_SIZE; -__heap_size__ = 0x4000; - -HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0800; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0xE4 : 0x0; RPMSG_SHMEM_SIZE = DEFINED(__use_shmem__) ? 0x1800 : 0; @@ -273,7 +270,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); __HeapBase = .; - . += HEAP_SIZE; + . = ORIGIN(m_data) + LENGTH(m_data) - STACK_SIZE; __HeapLimit = .; __heap_limit = .; /* Add for _sbrk */ } > m_data diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_GCC_ARM/LPC54628J512.ld b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_GCC_ARM/LPC54628J512.ld index 715e3a11907..170ff4343d2 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_GCC_ARM/LPC54628J512.ld +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_GCC_ARM/LPC54628J512.ld @@ -53,9 +53,6 @@ __ram_vector_table__ = 1; #endif __stack_size__ = MBED_BOOT_STACK_SIZE; -__heap_size__ = 0xC000; - -HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0800; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x400 : 0x0; @@ -223,7 +220,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); __HeapBase = .; - . += HEAP_SIZE; + . = ORIGIN(m_data) + LENGTH(m_data) - STACK_SIZE; __HeapLimit = .; __heap_limit = .; /* Add for _sbrk */ } > m_data diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct index 9ef79916618..b46f4a5c8d5 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct @@ -138,14 +138,16 @@ LR_IROM1 m_flash_config_start m_text_start+m_text_size-m_flash_config_start { VECTOR_RAM m_interrupts_start EMPTY 0 { } #endif - RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data + RW_m_data m_data_start m_data_size { ; RW data .ANY (+RW +ZI) *(m_usb_dma_init_data) *(m_usb_dma_noninit_data) } - RW_IRAM1 +0 EMPTY Heap_Size { ; Heap region growing up + RW_IRAM1 ImageLimit(RW_m_data) { } - ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (m_data_start + m_data_size - Stack_Size - AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down } RW_m_ram_text m_text2_start UNINIT m_text2_size { ; load address = execution address * (RamFunction) diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_GCC_ARM/MIMXRT1052xxxxx.ld b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_GCC_ARM/MIMXRT1052xxxxx.ld index dce36027103..baa8999fc98 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_GCC_ARM/MIMXRT1052xxxxx.ld +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_GCC_ARM/MIMXRT1052xxxxx.ld @@ -63,9 +63,7 @@ __ram_vector_table__ = 1; #endif __stack_size__ = MBED_BOOT_STACK_SIZE; -__heap_size__ = 0x10000; -HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0400 : 0x0; @@ -286,7 +284,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); __HeapBase = .; - . += HEAP_SIZE; + . = ORIGIN(m_data) + LENGTH(m_data) - STACK_SIZE; __HeapLimit = .; __heap_limit = .; /* Add for _sbrk */ } > m_data diff --git a/targets/TARGET_NXP/mbed_rtx.h b/targets/TARGET_NXP/mbed_rtx.h index 6dda30ec3d9..58267509584 100644 --- a/targets/TARGET_NXP/mbed_rtx.h +++ b/targets/TARGET_NXP/mbed_rtx.h @@ -97,24 +97,13 @@ #elif defined(TARGET_MIMXRT1050_EVK) -#if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) - extern uint32_t Image$$RW_IRAM1$$ZI$$Base[]; - extern uint32_t Image$$RW_IRAM1$$ZI$$Length[]; - extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[]; - extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Length[]; - #define HEAP_START ((unsigned char*) Image$$RW_IRAM1$$ZI$$Base) - #define HEAP_SIZE ((uint32_t) Image$$RW_IRAM1$$ZI$$Length) - #define ISR_STACK_START ((unsigned char*)Image$$ARM_LIB_STACK$$ZI$$Base) - #define ISR_STACK_SIZE ((uint32_t)Image$$ARM_LIB_STACK$$ZI$$Length) +#if defined(__ARMCC_VERSION) +extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Base[]; +extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Length[]; +#define HEAP_START Image$$ARM_LIB_HEAP$$ZI$$Base +#define HEAP_SIZE Image$$ARM_LIB_HEAP$$ZI$$Length #elif defined(__GNUC__) - extern uint32_t __StackTop[]; - extern uint32_t __StackLimit[]; - extern uint32_t __end__; - extern uint32_t __HeapLimit[]; - #define HEAP_START ((unsigned char*)&__end__) - #define HEAP_SIZE ((uint32_t)((uint32_t)__HeapLimit - (uint32_t)HEAP_START)) - #define ISR_STACK_START ((unsigned char*)__StackLimit) - #define ISR_STACK_SIZE ((uint32_t)((uint32_t)__StackTop - (uint32_t)__StackLimit)) + /* No region declarations needed */ #elif defined(__ICCARM__) /* No region declarations needed */ #else diff --git a/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_GCC_ARM/NCS36510.ld b/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_GCC_ARM/NCS36510.ld index d0abc01a8b6..273226105e6 100644 --- a/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_GCC_ARM/NCS36510.ld +++ b/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_GCC_ARM/NCS36510.ld @@ -160,7 +160,7 @@ MEMORY { __end__ = .; end = __end__; *(.heap*); - . += 0x800; + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM PROVIDE(__heap_size = SIZEOF(.heap)); diff --git a/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_ARM_STD/sys.cpp b/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_ARM_STD/sys.cpp deleted file mode 100644 index 42fd4a3d9c0..00000000000 --- a/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_ARM_STD/sys.cpp +++ /dev/null @@ -1,36 +0,0 @@ -/* mbed Microcontroller Library - stackheap - * Copyright (C) 2009-2018 ARM Limited. All rights reserved. - * - * Setup a fixed single stack/heap memory model, - * between the top of the RW/ZI region and the stackpointer - */ - -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) -#include -#endif - -#include -#include - -extern char Image$$ARM_LIB_HEAP$$ZI$$Base[]; -extern char Image$$ARM_LIB_HEAP$$ZI$$Length[]; - -extern __value_in_regs struct __initial_stackheap _mbed_user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) -{ - uint32_t hp_base = (uint32_t)Image$$ARM_LIB_HEAP$$ZI$$Base; - uint32_t hp_limit = (uint32_t)Image$$ARM_LIB_HEAP$$ZI$$Length + hp_base; - struct __initial_stackheap r; - - hp_base = (hp_base + 7) & ~0x7; // ensure hp_base is 8-byte aligned - r.heap_base = hp_base; - r.heap_limit = hp_limit; - return r; -} - -#ifdef __cplusplus -} -#endif diff --git a/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_GCC_ARM/TARGET_UNO_91H/RDA5981C.ld b/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_GCC_ARM/TARGET_UNO_91H/RDA5981C.ld index a0fc5b90355..f2316a098af 100644 --- a/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_GCC_ARM/TARGET_UNO_91H/RDA5981C.ld +++ b/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_GCC_ARM/TARGET_UNO_91H/RDA5981C.ld @@ -166,6 +166,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(DRAM) + LENGTH(DRAM); __HeapLimit = .; } > DRAM PROVIDE(__sbrk_start = ADDR(.heap)); diff --git a/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_GCC_ARM/rda_retarget.c b/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_GCC_ARM/rda_retarget.c deleted file mode 100644 index 241eb9908a6..00000000000 --- a/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_GCC_ARM/rda_retarget.c +++ /dev/null @@ -1,37 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2009-2018 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined(TWO_RAM_REGIONS) -#include -#include - -extern uint32_t __sbrk_start; -extern uint32_t __krbs_start; - -/* Overide _sbrk() to support two region model */ -void *__wrap__sbrk(int incr) -{ - static uint32_t heap_ind = (uint32_t)(&__sbrk_start); - uint32_t heap_ind_pre = heap_ind; - uint32_t heap_ind_new = (heap_ind_pre + incr + 0x07) & ~0x07; - if (heap_ind_new > (uint32_t)(&__krbs_start)) { - errno = ENOMEM; - return (void *)(-1); - } - heap_ind = heap_ind_new; - return (void *) heap_ind_pre; -} -#endif \ No newline at end of file diff --git a/targets/TARGET_RDA/mbed_rtx.h b/targets/TARGET_RDA/mbed_rtx.h index 424ed223e0a..000eb27fc40 100644 --- a/targets/TARGET_RDA/mbed_rtx.h +++ b/targets/TARGET_RDA/mbed_rtx.h @@ -29,24 +29,13 @@ #define OS_CLOCK 160000000 #endif -#if defined(__CC_ARM) +#if defined(__ARMCC_VERSION) extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Base[]; extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Length[]; -extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[]; -extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Length[]; -#define HEAP_START ((unsigned char*) Image$$ARM_LIB_HEAP$$ZI$$Base) -#define HEAP_SIZE ((uint32_t) Image$$ARM_LIB_HEAP$$ZI$$Length) -#define ISR_STACK_START ((unsigned char*)Image$$ARM_LIB_STACK$$ZI$$Base) -#define ISR_STACK_SIZE ((uint32_t)Image$$ARM_LIB_STACK$$ZI$$Length) +#define HEAP_START Image$$ARM_LIB_HEAP$$ZI$$Base +#define HEAP_SIZE Image$$ARM_LIB_HEAP$$ZI$$Length #elif defined(__GNUC__) -extern uint32_t __StackTop[]; -extern uint32_t __StackLimit[]; -extern uint32_t __end__[]; -extern uint32_t __HeapLimit[]; -#define HEAP_START ((unsigned char*)__end__) -#define HEAP_SIZE ((uint32_t)((uint32_t)__HeapLimit - (uint32_t)HEAP_START)) -#define ISR_STACK_START ((unsigned char*)__StackLimit) -#define ISR_STACK_SIZE ((uint32_t)((uint32_t)__StackTop - (uint32_t)__StackLimit)) +/* No region declarations needed */ #elif defined(__ICCARM__) /* No region declarations needed */ #else diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_ARM_STD/sys.cpp b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_ARM_STD/sys.cpp deleted file mode 100644 index 57a6cc92df3..00000000000 --- a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_ARM_STD/sys.cpp +++ /dev/null @@ -1,98 +0,0 @@ -/* mbed Microcontroller Library - stackheap - * Setup a fixed single stack/heap memory model, - * between the top of the RW/ZI region and the stackpointer - ******************************************************************************* - * Copyright (c) 2017 ARM Limited. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of ARM Limited nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - ******************************************************************************* - */ - -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) -#include -#endif - -#include -#include - -extern char Image$$ARM_LIB_HEAP$$Base[]; -extern char Image$$ARM_LIB_STACK$$Base[]; - -extern __value_in_regs struct __initial_stackheap _mbed_user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) { - struct __initial_stackheap r; - r.heap_base = (uint32_t)Image$$ARM_LIB_HEAP$$Base; - r.heap_limit = (uint32_t)Image$$ARM_LIB_STACK$$Base; - return r; -} - -#ifndef MBED_CONF_RTOS_PRESENT - -/* The single region memory model would check stack collision at run time, verifying that - * the heap pointer is underneath the stack pointer. With two-region memory model/RTOS-less or - * multiple threads(stacks)/RTOS, the check gets meaningless and we must disable it. */ -#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) -__asm(".global __use_two_region_memory\n\t"); -__asm(".global __use_no_semihosting\n\t"); -#else -#pragma import(__use_two_region_memory) -#endif - -/* Fix __user_setup_stackheap and ARM_LIB_STACK/ARM_LIB_HEAP cannot co-exist in RTOS-less build - * - * According AN241 (http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0241b/index.html), - * __rt_entry has the following call sequence: - * 1. _platform_pre_stackheap_init - * 2. __user_setup_stackheap or setup the Stack Pointer (SP) by another method - * 3. _platform_post_stackheap_init - * 4. __rt_lib_init - * 5. _platform_post_lib_init - * 6. main() - * 7. exit() - * - * Per our check, when __user_setup_stackheap and ARM_LIB_STACK/ARM_LIB_HEAP co-exist, neither - * does __user_setup_stackheap get called and nor is ARM_LIB_HEAP used to get heap base/limit, - * which are required to pass to __rt_lib_init later. To fix the issue, by subclass'ing - * __rt_lib_init, heap base/limit are replaced with Image$$ARM_LIB_HEAP$$ZI$$Base/Limit if - * ARM_LIB_HEAP region is defined in scatter file. - * - * The overriding __rt_lib_init is needed only for rtos-less code. For rtos code, __rt_entry is - * overridden and the overriding __rt_lib_init here gets meaningless. - */ -extern __value_in_regs struct __argc_argv $Super$$__rt_lib_init(unsigned heapbase, unsigned heaptop); - -__value_in_regs struct __argc_argv $Sub$$__rt_lib_init (unsigned heapbase, unsigned heaptop) -{ - return $Super$$__rt_lib_init((unsigned)Image$$ARM_LIB_HEAP$$Base, (unsigned)Image$$ARM_LIB_STACK$$Base); -} - -#endif - -#ifdef __cplusplus -} -#endif diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_ARM_STD/sys.cpp b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_ARM_STD/sys.cpp deleted file mode 100644 index 57a6cc92df3..00000000000 --- a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_ARM_STD/sys.cpp +++ /dev/null @@ -1,98 +0,0 @@ -/* mbed Microcontroller Library - stackheap - * Setup a fixed single stack/heap memory model, - * between the top of the RW/ZI region and the stackpointer - ******************************************************************************* - * Copyright (c) 2017 ARM Limited. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of ARM Limited nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - ******************************************************************************* - */ - -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) -#include -#endif - -#include -#include - -extern char Image$$ARM_LIB_HEAP$$Base[]; -extern char Image$$ARM_LIB_STACK$$Base[]; - -extern __value_in_regs struct __initial_stackheap _mbed_user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) { - struct __initial_stackheap r; - r.heap_base = (uint32_t)Image$$ARM_LIB_HEAP$$Base; - r.heap_limit = (uint32_t)Image$$ARM_LIB_STACK$$Base; - return r; -} - -#ifndef MBED_CONF_RTOS_PRESENT - -/* The single region memory model would check stack collision at run time, verifying that - * the heap pointer is underneath the stack pointer. With two-region memory model/RTOS-less or - * multiple threads(stacks)/RTOS, the check gets meaningless and we must disable it. */ -#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) -__asm(".global __use_two_region_memory\n\t"); -__asm(".global __use_no_semihosting\n\t"); -#else -#pragma import(__use_two_region_memory) -#endif - -/* Fix __user_setup_stackheap and ARM_LIB_STACK/ARM_LIB_HEAP cannot co-exist in RTOS-less build - * - * According AN241 (http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0241b/index.html), - * __rt_entry has the following call sequence: - * 1. _platform_pre_stackheap_init - * 2. __user_setup_stackheap or setup the Stack Pointer (SP) by another method - * 3. _platform_post_stackheap_init - * 4. __rt_lib_init - * 5. _platform_post_lib_init - * 6. main() - * 7. exit() - * - * Per our check, when __user_setup_stackheap and ARM_LIB_STACK/ARM_LIB_HEAP co-exist, neither - * does __user_setup_stackheap get called and nor is ARM_LIB_HEAP used to get heap base/limit, - * which are required to pass to __rt_lib_init later. To fix the issue, by subclass'ing - * __rt_lib_init, heap base/limit are replaced with Image$$ARM_LIB_HEAP$$ZI$$Base/Limit if - * ARM_LIB_HEAP region is defined in scatter file. - * - * The overriding __rt_lib_init is needed only for rtos-less code. For rtos code, __rt_entry is - * overridden and the overriding __rt_lib_init here gets meaningless. - */ -extern __value_in_regs struct __argc_argv $Super$$__rt_lib_init(unsigned heapbase, unsigned heaptop); - -__value_in_regs struct __argc_argv $Sub$$__rt_lib_init (unsigned heapbase, unsigned heaptop) -{ - return $Super$$__rt_lib_init((unsigned)Image$$ARM_LIB_HEAP$$Base, (unsigned)Image$$ARM_LIB_STACK$$Base); -} - -#endif - -#ifdef __cplusplus -} -#endif diff --git a/targets/TARGET_RENESAS/mbed_rtx.h b/targets/TARGET_RENESAS/mbed_rtx.h index c8eba52d14c..08336e26837 100644 --- a/targets/TARGET_RENESAS/mbed_rtx.h +++ b/targets/TARGET_RENESAS/mbed_rtx.h @@ -20,24 +20,15 @@ #if defined(TARGET_RZ_A1H) || defined(TARGET_VK_RZ_A1H) || defined(TARGET_GR_LYCHEE) -#if defined(__CC_ARM) - extern char Image$$ARM_LIB_STACK$$Base[]; - extern char Image$$ARM_LIB_STACK$$ZI$$Limit[]; - extern char Image$$ARM_LIB_HEAP$$Base[]; - #define ISR_STACK_START ((unsigned char*)Image$$ARM_LIB_STACK$$Base) - #define ISR_STACK_SIZE ((uint32_t)((uint32_t)Image$$ARM_LIB_STACK$$ZI$$Limit - (uint32_t)Image$$ARM_LIB_STACK$$Base)) - #define INITIAL_SP (Image$$ARM_LIB_STACK$$ZI$$Limit) - #define HEAP_START ((unsigned char*)Image$$ARM_LIB_HEAP$$Base) - #define HEAP_SIZE ((uint32_t)((uint32_t)ISR_STACK_START - (uint32_t)HEAP_START)) +#if defined(__ARMCC_VERSION) + extern uint32_t Image$$ARM_LIB_STACK$$Base[]; + extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Limit[]; + extern uint32_t Image$$ARM_LIB_HEAP$$Base[]; + #define INITIAL_SP Image$$ARM_LIB_STACK$$ZI$$Limit + #define HEAP_START Image$$ARM_LIB_HEAP$$Base + #define HEAP_SIZE (uint32_t)((uint32_t) Image$$ARM_LIB_STACK$$Base - (uint32_t) HEAP_START) #elif defined(__GNUC__) - extern uint32_t __StackTop; - extern uint32_t __StackLimit; - extern uint32_t __end__; - #define ISR_STACK_START ((unsigned char*)&__StackLimit) - #define ISR_STACK_SIZE ((uint32_t)((uint32_t)&__StackTop - (uint32_t)&__StackLimit)) #define INITIAL_SP (&__StackTop) - #define HEAP_START ((unsigned char*)&__end__) - #define HEAP_SIZE ((uint32_t)((uint32_t)ISR_STACK_START - (uint32_t)HEAP_START)) #elif defined(__ICCARM__) /* No region declarations needed */ #else diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_GCC_ARM/STM32F0xx.ld b/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_GCC_ARM/STM32F0xx.ld index b155897149b..b64540b58d8 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_GCC_ARM/STM32F0xx.ld +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_GCC_ARM/STM32F0xx.ld @@ -138,6 +138,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_GCC_ARM/STM32F030X8.ld b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_GCC_ARM/STM32F030X8.ld index bc5f51ce2c7..5b6a46c6857 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_GCC_ARM/STM32F030X8.ld +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_GCC_ARM/STM32F030X8.ld @@ -137,6 +137,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_GCC_ARM/STM32F031X6.ld b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_GCC_ARM/STM32F031X6.ld index 0486f7872a8..0bdb78f2dc7 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_GCC_ARM/STM32F031X6.ld +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_GCC_ARM/STM32F031X6.ld @@ -137,6 +137,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_GCC_ARM/STM32F042X6.ld b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_GCC_ARM/STM32F042X6.ld index 9c404b2a61a..c9e766415d2 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_GCC_ARM/STM32F042X6.ld +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_GCC_ARM/STM32F042X6.ld @@ -137,6 +137,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_GCC_ARM/STM32F0xxx_retarget.c b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_GCC_ARM/STM32F0xxx_retarget.c deleted file mode 100644 index d206fa12d1c..00000000000 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_GCC_ARM/STM32F0xxx_retarget.c +++ /dev/null @@ -1,54 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2018, STMicroelectronics - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#include -#include "stm32f0xx.h" -extern uint32_t __mbed_sbrk_start; -extern uint32_t __mbed_krbs_start; - -/* Support heap with two-region model - * - * The default implementation of _sbrk() (in mbed_retarget.cpp) for GCC_ARM requires one-region - * model (heap and stack share one region), which doesn't fit two-region model (heap and stack - * are two distinct regions) - * Hence, override _sbrk() here to support heap with two-region model. - */ -void *_sbrk(int incr) -{ - static uint32_t heap_ind = (uint32_t) &__mbed_sbrk_start; - uint32_t heap_ind_old = heap_ind; - uint32_t heap_ind_new = heap_ind_old + incr; - - if (heap_ind_new > (uint32_t) &__mbed_krbs_start) { - errno = ENOMEM; - return (void *) -1; - } - - heap_ind = heap_ind_new; - - return (void *) heap_ind_old; -} diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_GCC_ARM/STM32F0xxx_retarget.c b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_GCC_ARM/STM32F0xxx_retarget.c deleted file mode 100644 index d206fa12d1c..00000000000 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_GCC_ARM/STM32F0xxx_retarget.c +++ /dev/null @@ -1,54 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2018, STMicroelectronics - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#include -#include "stm32f0xx.h" -extern uint32_t __mbed_sbrk_start; -extern uint32_t __mbed_krbs_start; - -/* Support heap with two-region model - * - * The default implementation of _sbrk() (in mbed_retarget.cpp) for GCC_ARM requires one-region - * model (heap and stack share one region), which doesn't fit two-region model (heap and stack - * are two distinct regions) - * Hence, override _sbrk() here to support heap with two-region model. - */ -void *_sbrk(int incr) -{ - static uint32_t heap_ind = (uint32_t) &__mbed_sbrk_start; - uint32_t heap_ind_old = heap_ind; - uint32_t heap_ind_new = heap_ind_old + incr; - - if (heap_ind_new > (uint32_t) &__mbed_krbs_start) { - errno = ENOMEM; - return (void *) -1; - } - - heap_ind = heap_ind_new; - - return (void *) heap_ind_old; -} diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_GCC_ARM/STM32F091XC.ld b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_GCC_ARM/STM32F091XC.ld index 67b46e7cc3e..bf6335b0899 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_GCC_ARM/STM32F091XC.ld +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_GCC_ARM/STM32F091XC.ld @@ -137,6 +137,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - StackSize; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_BLUEPILL_F103C8/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld b/targets/TARGET_STM/TARGET_STM32F1/TARGET_BLUEPILL_F103C8/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld index 54a7c34df09..52b01a214a5 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_BLUEPILL_F103C8/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_BLUEPILL_F103C8/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld @@ -138,6 +138,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_GCC_ARM/STM32F100.ld b/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_GCC_ARM/STM32F100.ld index eee8a6cd333..466acd28292 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_GCC_ARM/STM32F100.ld +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_GCC_ARM/STM32F100.ld @@ -138,6 +138,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld index 422fab01b54..c5f242eb21e 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld @@ -138,6 +138,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_GCC_ARM/STM32F207ZGTx_FLASH.ld b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_GCC_ARM/STM32F207ZGTx_FLASH.ld index a0ae3809f38..e8903b7e680 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_GCC_ARM/STM32F207ZGTx_FLASH.ld +++ b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_GCC_ARM/STM32F207ZGTx_FLASH.ld @@ -146,6 +146,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_GCC_ARM/STM32F302X8.ld b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_GCC_ARM/STM32F302X8.ld index bd06dfafede..5c781381aca 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_GCC_ARM/STM32F302X8.ld +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_GCC_ARM/STM32F302X8.ld @@ -138,6 +138,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_GCC_ARM/STM32F303X8.ld b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_GCC_ARM/STM32F303X8.ld index 3c06bd12ca4..a2c09fe5bfa 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_GCC_ARM/STM32F303X8.ld +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_GCC_ARM/STM32F303X8.ld @@ -138,6 +138,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_GCC_ARM/STM32F303XC.ld b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_GCC_ARM/STM32F303XC.ld index 4dd8ff9cd9b..087af747835 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_GCC_ARM/STM32F303XC.ld +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_GCC_ARM/STM32F303XC.ld @@ -138,6 +138,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_GCC_ARM/STM32F303XE.ld b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_GCC_ARM/STM32F303XE.ld index 23f4db2239f..5e5c2921cd4 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_GCC_ARM/STM32F303XE.ld +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_GCC_ARM/STM32F303XE.ld @@ -147,6 +147,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_GCC_ARM/STM32F334X8.ld b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_GCC_ARM/STM32F334X8.ld index 6d6fa44d7d4..81fb7dcc50c 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_GCC_ARM/STM32F334X8.ld +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_GCC_ARM/STM32F334X8.ld @@ -138,6 +138,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld index 57522772afb..2e34f3f3d4b 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld @@ -136,6 +136,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld index 57522772afb..2e34f3f3d4b 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld @@ -136,6 +136,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_GCC_ARM/STM32F405.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_GCC_ARM/STM32F405.ld index 6f7f90ce0fd..a3646798af9 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_GCC_ARM/STM32F405.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_GCC_ARM/STM32F405.ld @@ -134,6 +134,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_GCC_ARM/STM32F411XE.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_GCC_ARM/STM32F411XE.ld index bba863d911c..7440326fae4 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_GCC_ARM/STM32F411XE.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_GCC_ARM/STM32F411XE.ld @@ -139,6 +139,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/device/TOOLCHAIN_GCC_ARM/STM32F401XC.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/device/TOOLCHAIN_GCC_ARM/STM32F401XC.ld index 78c8fe38ed4..259c357f4de 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/device/TOOLCHAIN_GCC_ARM/STM32F401XC.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/device/TOOLCHAIN_GCC_ARM/STM32F401XC.ld @@ -137,6 +137,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_GCC_ARM/STM32F401XE.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_GCC_ARM/STM32F401XE.ld index d7768f84896..f709991e6c1 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_GCC_ARM/STM32F401XE.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_GCC_ARM/STM32F401XE.ld @@ -138,6 +138,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_GCC_ARM/STM32F407XG.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_GCC_ARM/STM32F407XG.ld index 3a7185382ff..448b4a679e3 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_GCC_ARM/STM32F407XG.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_GCC_ARM/STM32F407XG.ld @@ -138,6 +138,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_GCC_ARM/STM32F410xB.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_GCC_ARM/STM32F410xB.ld index 7e21b878323..7371019eafa 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_GCC_ARM/STM32F410xB.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_GCC_ARM/STM32F410xB.ld @@ -137,6 +137,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_GCC_ARM/STM32F411XE.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_GCC_ARM/STM32F411XE.ld index f28ae12e22a..6aa8d05b0a0 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_GCC_ARM/STM32F411XE.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_GCC_ARM/STM32F411XE.ld @@ -158,6 +158,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_GCC_ARM/STM32F412xG.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_GCC_ARM/STM32F412xG.ld index 6d4f1ca53b7..9e314e125b0 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_GCC_ARM/STM32F412xG.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_GCC_ARM/STM32F412xG.ld @@ -145,6 +145,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_GCC_ARM/STM32F413xH.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_GCC_ARM/STM32F413xH.ld index fbb16e48e9f..d9392aa594f 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_GCC_ARM/STM32F413xH.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_GCC_ARM/STM32F413xH.ld @@ -144,6 +144,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_GCC_ARM/STM32F429xI.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_GCC_ARM/STM32F429xI.ld index b061e3c5054..43bc9484418 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_GCC_ARM/STM32F429xI.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_GCC_ARM/STM32F429xI.ld @@ -162,6 +162,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_GCC_ARM/STM32F437xx.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_GCC_ARM/STM32F437xx.ld index ae84928bc21..9aeb8203572 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_GCC_ARM/STM32F437xx.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_GCC_ARM/STM32F437xx.ld @@ -161,6 +161,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld index d1d2f74d71c..d9d6142e7a2 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld @@ -160,6 +160,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_GCC_ARM/STM32F446XE.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_GCC_ARM/STM32F446XE.ld index 278a3a3368e..7b83908ac20 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_GCC_ARM/STM32F446XE.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_GCC_ARM/STM32F446XE.ld @@ -145,6 +145,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_GCC_ARM/STM32F469XI.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_GCC_ARM/STM32F469XI.ld index 2fdf0e4d78e..9f0097f28d4 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_GCC_ARM/STM32F469XI.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_GCC_ARM/STM32F469XI.ld @@ -145,6 +145,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_GCC_ARM/STM32F746xG.ld b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_GCC_ARM/STM32F746xG.ld index 416d4a286ca..ef0f113a594 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_GCC_ARM/STM32F746xG.ld +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_GCC_ARM/STM32F746xG.ld @@ -159,6 +159,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_GCC_ARM/STM32F756xG.ld b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_GCC_ARM/STM32F756xG.ld index 416d4a286ca..ef0f113a594 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_GCC_ARM/STM32F756xG.ld +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_GCC_ARM/STM32F756xG.ld @@ -159,6 +159,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_GCC_ARM/STM32F767xI.ld b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_GCC_ARM/STM32F767xI.ld index 86784f10f9b..6e116892179 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_GCC_ARM/STM32F767xI.ld +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_GCC_ARM/STM32F767xI.ld @@ -159,6 +159,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_GCC_ARM/STM32F769xI.ld b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_GCC_ARM/STM32F769xI.ld index d4d8f66db8b..ccb392d7b1f 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_GCC_ARM/STM32F769xI.ld +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_GCC_ARM/STM32F769xI.ld @@ -145,6 +145,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_GCC_ARM/STM32H743xI.ld b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_GCC_ARM/STM32H743xI.ld index 3d6a53660be..4351303f532 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_GCC_ARM/STM32H743xI.ld +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_GCC_ARM/STM32H743xI.ld @@ -159,6 +159,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_GCC_ARM/STM32L031K6.ld b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_GCC_ARM/STM32L031K6.ld index 7e248173681..8a7b8cc2f93 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_GCC_ARM/STM32L031K6.ld +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_GCC_ARM/STM32L031K6.ld @@ -137,6 +137,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_GCC_ARM/STM32L073XZ.ld b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_GCC_ARM/STM32L073XZ.ld index 17d8f130195..995c3d01059 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_GCC_ARM/STM32L073XZ.ld +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_GCC_ARM/STM32L073XZ.ld @@ -137,6 +137,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_GCC_ARM/STM32L053X8.ld b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_GCC_ARM/STM32L053X8.ld index b8a6b0814ec..3dcb0f0515f 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_GCC_ARM/STM32L053X8.ld +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_GCC_ARM/STM32L053X8.ld @@ -137,6 +137,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_GCC_ARM/STM32L072XZ.ld b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_GCC_ARM/STM32L072XZ.ld index 17d8f130195..995c3d01059 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_GCC_ARM/STM32L072XZ.ld +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_GCC_ARM/STM32L072XZ.ld @@ -137,6 +137,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_GCC_ARM/STM32L082xZ.ld b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_GCC_ARM/STM32L082xZ.ld index 17d8f130195..995c3d01059 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_GCC_ARM/STM32L082xZ.ld +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_GCC_ARM/STM32L082xZ.ld @@ -137,6 +137,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_GCC_ARM/STM32L152XC.ld b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_GCC_ARM/STM32L152XC.ld index ab8ad3f5071..f82c2eba303 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_GCC_ARM/STM32L152XC.ld +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_GCC_ARM/STM32L152XC.ld @@ -141,6 +141,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld index 42fe23dc21a..959a0e912b0 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld @@ -148,6 +148,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_GCC_ARM/STM32L151XB-A.ld b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_GCC_ARM/STM32L151XB-A.ld index 16fc655ca7a..589c7489f63 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_GCC_ARM/STM32L151XB-A.ld +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_GCC_ARM/STM32L151XB-A.ld @@ -140,6 +140,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_GCC_ARM/STM32L152XE.ld b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_GCC_ARM/STM32L152XE.ld index 9ee4dacb462..c08a8134905 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_GCC_ARM/STM32L152XE.ld +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_GCC_ARM/STM32L152XE.ld @@ -141,6 +141,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld index 416cf2ae25c..848d7d3342a 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld @@ -141,6 +141,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld index 7b598b8ca72..b50c7532a90 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld @@ -148,6 +148,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_GCC_ARM/STM32L432XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_GCC_ARM/STM32L432XX.ld index faca70fce77..062be2149b3 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_GCC_ARM/STM32L432XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_GCC_ARM/STM32L432XX.ld @@ -144,6 +144,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(SRAM1) + LENGTH(SRAM1) - STACK_SIZE; __HeapLimit = .; } > SRAM1 diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_GCC_ARM/STM32L433XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_GCC_ARM/STM32L433XX.ld index faca70fce77..b66a1d43345 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_GCC_ARM/STM32L433XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_GCC_ARM/STM32L433XX.ld @@ -144,6 +144,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(SRAM1) + LENGTH(SRAM1) - STACK_SIZE; __HeapLimit = .; } > SRAM1 diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_GCC_ARM/STM32L443XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_GCC_ARM/STM32L443XX.ld index 48a5645a461..c57cb94fdda 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_GCC_ARM/STM32L443XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_GCC_ARM/STM32L443XX.ld @@ -146,6 +146,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(SRAM1) + LENGTH(SRAM1) - STACK_SIZE; __HeapLimit = .; } > SRAM1 diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_GCC_ARM/STM32L496XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_GCC_ARM/STM32L496XX.ld index cadf9e62b67..7a4d42a755d 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_GCC_ARM/STM32L496XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_GCC_ARM/STM32L496XX.ld @@ -145,6 +145,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(SRAM1) + LENGTH(SRAM1) - STACK_SIZE; __HeapLimit = .; } > SRAM1 diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_GCC_ARM/stm32l4r5xx.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_GCC_ARM/stm32l4r5xx.ld index 482b36373af..b45d63b141a 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_GCC_ARM/stm32l4r5xx.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_GCC_ARM/stm32l4r5xx.ld @@ -145,6 +145,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(SRAM1) + LENGTH(SRAM1) - STACK_SIZE; __HeapLimit = .; } > SRAM1 diff --git a/targets/TARGET_STM/TARGET_STM32L4/l4_retarget.c b/targets/TARGET_STM/TARGET_STM32L4/l4_retarget.c deleted file mode 100644 index 3bc57b31f97..00000000000 --- a/targets/TARGET_STM/TARGET_STM32L4/l4_retarget.c +++ /dev/null @@ -1,64 +0,0 @@ -/** - ****************************************************************************** - * @file l4_retarget.c - * @author MCD Application Team - * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Source File for STM32L475xG - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2018 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ -#if (defined(TWO_RAM_REGIONS) && defined(__GNUC__) && !defined(__CC_ARM) && !defined(__ARMCC_VERSION)) -#include -#include "stm32l4xx.h" -extern uint32_t __mbed_sbrk_start; -extern uint32_t __mbed_krbs_start; - -/** - * The default implementation of _sbrk() (in platform/mbed_retarget.cpp) for GCC_ARM requires one-region model (heap and - * stack share one region), which doesn't fit two-region model (heap and stack are two distinct regions), for example, - * STM32L475xG locates heap on SRAM1 and stack on SRAM2. - * Define __wrap__sbrk() to override the default _sbrk(). It is expected to get called through gcc - * hooking mechanism ('-Wl,--wrap,_sbrk') or in _sbrk(). - */ -void *__wrap__sbrk(int incr) -{ - static uint32_t heap_ind = (uint32_t) &__mbed_sbrk_start; - uint32_t heap_ind_old = heap_ind; - uint32_t heap_ind_new = heap_ind_old + incr; - - if (heap_ind_new > (uint32_t)&__mbed_krbs_start) { - errno = ENOMEM; - return (void *) - 1; - } - - heap_ind = heap_ind_new; - - return (void *) heap_ind_old; -} -#endif /* GCC_ARM toolchain && TWO_RAM_REGIONS*/ - diff --git a/targets/TARGET_STM/mbed_rtx.h b/targets/TARGET_STM/mbed_rtx.h index e2ac14222bf..7fbc864bdb0 100644 --- a/targets/TARGET_STM/mbed_rtx.h +++ b/targets/TARGET_STM/mbed_rtx.h @@ -129,34 +129,12 @@ #endif #endif // INITIAL_SP -#if (defined(__GNUC__) && !defined(__CC_ARM) && !defined(__ARMCC_VERSION) && defined(TWO_RAM_REGIONS)) -extern uint32_t __StackLimit[]; -extern uint32_t __StackTop[]; -extern uint32_t __end__[]; -extern uint32_t __HeapLimit[]; -#define HEAP_START ((unsigned char*)__end__) -#define HEAP_SIZE ((uint32_t)((uint32_t)__HeapLimit - (uint32_t)HEAP_START)) -#define ISR_STACK_START ((unsigned char*)__StackLimit) -#define ISR_STACK_SIZE ((uint32_t)((uint32_t)__StackTop - (uint32_t)__StackLimit)) -#endif #if (defined(TARGET_STM32F070RB) || defined(TARGET_STM32F072RB)) -#if (defined(__GNUC__) && !defined(__CC_ARM) && !defined(__ARMCC_VERSION)) -extern uint32_t __StackLimit; -extern uint32_t __StackTop; -extern uint32_t __end__; -extern uint32_t __HeapLimit; -#define HEAP_START ((unsigned char*) &__end__) -#define HEAP_SIZE ((uint32_t)((uint32_t) &__HeapLimit - (uint32_t) HEAP_START)) -#define ISR_STACK_START ((unsigned char*) &__StackLimit) -#define ISR_STACK_SIZE ((uint32_t)((uint32_t) &__StackTop - (uint32_t) &__StackLimit)) -#endif - #ifdef MBED_CONF_RTOS_MAIN_THREAD_STACK_SIZE #undef MBED_CONF_RTOS_MAIN_THREAD_STACK_SIZE #endif #define MBED_CONF_RTOS_MAIN_THREAD_STACK_SIZE 3072 - #endif #endif // MBED_MBED_RTX_H diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_GCC_ARM/efm32gg11.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_GCC_ARM/efm32gg11.ld index 588b65e2d07..993296393fd 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_GCC_ARM/efm32gg11.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_GCC_ARM/efm32gg11.ld @@ -204,6 +204,7 @@ SECTIONS end = __end__; _end = __end__; KEEP(*(.heap*)) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_GCC_ARM/efm32hg.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_GCC_ARM/efm32hg.ld index 24fdde536a4..192d5ac0db9 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_GCC_ARM/efm32hg.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_GCC_ARM/efm32hg.ld @@ -205,6 +205,7 @@ SECTIONS end = __end__; _end = __end__; KEEP(*(.heap*)) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32lg.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32lg.ld index 38f59ce7ccf..99b9e9aaa3a 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32lg.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32lg.ld @@ -204,6 +204,7 @@ SECTIONS end = __end__; _end = __end__; KEEP(*(.heap*)) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32pg1b.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32pg1b.ld index 75987e0ff35..0a5ae0a33ac 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32pg1b.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32pg1b.ld @@ -204,6 +204,7 @@ SECTIONS end = __end__; _end = __end__; KEEP(*(.heap*)) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_GCC_ARM/efm32pg12b.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_GCC_ARM/efm32pg12b.ld index 5be3187ccbf..a7633399871 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_GCC_ARM/efm32pg12b.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_GCC_ARM/efm32pg12b.ld @@ -204,6 +204,7 @@ SECTIONS end = __end__; _end = __end__; KEEP(*(.heap*)) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32wg.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32wg.ld index 7d1ceb1052f..79214ef03b9 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32wg.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32wg.ld @@ -205,6 +205,7 @@ SECTIONS end = __end__; _end = __end__; KEEP(*(.heap*)) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_GCC_ARM/efm32zg.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_GCC_ARM/efm32zg.ld index f114bb80cb3..0705cf64b24 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_GCC_ARM/efm32zg.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_GCC_ARM/efm32zg.ld @@ -205,6 +205,7 @@ SECTIONS end = __end__; _end = __end__; KEEP(*(.heap*)) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_GCC_ARM/efr32mg1p.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_GCC_ARM/efr32mg1p.ld index 081ed72d8b3..51358eb4af1 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_GCC_ARM/efr32mg1p.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_GCC_ARM/efr32mg1p.ld @@ -204,6 +204,7 @@ SECTIONS end = __end__; _end = __end__; KEEP(*(.heap*)) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_GCC_ARM/efr32mg12p.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_GCC_ARM/efr32mg12p.ld index 2b5adb147bf..a913d0fd25f 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_GCC_ARM/efr32mg12p.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_GCC_ARM/efr32mg12p.ld @@ -204,6 +204,7 @@ SECTIONS end = __end__; _end = __end__; KEEP(*(.heap*)) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_GCC_ARM/tmpm066fwug.ld b/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_GCC_ARM/tmpm066fwug.ld index 0ed9efb0b17..e8c906edf36 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_GCC_ARM/tmpm066fwug.ld +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_GCC_ARM/tmpm066fwug.ld @@ -134,6 +134,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_GCC_ARM/tmpm3h6fwfg.ld b/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_GCC_ARM/tmpm3h6fwfg.ld index 0a81b83f213..1ec6c93f727 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_GCC_ARM/tmpm3h6fwfg.ld +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_GCC_ARM/tmpm3h6fwfg.ld @@ -146,6 +146,7 @@ SECTIONS __end__ = .; end = __end__; KEEP(*(.heap*)) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM3HQ/device/TOOLCHAIN_GCC_ARM/tmpm3hqfdfg.ld b/targets/TARGET_TOSHIBA/TARGET_TMPM3HQ/device/TOOLCHAIN_GCC_ARM/tmpm3hqfdfg.ld index e344d5a2690..1c1f54bb5f8 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM3HQ/device/TOOLCHAIN_GCC_ARM/tmpm3hqfdfg.ld +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM3HQ/device/TOOLCHAIN_GCC_ARM/tmpm3hqfdfg.ld @@ -154,6 +154,7 @@ SECTIONS __end__ = .; end = __end__; KEEP(*(.heap*)) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_GCC_ARM/tmpm46bf10fg.ld b/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_GCC_ARM/tmpm46bf10fg.ld index b8be45b1834..76c31a59d90 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_GCC_ARM/tmpm46bf10fg.ld +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_GCC_ARM/tmpm46bf10fg.ld @@ -191,6 +191,7 @@ SECTIONS __end__ = .; end = __end__; KEEP(*(.heap*)) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_GCC_ARM/tmpm4g9f15fg.ld b/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_GCC_ARM/tmpm4g9f15fg.ld index 477899397a1..72407bd86e8 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_GCC_ARM/tmpm4g9f15fg.ld +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_GCC_ARM/tmpm4g9f15fg.ld @@ -191,6 +191,7 @@ SECTIONS __end__ = .; end = __end__; KEEP(*(.heap*)) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_TT/TARGET_TT_M3HQ/device/TOOLCHAIN_GCC_ARM/tmpm3hqfdfg.ld b/targets/TARGET_TT/TARGET_TT_M3HQ/device/TOOLCHAIN_GCC_ARM/tmpm3hqfdfg.ld index 084c7af15f3..7c9a2e765b3 100644 --- a/targets/TARGET_TT/TARGET_TT_M3HQ/device/TOOLCHAIN_GCC_ARM/tmpm3hqfdfg.ld +++ b/targets/TARGET_TT/TARGET_TT_M3HQ/device/TOOLCHAIN_GCC_ARM/tmpm3hqfdfg.ld @@ -143,6 +143,7 @@ SECTIONS __end__ = .; end = __end__; KEEP(*(.heap*)) + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_GCC_ARM/W7500.ld b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_GCC_ARM/W7500.ld index db3e23872d0..2bab185cc48 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_GCC_ARM/W7500.ld +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_GCC_ARM/W7500.ld @@ -135,6 +135,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_GCC_ARM/W7500.ld b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_GCC_ARM/W7500.ld index db3e23872d0..2bab185cc48 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_GCC_ARM/W7500.ld +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_GCC_ARM/W7500.ld @@ -135,6 +135,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_GCC_ARM/W7500.ld b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_GCC_ARM/W7500.ld index db3e23872d0..2bab185cc48 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_GCC_ARM/W7500.ld +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_GCC_ARM/W7500.ld @@ -135,6 +135,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/targets.json b/targets/targets.json index d2db79b197e..58616a5e7ab 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -3281,8 +3281,7 @@ "detect_code": ["0765"], "macros_add": [ "MBED_TICKLESS", - "USBHOST_OTHER", - "TWO_RAM_REGIONS" + "USBHOST_OTHER" ], "device_has_add": [ "ANALOGOUT", @@ -3310,7 +3309,7 @@ } }, "detect_code": ["0766"], - "macros_add": ["USBHOST_OTHER", "TWO_RAM_REGIONS"], + "macros_add": ["USBHOST_OTHER"], "device_has_add": [ "ANALOGOUT", "CAN", @@ -3344,8 +3343,7 @@ "macros_add": [ "MBED_TICKLESS", "USBHOST_OTHER", - "MBEDTLS_CONFIG_HW_SUPPORT", - "TWO_RAM_REGIONS" + "MBEDTLS_CONFIG_HW_SUPPORT" ], "device_has_add": [ "ANALOGOUT", @@ -3380,8 +3378,7 @@ "detect_code": ["0460"], "macros_add": [ "MBEDTLS_CONFIG_HW_SUPPORT", - "WISE_1570", - "TWO_RAM_REGIONS" + "WISE_1570" ], "device_has_add": [ "ANALOGOUT", @@ -3907,8 +3904,7 @@ "detect_code": ["0764"], "macros_add": [ "MBED_TICKLESS", - "USBHOST_OTHER", - "TWO_RAM_REGIONS" + "USBHOST_OTHER" ], "device_has_add": [ "ANALOGOUT", @@ -3942,8 +3938,7 @@ "detect_code": ["0820"], "macros_add": [ "MBED_TICKLESS", - "USBHOST_OTHER", - "TWO_RAM_REGIONS" + "USBHOST_OTHER" ], "device_has_add": [ "ANALOGOUT", @@ -4043,7 +4038,6 @@ "macro_name": "MODEM_ON_BOARD_UART" } }, - "macros_add": ["TWO_RAM_REGIONS"], "detect_code": ["0312"], "device_has_add": [ "ANALOGOUT", @@ -8067,7 +8061,7 @@ "public": true, "extra_labels": ["RDA", "UNO_91H", "FLASH_CMSIS_ALGO", "RDA_EMAC"], "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], - "macros": ["TWO_RAM_REGIONS", "CMSIS_NVIC_VIRTUAL", "CMSIS_NVIC_VIRTUAL_HEADER_FILE=\"RDA5981_nvic_virtual.h\""], + "macros": ["CMSIS_NVIC_VIRTUAL", "CMSIS_NVIC_VIRTUAL_HEADER_FILE=\"RDA5981_nvic_virtual.h\""], "device_has": [ "USTICKER", "PORTIN",