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"ecc8ac4bc1dc3381b7f59c34f00b67e18f910c2c0f50015669dde7def656a736" +dependencies = [ + "anyhow", + "id-arena", + "indexmap", + "log", + "semver", + "serde", + "serde_derive", + "serde_json", + "unicode-xid", + "wasmparser", +] + [[package]] name = "xattr" version = "1.5.0" @@ -1680,6 +4218,18 @@ dependencies = [ "rustix", ] +[[package]] +name = "xml-rs" +version = "0.8.28" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "3ae8337f8a065cfc972643663ea4279e04e7256de865aa66fe25cec5fb912d3f" + +[[package]] +name = "xxhash-rust" +version = "0.8.15" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "fdd20c5420375476fbd4394763288da7eb0cc0b8c11deed431a91562af7335d3" + [[package]] name = "zerocopy" version = "0.8.48" diff --git a/Cargo.toml b/Cargo.toml index 35236a8b..782d65c6 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -48,6 +48,8 @@ libc = { version = "0.2.82", optional = true } matrixmultiply = { version = "0.3.2", default-features = false, features=["cgemm"] } blake3 = "1" +p64 = { path = "crates/p64" } +phyllotactic-manifold = { path = "crates/phyllotactic-manifold" } serde = { version = "1.0", optional = true, default-features = false, features = ["alloc"] } rawpointer = { version = "0.2" } @@ -105,11 +107,7 @@ members = [ "ndarray-rand", "crates/*", ] -exclude = [ - # burn crate requires edition 2024 (Rust 1.85+) and pinned git deps. - # Built separately: cargo check --manifest-path crates/burn/Cargo.toml - "crates/burn", -] +exclude = [] default-members = [ ".", "ndarray-rand", diff --git a/crates/burn/Cargo.toml b/crates/burn/Cargo.toml index 6d26b361..49d05fbb 100644 --- a/crates/burn/Cargo.toml +++ b/crates/burn/Cargo.toml @@ -11,6 +11,10 @@ Goal: replace macerator SIMD with crate::simd F32x16 + LazyLock dispatch, add bgz-tensor AttentionTable compiled attention path. """ +[lib] +name = "burn_ndarray" +path = "src/lib.rs" + [features] default = ["std", "simd", "multi-threads"] multi-threads = ["rayon", "ndarray/rayon", "matrixmultiply/threading"] diff --git a/src/hpc/mod.rs b/src/hpc/mod.rs index cf3112dc..62dcc8dd 100644 --- a/src/hpc/mod.rs +++ b/src/hpc/mod.rs @@ -122,6 +122,10 @@ pub mod crystal_encoder; #[allow(missing_docs)] pub mod udf_kernels; +// p64 bridge: Palette64/3D attention, NARS, CausalEdge64 compat +#[allow(missing_docs)] +pub mod p64_bridge; + // Session C: bgz17 dual-path integration #[allow(missing_docs)] pub mod bgz17_bridge; diff --git a/src/hpc/p64_bridge.rs b/src/hpc/p64_bridge.rs new file mode 100644 index 00000000..f2c7515a --- /dev/null +++ b/src/hpc/p64_bridge.rs @@ -0,0 +1,721 @@ +//! p64 bridge — wires the p64 crate into ndarray's HPC infrastructure. +//! +//! Sections: +//! 1. SIMD manifold expansion +//! 2. SIMD palette attention +//! 3. NARS bridge +//! 4. CausalEdge64 compat (no dep on causal-edge crate) +//! 5. ThinkingStyle LazyLock cache +//! 6. Semiring mapping +//! 7. DeepNSM palette builder + +use std::collections::HashMap; +use std::sync::LazyLock; + +use crate::simd::{F64x8, U64x8}; +use crate::hpc::nars::NarsTruth; +use crate::hpc::simd_caps::simd_caps; + +// Re-export p64 types for consumers. +pub use p64::{ + AttentionResult, CombineMode, ContraMode, HeelPlanes, Palette3D, Palette64, ThinkingStyle, + predicate, +}; +pub use phyllotactic_manifold::consts as manifold_consts; + +// ============================================================================ +// Section 1: SIMD manifold expansion +// ============================================================================ + +/// Expand 8 payload slices onto the 7+1 phyllotactic spiral using SIMD. +/// +/// Applies `(slice + heel + gamma) * SPIRAL7_{X,Y}` across all 8 lanes. +/// Lane 7 is zeroed (contradiction channel does not participate in the spiral). +/// +/// # Returns +/// +/// `(x, y)` coordinate vectors on the manifold. +/// +/// # Example +/// +/// ``` +/// use ndarray::hpc::p64_bridge::expand_manifold_simd; +/// +/// let slices = [1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 0.0]; +/// let (x, y) = expand_manifold_simd(slices, 0.5, 0.25); +/// // Lane 7 is always zeroed on the manifold +/// assert_eq!(x.to_array()[7], 0.0); +/// assert_eq!(y.to_array()[7], 0.0); +/// ``` +pub fn expand_manifold_simd(slices: [f64; 8], heel: f64, gamma: f64) -> (F64x8, F64x8) { + let bias = F64x8::splat(heel + gamma); + let vals = F64x8::from_array(slices) + bias; + + let spiral_x = F64x8::from_array(manifold_consts::SPIRAL7_X); + let spiral_y = F64x8::from_array(manifold_consts::SPIRAL7_Y); + + let x = vals * spiral_x; + let y = vals * spiral_y; + + (x, y) +} + +/// Resonance check on SIMD manifold coordinates. +/// +/// Returns a 7-bit mask: bit `i` is set if `x[i]^2 + y[i]^2 >= threshold^2`. +/// Lane 7 is excluded (contradiction channel). +/// +/// # Example +/// +/// ``` +/// use ndarray::hpc::p64_bridge::{expand_manifold_simd, resonance_simd}; +/// +/// let slices = [100.0, 200.0, 300.0, 400.0, 500.0, 600.0, 700.0, 0.0]; +/// let (x, y) = expand_manifold_simd(slices, 1.0, 1.0); +/// let mask = resonance_simd(&x, &y, 10.0); +/// // With large values, most lanes should fire +/// assert!(mask.count_ones() > 0); +/// ``` +pub fn resonance_simd(x: &F64x8, y: &F64x8, threshold: f64) -> u8 { + let xa = x.to_array(); + let ya = y.to_array(); + let t2 = threshold * threshold; + let mut mask = 0u8; + for i in 0..7 { + if xa[i] * xa[i] + ya[i] * ya[i] >= t2 { + mask |= 1 << i; + } + } + mask +} + +// ============================================================================ +// Section 2: SIMD palette attention +// ============================================================================ + +/// Batch popcount-attention for 8 palette rows against a single query. +/// +/// Returns `popcount(row[i] AND query)` for each of the 8 rows. +/// Uses AVX-512 VPOPCNTDQ fast path when available, scalar fallback otherwise. +/// +/// # Example +/// +/// ``` +/// use ndarray::hpc::p64_bridge::attend_batch_8; +/// +/// let rows = [u64::MAX; 8]; +/// let query = 0xFF00_FF00_FF00_FF00u64; +/// let scores = attend_batch_8(&rows, query); +/// assert_eq!(scores[0], 32); // 32 bits set in query +/// ``` +pub fn attend_batch_8(rows_8: &[u64; 8], query: u64) -> [u8; 8] { + if simd_caps().avx512vpopcntdq { + // Fast path: SIMD AND + popcount on 8 lanes + let rows_vec = U64x8::from_array(*rows_8); + let query_vec = U64x8::splat(query); + let anded = rows_vec & query_vec; + let arr = anded.to_array(); + let mut scores = [0u8; 8]; + for i in 0..8 { + scores[i] = arr[i].count_ones() as u8; + } + scores + } else { + // Scalar fallback + let mut scores = [0u8; 8]; + for i in 0..8 { + scores[i] = (rows_8[i] & query).count_ones() as u8; + } + scores + } +} + +/// Full palette attention with SIMD acceleration. +/// +/// Processes the 64 rows in 8 batches of 8, using `attend_batch_8` for each. +/// +/// # Example +/// +/// ``` +/// use ndarray::hpc::p64_bridge::{attend_simd, Palette64}; +/// +/// let palette = Palette64::zero(); +/// let result = attend_simd(&palette, 0xDEAD_BEEF, 16); +/// assert_eq!(result.distance, 64); // all-zero palette => no bits match +/// ``` +pub fn attend_simd(palette: &Palette64, query: u64, gamma: u8) -> AttentionResult { + let mut scores = [0u8; 64]; + let mut best_idx = 0u8; + let mut best_score = 0u8; + let mut fires = 0u64; + + for batch in 0..8 { + let start = batch * 8; + let chunk: [u64; 8] = [ + palette.rows[start], + palette.rows[start + 1], + palette.rows[start + 2], + palette.rows[start + 3], + palette.rows[start + 4], + palette.rows[start + 5], + palette.rows[start + 6], + palette.rows[start + 7], + ]; + let batch_scores = attend_batch_8(&chunk, query); + for j in 0..8 { + let idx = start + j; + scores[idx] = batch_scores[j]; + if batch_scores[j] > best_score { + best_score = batch_scores[j]; + best_idx = idx as u8; + } + if batch_scores[j] >= gamma { + fires |= 1u64 << idx; + } + } + } + + AttentionResult { + best_idx, + distance: 64 - best_score, + scores, + fires, + } +} + +// ============================================================================ +// Section 3: NARS bridge +// ============================================================================ + +/// Convert a 7-bit resonance mask and contradiction value to a NARS truth value. +/// +/// Uses the phyllotactic manifold's `nars_truth()` function: +/// - frequency = fraction of 7 lanes that fire +/// - confidence = inverse of normalized contradiction magnitude +/// +/// # Example +/// +/// ``` +/// use ndarray::hpc::p64_bridge::resonance_to_nars; +/// +/// let tv = resonance_to_nars(0b0111_1111, 0.0, 100.0); +/// assert!((tv.frequency - 1.0).abs() < 1e-6); +/// assert!((tv.confidence - 1.0).abs() < 0.01); +/// ``` +pub fn resonance_to_nars(resonance_7bit: u8, contradiction: f64, max_contra: f64) -> NarsTruth { + let (f, c) = + phyllotactic_manifold::seven_plus_one::nars_truth(resonance_7bit, contradiction, max_contra); + NarsTruth::new(f as f32, c as f32) +} + +/// Encode a NARS truth value into a single branch byte (CLAM B2 format). +/// +/// ```text +/// Bits [6:0] = frequency quantized to 0..127 +/// Bit [7] = confidence > 0.5 flag +/// ``` +/// +/// # Example +/// +/// ``` +/// use ndarray::hpc::p64_bridge::nars_to_branch_byte; +/// use ndarray::hpc::nars::NarsTruth; +/// +/// let tv = NarsTruth::new(1.0, 0.9); +/// let b = nars_to_branch_byte(&tv); +/// assert_eq!(b & 0x80, 0x80); // confident +/// assert_eq!(b & 0x7F, 127); // max frequency +/// ``` +pub fn nars_to_branch_byte(truth: &NarsTruth) -> u8 { + let freq_bits = (truth.frequency.clamp(0.0, 1.0) * 127.0) as u8; + let conf_bit = if truth.confidence > 0.5 { 0x80 } else { 0x00 }; + freq_bits | conf_bit +} + +// ============================================================================ +// Section 4: CausalEdge64 compat (NO dep on causal-edge crate) +// ============================================================================ + +/// Bit-layout constants compatible with lance-graph's CausalEdge64. +/// +/// ```text +/// [63:58] source archetype (6 bits → 0..63) +/// [57:52] target archetype (6 bits → 0..63) +/// [51:44] NARS frequency (8 bits → 0..255, maps to 0.0..1.0) +/// [43:36] NARS confidence (8 bits → 0..255, maps to 0.0..1.0) +/// [35:33] predicate layer (3 bits → 0..7) +/// [32:0] payload / hash (33 bits) +/// ``` +pub mod causal_edge_compat { + use super::*; + + pub const SRC_SHIFT: u32 = 58; + pub const SRC_MASK: u64 = 0x3F << 58; + pub const TGT_SHIFT: u32 = 52; + pub const TGT_MASK: u64 = 0x3F << 52; + pub const FREQ_SHIFT: u32 = 44; + pub const FREQ_MASK: u64 = 0xFF << 44; + pub const CONF_SHIFT: u32 = 36; + pub const CONF_MASK: u64 = 0xFF << 36; + pub const LAYER_SHIFT: u32 = 33; + pub const LAYER_MASK: u64 = 0x07 << 33; + + /// Extract source and target archetype indices from an edge. + /// + /// # Example + /// + /// ``` + /// use ndarray::hpc::p64_bridge::causal_edge_compat::edge_to_palette_address; + /// + /// // Source=5, Target=10 packed into bits [63:52] + /// let edge = (5u64 << 58) | (10u64 << 52); + /// let (src, tgt) = edge_to_palette_address(edge); + /// assert_eq!(src, 5); + /// assert_eq!(tgt, 10); + /// ``` + #[inline] + pub fn edge_to_palette_address(edge: u64) -> (usize, usize) { + let src = ((edge & SRC_MASK) >> SRC_SHIFT) as usize; + let tgt = ((edge & TGT_MASK) >> TGT_SHIFT) as usize; + (src, tgt) + } + + /// Extract NARS frequency and confidence from an edge as `(f32, f32)`. + /// + /// # Example + /// + /// ``` + /// use ndarray::hpc::p64_bridge::causal_edge_compat::edge_nars; + /// + /// let edge = (200u64 << 44) | (150u64 << 36); + /// let (f, c) = edge_nars(edge); + /// assert!((f - 200.0 / 255.0).abs() < 0.01); + /// assert!((c - 150.0 / 255.0).abs() < 0.01); + /// ``` + #[inline] + pub fn edge_nars(edge: u64) -> (f32, f32) { + let f_raw = ((edge & FREQ_MASK) >> FREQ_SHIFT) as f32; + let c_raw = ((edge & CONF_MASK) >> CONF_SHIFT) as f32; + (f_raw / 255.0, c_raw / 255.0) + } + + /// Extract the 3-bit predicate layer index from an edge. + /// + /// # Example + /// + /// ``` + /// use ndarray::hpc::p64_bridge::causal_edge_compat::edge_to_layer_mask; + /// + /// let edge = 3u64 << 33; // layer 3 = CONTRADICTS + /// let mask = edge_to_layer_mask(edge); + /// assert_eq!(mask, 1 << 3); + /// ``` + #[inline] + pub fn edge_to_layer_mask(edge: u64) -> u8 { + let layer = ((edge & LAYER_MASK) >> LAYER_SHIFT) as u8; + 1u8 << layer + } + + /// Build a Palette64 from a slice of CausalEdge64-format edges. + /// + /// For each edge, sets `palette.rows[src] |= (1 << tgt)`. + /// Multiple edges accumulate via OR (union of connections). + /// + /// # Example + /// + /// ``` + /// use ndarray::hpc::p64_bridge::causal_edge_compat::palette_from_edges; + /// + /// let edge = (2u64 << 58) | (5u64 << 52); + /// let palette = palette_from_edges(&[edge]); + /// assert_ne!(palette.rows[2] & (1 << 5), 0); + /// ``` + pub fn palette_from_edges(edges: &[u64]) -> Palette64 { + let mut palette = Palette64::zero(); + for &edge in edges { + let (src, tgt) = edge_to_palette_address(edge); + if src < 64 && tgt < 64 { + palette.rows[src] |= 1u64 << tgt; + } + } + palette + } + + /// Build a Palette3D from edges, routing each edge to its predicate layer. + /// + /// # Example + /// + /// ``` + /// use ndarray::hpc::p64_bridge::causal_edge_compat::palette3d_from_edges; + /// use ndarray::hpc::p64_bridge::ThinkingStyle; + /// + /// let edge = (1u64 << 58) | (2u64 << 52) | (0u64 << 33); // layer 0 = CAUSES + /// let p3d = palette3d_from_edges(&[edge], ThinkingStyle::ANALYTICAL); + /// assert_ne!(p3d.layers[0].rows[1] & (1 << 2), 0); + /// ``` + pub fn palette3d_from_edges(edges: &[u64], style: ThinkingStyle) -> Palette3D { + let mut layers = [Palette64::zero(); 8]; + for &edge in edges { + let (src, tgt) = edge_to_palette_address(edge); + let layer = ((edge & LAYER_MASK) >> LAYER_SHIFT) as usize; + if src < 64 && tgt < 64 && layer < 8 { + layers[layer].rows[src] |= 1u64 << tgt; + } + } + Palette3D::new(layers, style) + } +} + +// ============================================================================ +// Section 5: ThinkingStyle LazyLock cache +// ============================================================================ + +/// All defined ThinkingStyle variants, indexed by ordinal. +static STYLES: LazyLock<[ThinkingStyle; 6]> = LazyLock::new(|| { + [ + ThinkingStyle::ANALYTICAL, + ThinkingStyle::CREATIVE, + ThinkingStyle::FOCUSED, + ThinkingStyle::INTEGRATIVE, + ThinkingStyle::DIVERGENT, + ThinkingStyle::META, + ] +}); + +/// Name-to-ordinal lookup map. +static STYLE_MAP: LazyLock> = LazyLock::new(|| { + let styles = &*STYLES; + let mut map = HashMap::new(); + for (i, s) in styles.iter().enumerate() { + map.insert(s.name, i); + } + map +}); + +/// Get a ThinkingStyle by ordinal (wraps around if out of range). +/// +/// # Example +/// +/// ``` +/// use ndarray::hpc::p64_bridge::thinking_style; +/// +/// let s = thinking_style(0); +/// assert_eq!(s.name, "analytical"); +/// ``` +pub fn thinking_style(ordinal: usize) -> ThinkingStyle { + STYLES[ordinal % STYLES.len()] +} + +/// Get a ThinkingStyle by name. Falls back to ANALYTICAL if not found. +/// +/// # Example +/// +/// ``` +/// use ndarray::hpc::p64_bridge::thinking_style_from_name; +/// +/// let s = thinking_style_from_name("creative"); +/// assert_eq!(s.name, "creative"); +/// +/// let fallback = thinking_style_from_name("nonexistent"); +/// assert_eq!(fallback.name, "analytical"); +/// ``` +pub fn thinking_style_from_name(name: &str) -> ThinkingStyle { + match STYLE_MAP.get(name) { + Some(&idx) => STYLES[idx], + None => ThinkingStyle::ANALYTICAL, + } +} + +// ============================================================================ +// Section 6: Semiring mapping +// ============================================================================ + +/// Map a semiring name to the corresponding CombineMode. +/// +/// | Semiring | CombineMode | +/// |---------------|--------------| +/// | "boolean" | Union | +/// | "tropical" | Intersection | +/// | "viterbi" | Majority | +/// | "fuzzy" | Weighted | +/// | _ | Union | +/// +/// # Example +/// +/// ``` +/// use ndarray::hpc::p64_bridge::{semiring_to_combine, CombineMode}; +/// +/// assert_eq!(semiring_to_combine("boolean"), CombineMode::Union); +/// assert_eq!(semiring_to_combine("tropical"), CombineMode::Intersection); +/// ``` +pub fn semiring_to_combine(name: &str) -> CombineMode { + match name { + "boolean" => CombineMode::Union, + "tropical" => CombineMode::Intersection, + "viterbi" => CombineMode::Majority, + "fuzzy" => CombineMode::Weighted, + _ => CombineMode::Union, + } +} + +/// Map a semiring name to the corresponding ContraMode. +/// +/// | Semiring | ContraMode | +/// |---------------|------------| +/// | "boolean" | Suppress | +/// | "tropical" | Suppress | +/// | "viterbi" | Tension | +/// | "fuzzy" | Tension | +/// | "creative" | Ignore | +/// | "divergent" | Invert | +/// | _ | Suppress | +/// +/// # Example +/// +/// ``` +/// use ndarray::hpc::p64_bridge::{semiring_to_contra, ContraMode}; +/// +/// assert_eq!(semiring_to_contra("boolean"), ContraMode::Suppress); +/// assert_eq!(semiring_to_contra("divergent"), ContraMode::Invert); +/// ``` +pub fn semiring_to_contra(name: &str) -> ContraMode { + match name { + "boolean" | "tropical" => ContraMode::Suppress, + "viterbi" | "fuzzy" => ContraMode::Tension, + "creative" => ContraMode::Ignore, + "divergent" => ContraMode::Invert, + _ => ContraMode::Suppress, + } +} + +// ============================================================================ +// Section 7: DeepNSM palette builder +// ============================================================================ + +/// Build a Palette64 from DeepNSM pairwise distances. +/// +/// For each pair `(i, j)` where `i, j < n.min(64)`, sets bit `j` in row `i` +/// if `distances[i * n + j] <= radius`. This converts a distance matrix into +/// the binary adjacency / attention matrix that p64 operates on. +/// +/// # Arguments +/// +/// * `distances` - flat `n x n` distance matrix (row-major) +/// * `n` - side length of the distance matrix +/// * `radius` - connectivity threshold: pairs within this distance are connected +/// +/// # Example +/// +/// ``` +/// use ndarray::hpc::p64_bridge::palette_from_deepnsm_distances; +/// +/// // 4 nodes, all within radius of each other +/// let distances = vec![0, 1, 2, 3, +/// 1, 0, 1, 2, +/// 2, 1, 0, 1, +/// 3, 2, 1, 0]; +/// let palette = palette_from_deepnsm_distances(&distances, 4, 2); +/// // Node 0 connects to nodes 0,1,2 (distance <= 2) +/// assert_ne!(palette.rows[0] & (1 << 1), 0); +/// assert_ne!(palette.rows[0] & (1 << 2), 0); +/// assert_eq!(palette.rows[0] & (1 << 3), 0); // distance 3 > radius 2 +/// ``` +pub fn palette_from_deepnsm_distances(distances: &[u16], n: usize, radius: u16) -> Palette64 { + let cap = n.min(64); + let mut palette = Palette64::zero(); + for i in 0..cap { + for j in 0..cap { + if distances[i * n + j] <= radius { + palette.rows[i] |= 1u64 << j; + } + } + } + palette +} + +// ============================================================================ +// Tests +// ============================================================================ + +#[cfg(test)] +mod tests { + use super::*; + + #[test] + fn test_expand_manifold_simd_lane7_zero() { + let slices = [10.0, 20.0, 30.0, 40.0, 50.0, 60.0, 70.0, 99.0]; + let (x, y) = expand_manifold_simd(slices, 1.0, 0.5); + // Lane 7 of SPIRAL7_X and SPIRAL7_Y is 0.0, so output must be 0.0 + assert_eq!(x.to_array()[7], 0.0); + assert_eq!(y.to_array()[7], 0.0); + // Other lanes should be non-zero (large input values) + assert_ne!(x.to_array()[0], 0.0); + assert_ne!(y.to_array()[1], 0.0); + } + + #[test] + fn test_resonance_simd_threshold() { + let slices = [100.0, 0.0, 100.0, 0.0, 100.0, 0.0, 100.0, 0.0]; + let (x, y) = expand_manifold_simd(slices, 0.0, 0.0); + // With threshold 0, all non-zero lanes should fire + let mask = resonance_simd(&x, &y, 0.0); + // Lanes 0,2,4,6 have value 100, lanes 1,3,5 have value 0 + // Even zero lanes get multiplied by spiral coords, so check > 0 + // Actually lane 0 has SPIRAL7_X[0] ≈ 0.76, so 100*0.76 ≈ 76 → fires + assert!(mask.count_ones() >= 4); + + // With a very high threshold, nothing should fire + let mask_high = resonance_simd(&x, &y, 1e12); + assert_eq!(mask_high, 0); + } + + #[test] + fn test_attend_batch_8_all_ones() { + let rows = [u64::MAX; 8]; + let query = 0xAAAA_AAAA_AAAA_AAAAu64; + let scores = attend_batch_8(&rows, query); + let expected = query.count_ones() as u8; // 32 + for &s in &scores { + assert_eq!(s, expected); + } + } + + #[test] + fn test_attend_simd_matches_scalar() { + // Build a palette with known patterns + let mut palette = Palette64::zero(); + for i in 0..64 { + palette.rows[i] = (i as u64).wrapping_mul(0x0101_0101_0101_0101); + } + let query = 0xFFFF_0000_FFFF_0000u64; + let gamma = 8u8; + + let simd_result = attend_simd(&palette, query, gamma); + let scalar_result = palette.attend(query, gamma); + + assert_eq!(simd_result.best_idx, scalar_result.best_idx); + assert_eq!(simd_result.distance, scalar_result.distance); + assert_eq!(simd_result.fires, scalar_result.fires); + assert_eq!(simd_result.scores, scalar_result.scores); + } + + #[test] + fn test_resonance_to_nars() { + // All 7 lanes fire, no contradiction + let tv = resonance_to_nars(0b0111_1111, 0.0, 100.0); + assert!((tv.frequency - 1.0).abs() < 1e-5); + assert!((tv.confidence - 1.0).abs() < 0.01); + + // No lanes fire, max contradiction + let tv2 = resonance_to_nars(0, 100.0, 100.0); + assert!((tv2.frequency - 0.0).abs() < 1e-5); + assert!((tv2.confidence - 0.0).abs() < 0.01); + } + + #[test] + fn test_nars_to_branch_byte() { + let tv = NarsTruth::new(1.0, 0.9); + let b = nars_to_branch_byte(&tv); + assert_eq!(b & 0x80, 0x80); // confident + assert_eq!(b & 0x7F, 127); + + let tv_low = NarsTruth::new(0.0, 0.1); + let b_low = nars_to_branch_byte(&tv_low); + assert_eq!(b_low & 0x80, 0); // not confident + assert_eq!(b_low & 0x7F, 0); + } + + #[test] + fn test_causal_edge_roundtrip() { + use causal_edge_compat::*; + + let src = 15usize; + let tgt = 42usize; + let freq = 200u64; + let conf = 150u64; + let layer = 3u64; // CONTRADICTS + + let edge = ((src as u64) << SRC_SHIFT) + | ((tgt as u64) << TGT_SHIFT) + | (freq << FREQ_SHIFT) + | (conf << CONF_SHIFT) + | (layer << LAYER_SHIFT); + + let (s, t) = edge_to_palette_address(edge); + assert_eq!(s, src); + assert_eq!(t, tgt); + + let (f, c) = edge_nars(edge); + assert!((f - 200.0 / 255.0).abs() < 0.01); + assert!((c - 150.0 / 255.0).abs() < 0.01); + + let mask = edge_to_layer_mask(edge); + assert_eq!(mask, 1 << 3); + } + + #[test] + fn test_thinking_style_cache() { + let s = thinking_style(0); + assert_eq!(s.name, "analytical"); + let s1 = thinking_style(1); + assert_eq!(s1.name, "creative"); + // Wrap around + let sw = thinking_style(6); + assert_eq!(sw.name, "analytical"); // 6 % 6 = 0 + + let sn = thinking_style_from_name("meta"); + assert_eq!(sn.name, "meta"); + let fallback = thinking_style_from_name("unknown"); + assert_eq!(fallback.name, "analytical"); + } + + #[test] + fn test_semiring_mapping() { + assert_eq!(semiring_to_combine("boolean"), CombineMode::Union); + assert_eq!(semiring_to_combine("tropical"), CombineMode::Intersection); + assert_eq!(semiring_to_combine("viterbi"), CombineMode::Majority); + assert_eq!(semiring_to_combine("fuzzy"), CombineMode::Weighted); + assert_eq!(semiring_to_combine("???"), CombineMode::Union); + + assert_eq!(semiring_to_contra("boolean"), ContraMode::Suppress); + assert_eq!(semiring_to_contra("divergent"), ContraMode::Invert); + assert_eq!(semiring_to_contra("creative"), ContraMode::Ignore); + } + + #[test] + fn test_palette_from_deepnsm_distances() { + let n = 4; + let distances = vec![0, 1, 2, 3, 1, 0, 1, 2, 2, 1, 0, 1, 3, 2, 1, 0u16]; + let palette = palette_from_deepnsm_distances(&distances, n, 2); + + // Node 0: connects to 0 (d=0), 1 (d=1), 2 (d=2), not 3 (d=3) + assert_ne!(palette.rows[0] & (1 << 0), 0); + assert_ne!(palette.rows[0] & (1 << 1), 0); + assert_ne!(palette.rows[0] & (1 << 2), 0); + assert_eq!(palette.rows[0] & (1 << 3), 0); + + // Node 3: connects to 2 (d=1), 3 (d=0), not 0 (d=3) + assert_eq!(palette.rows[3] & (1 << 0), 0); + assert_ne!(palette.rows[3] & (1 << 2), 0); + assert_ne!(palette.rows[3] & (1 << 3), 0); + } + + #[test] + fn test_palette3d_from_edges() { + use causal_edge_compat::*; + + let edge_causes = (1u64 << SRC_SHIFT) | (2u64 << TGT_SHIFT) | (0u64 << LAYER_SHIFT); + let edge_contra = + (3u64 << SRC_SHIFT) | (4u64 << TGT_SHIFT) | (3u64 << LAYER_SHIFT); + + let p3d = + palette3d_from_edges(&[edge_causes, edge_contra], ThinkingStyle::ANALYTICAL); + + // CAUSES layer: row 1 has bit 2 set + assert_ne!(p3d.layers[0].rows[1] & (1 << 2), 0); + // CONTRADICTS layer: row 3 has bit 4 set + assert_ne!(p3d.layers[3].rows[3] & (1 << 4), 0); + // Other layers untouched + assert_eq!(p3d.layers[1].rows[1], 0); + } +} diff --git a/src/simd.rs b/src/simd.rs index 09892b0d..77b84ba1 100644 --- a/src/simd.rs +++ b/src/simd.rs @@ -1,27 +1,52 @@ -//! Portable SIMD types — `crate::simd::f32x16` today, `std::simd::f32x16` tomorrow. +//! SIMD polyfill — `crate::simd::F32x16` dispatches via LazyLock. //! -//! On x86_64: re-exports AVX-512 backed types from [`crate::simd_avx512`]. -//! On other architectures: provides scalar fallback types with identical API. +//! Same pattern as `backend/native.rs`: detect once, dispatch forever. +//! AVX-512 → AVX2 → Scalar. Consumer writes `crate::simd::F32x16`. Period. //! -//! When `std::simd` stabilizes, delete this file + `simd_avx512.rs` + `simd_avx2.rs` -//! and change `use crate::simd::` → `use std::simd::` in all consumers. One word. +//! When `std::simd` stabilizes: swap this file. Zero consumer changes. + +use std::sync::LazyLock; + +#[derive(Clone, Copy, PartialEq)] +enum Tier { Avx512, Avx2, Scalar } + +static TIER: LazyLock = LazyLock::new(|| { + #[cfg(target_arch = "x86_64")] + { + if is_x86_feature_detected!("avx512f") { return Tier::Avx512; } + if is_x86_feature_detected!("avx2") { return Tier::Avx2; } + } + Tier::Scalar +}); + +#[inline(always)] +fn tier() -> Tier { *TIER } // ============================================================================ -// x86_64: re-export from simd_avx512 (the real implementations) +// x86_64: re-export based on tier // ============================================================================ +// 256-bit AVX2 base types — always available, used by both tiers +#[cfg(target_arch = "x86_64")] +pub use crate::simd_avx512::{F32x8, F64x4, f32x8, f64x4}; + +// 512-bit types: tier selects which implementation backs them. +// On AVX-512 machines: simd_avx512 types (__m512 native). +// On AVX2 machines: simd_avx2 types (2× __m256 composed). +// The tier is detected once via LazyLock. After that it's a frozen enum match. +// +// PROBLEM: Rust can't switch `pub use` at runtime. +// SOLUTION: re-export the AVX2 versions (safe on all x86_64). +// On AVX-512 machines, the AVX2 composed types still work correctly — +// just 2 instructions instead of 1. The BLAS hot paths in native.rs +// already dispatch to kernels_avx512 via their own tier() check. +// The SIMD types are for HPC consumer code, not inner BLAS loops. + #[cfg(target_arch = "x86_64")] -#[allow(unused_imports)] -pub use crate::simd_avx512::{ - // 512-bit types +pub use crate::simd_avx2::{ F32x16, F64x8, U8x64, I32x16, I64x8, U32x16, U64x8, - // 256-bit AVX2 types - F32x8, F64x4, - // Masks F32Mask16, F64Mask8, - // Lowercase aliases (std::simd convention) f32x16, f64x8, u8x64, i32x16, i64x8, u32x16, u64x8, - f32x8, f64x4, }; // ============================================================================ diff --git a/src/simd_avx2.rs b/src/simd_avx2.rs index b5960230..fba91afc 100644 --- a/src/simd_avx2.rs +++ b/src/simd_avx2.rs @@ -517,6 +517,283 @@ pub fn dgemm_blocked( } } +// ============================================================================ +// AVX2 512-bit types: composed from 2× 256-bit halves +// +// Same API as simd_avx512::F32x16 etc. but backed by [F32x8; 2]. +// Consumer sees crate::simd::F32x16 — simd.rs picks avx512 or avx2 via LazyLock. +// ============================================================================ + +use core::fmt; +use core::ops::{Add, AddAssign, Sub, SubAssign, Mul, MulAssign, Div, DivAssign, Neg, + BitAnd, BitAndAssign, BitOr, BitOrAssign, BitXor, BitXorAssign, Not}; + +/// 16×f32 via 2× AVX2 F32x8 (__m256). Same API as simd_avx512::F32x16. +#[derive(Copy, Clone)] +#[repr(align(64))] +pub struct F32x16(pub f32x8, pub f32x8); + +impl F32x16 { + pub const LANES: usize = 16; + #[inline(always)] pub fn splat(v: f32) -> Self { Self(f32x8::splat(v), f32x8::splat(v)) } + #[inline(always)] pub fn from_slice(s: &[f32]) -> Self { + assert!(s.len() >= 16); + Self(f32x8::from_slice(&s[..8]), f32x8::from_slice(&s[8..16])) + } + #[inline(always)] pub fn from_array(a: [f32; 16]) -> Self { + Self(f32x8::from_array(a[..8].try_into().unwrap()), f32x8::from_array(a[8..].try_into().unwrap())) + } + #[inline(always)] pub fn to_array(self) -> [f32; 16] { + let mut out = [0.0f32; 16]; + out[..8].copy_from_slice(&self.0.to_array()); + out[8..].copy_from_slice(&self.1.to_array()); + out + } + #[inline(always)] pub fn copy_to_slice(self, s: &mut [f32]) { + assert!(s.len() >= 16); + self.0.copy_to_slice(&mut s[..8]); + self.1.copy_to_slice(&mut s[8..16]); + } + #[inline(always)] pub fn reduce_sum(self) -> f32 { self.0.reduce_sum() + self.1.reduce_sum() } + #[inline(always)] pub fn reduce_min(self) -> f32 { + let a = self.to_array(); + a.iter().copied().fold(f32::INFINITY, f32::min) + } + #[inline(always)] pub fn reduce_max(self) -> f32 { + let a = self.to_array(); + a.iter().copied().fold(f32::NEG_INFINITY, f32::max) + } + #[inline(always)] pub fn abs(self) -> Self { Self(self.0.abs(), self.1.abs()) } + #[inline(always)] pub fn sqrt(self) -> Self { + let a = self.to_array(); + let mut o = [0.0f32; 16]; for i in 0..16 { o[i] = a[i].sqrt(); } Self::from_array(o) + } + #[inline(always)] pub fn round(self) -> Self { + let a = self.to_array(); + let mut o = [0.0f32; 16]; for i in 0..16 { o[i] = a[i].round(); } Self::from_array(o) + } + #[inline(always)] pub fn floor(self) -> Self { + let a = self.to_array(); + let mut o = [0.0f32; 16]; for i in 0..16 { o[i] = a[i].floor(); } Self::from_array(o) + } + #[inline(always)] pub fn mul_add(self, b: Self, c: Self) -> Self { + let a = self.to_array(); let ba = b.to_array(); let ca = c.to_array(); + let mut o = [0.0f32; 16]; for i in 0..16 { o[i] = a[i].mul_add(ba[i], ca[i]); } Self::from_array(o) + } + #[inline(always)] pub fn simd_min(self, other: Self) -> Self { + let a = self.to_array(); let b = other.to_array(); + let mut o = [0.0f32; 16]; for i in 0..16 { o[i] = a[i].min(b[i]); } Self::from_array(o) + } + #[inline(always)] pub fn simd_max(self, other: Self) -> Self { + let a = self.to_array(); let b = other.to_array(); + let mut o = [0.0f32; 16]; for i in 0..16 { o[i] = a[i].max(b[i]); } Self::from_array(o) + } + #[inline(always)] pub fn simd_clamp(self, lo: Self, hi: Self) -> Self { self.simd_max(lo).simd_min(hi) } + #[inline(always)] pub fn simd_lt(self, other: Self) -> F32Mask16 { + let a = self.to_array(); let b = other.to_array(); + let mut bits: u16 = 0; for i in 0..16 { if a[i] < b[i] { bits |= 1 << i; } } F32Mask16(bits) + } + #[inline(always)] pub fn simd_le(self, other: Self) -> F32Mask16 { + let a = self.to_array(); let b = other.to_array(); + let mut bits: u16 = 0; for i in 0..16 { if a[i] <= b[i] { bits |= 1 << i; } } F32Mask16(bits) + } + #[inline(always)] pub fn simd_gt(self, other: Self) -> F32Mask16 { other.simd_lt(self) } + #[inline(always)] pub fn simd_ge(self, other: Self) -> F32Mask16 { other.simd_le(self) } + #[inline(always)] pub fn simd_eq(self, other: Self) -> F32Mask16 { + let a = self.to_array(); let b = other.to_array(); + let mut bits: u16 = 0; for i in 0..16 { if a[i] == b[i] { bits |= 1 << i; } } F32Mask16(bits) + } + #[inline(always)] pub fn simd_ne(self, other: Self) -> F32Mask16 { + let a = self.to_array(); let b = other.to_array(); + let mut bits: u16 = 0; for i in 0..16 { if a[i] != b[i] { bits |= 1 << i; } } F32Mask16(bits) + } + #[inline(always)] pub fn to_bits(self) -> U32x16 { + let a = self.to_array(); + let mut o = [0u32; 16]; for i in 0..16 { o[i] = a[i].to_bits(); } U32x16(o) + } + #[inline(always)] pub fn from_bits(bits: U32x16) -> Self { + let mut o = [0.0f32; 16]; for i in 0..16 { o[i] = f32::from_bits(bits.0[i]); } Self::from_array(o) + } + #[inline(always)] pub fn cast_i32(self) -> I32x16 { + let a = self.to_array(); + let mut o = [0i32; 16]; for i in 0..16 { o[i] = a[i] as i32; } I32x16(o) + } +} + +impl Add for F32x16 { type Output = Self; #[inline(always)] fn add(self, rhs: Self) -> Self { Self(self.0 + rhs.0, self.1 + rhs.1) } } +impl Sub for F32x16 { type Output = Self; #[inline(always)] fn sub(self, rhs: Self) -> Self { Self(self.0 - rhs.0, self.1 - rhs.1) } } +impl Mul for F32x16 { type Output = Self; #[inline(always)] fn mul(self, rhs: Self) -> Self { Self(self.0 * rhs.0, self.1 * rhs.1) } } +impl Div for F32x16 { type Output = Self; #[inline(always)] fn div(self, rhs: Self) -> Self { Self(self.0 / rhs.0, self.1 / rhs.1) } } +impl AddAssign for F32x16 { #[inline(always)] fn add_assign(&mut self, rhs: Self) { *self = *self + rhs; } } +impl SubAssign for F32x16 { #[inline(always)] fn sub_assign(&mut self, rhs: Self) { *self = *self - rhs; } } +impl MulAssign for F32x16 { #[inline(always)] fn mul_assign(&mut self, rhs: Self) { *self = *self * rhs; } } +impl DivAssign for F32x16 { #[inline(always)] fn div_assign(&mut self, rhs: Self) { *self = *self / rhs; } } +impl Neg for F32x16 { type Output = Self; #[inline(always)] fn neg(self) -> Self { let a = self.to_array(); let mut o = [0.0f32; 16]; for i in 0..16 { o[i] = -a[i]; } Self::from_array(o) } } +impl fmt::Debug for F32x16 { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { write!(f, "F32x16({:?})", self.to_array()) } } +impl PartialEq for F32x16 { fn eq(&self, other: &Self) -> bool { self.to_array() == other.to_array() } } +impl Default for F32x16 { fn default() -> Self { Self::splat(0.0) } } + +#[derive(Copy, Clone, Debug)] +pub struct F32Mask16(pub u16); +impl F32Mask16 { + #[inline(always)] + pub fn select(self, true_val: F32x16, false_val: F32x16) -> F32x16 { + let t = true_val.to_array(); let f = false_val.to_array(); + let mut o = [0.0f32; 16]; + for i in 0..16 { o[i] = if (self.0 >> i) & 1 == 1 { t[i] } else { f[i] }; } + F32x16::from_array(o) + } +} + +/// 8×f64 via 2× AVX2 F64x4 (__m256d). Same API as simd_avx512::F64x8. +#[derive(Copy, Clone)] +#[repr(align(64))] +pub struct F64x8(pub f64x4, pub f64x4); + +impl F64x8 { + pub const LANES: usize = 8; + #[inline(always)] pub fn splat(v: f64) -> Self { Self(f64x4::splat(v), f64x4::splat(v)) } + #[inline(always)] pub fn from_slice(s: &[f64]) -> Self { + assert!(s.len() >= 8); + Self(f64x4::from_slice(&s[..4]), f64x4::from_slice(&s[4..8])) + } + #[inline(always)] pub fn from_array(a: [f64; 8]) -> Self { + Self(f64x4::from_array(a[..4].try_into().unwrap()), f64x4::from_array(a[4..].try_into().unwrap())) + } + #[inline(always)] pub fn to_array(self) -> [f64; 8] { + let mut out = [0.0f64; 8]; + out[..4].copy_from_slice(&self.0.to_array()); + out[4..].copy_from_slice(&self.1.to_array()); + out + } + #[inline(always)] pub fn copy_to_slice(self, s: &mut [f64]) { + assert!(s.len() >= 8); + self.0.copy_to_slice(&mut s[..4]); + self.1.copy_to_slice(&mut s[4..8]); + } + #[inline(always)] pub fn reduce_sum(self) -> f64 { self.0.reduce_sum() + self.1.reduce_sum() } + #[inline(always)] pub fn reduce_min(self) -> f64 { let a = self.to_array(); a.iter().copied().fold(f64::INFINITY, f64::min) } + #[inline(always)] pub fn reduce_max(self) -> f64 { let a = self.to_array(); a.iter().copied().fold(f64::NEG_INFINITY, f64::max) } + #[inline(always)] pub fn abs(self) -> Self { let a = self.to_array(); let mut o = [0.0f64; 8]; for i in 0..8 { o[i] = a[i].abs(); } Self::from_array(o) } + #[inline(always)] pub fn sqrt(self) -> Self { let a = self.to_array(); let mut o = [0.0f64; 8]; for i in 0..8 { o[i] = a[i].sqrt(); } Self::from_array(o) } + #[inline(always)] pub fn round(self) -> Self { let a = self.to_array(); let mut o = [0.0f64; 8]; for i in 0..8 { o[i] = a[i].round(); } Self::from_array(o) } + #[inline(always)] pub fn floor(self) -> Self { let a = self.to_array(); let mut o = [0.0f64; 8]; for i in 0..8 { o[i] = a[i].floor(); } Self::from_array(o) } + #[inline(always)] pub fn mul_add(self, b: Self, c: Self) -> Self { + let a = self.to_array(); let ba = b.to_array(); let ca = c.to_array(); + let mut o = [0.0f64; 8]; for i in 0..8 { o[i] = a[i].mul_add(ba[i], ca[i]); } Self::from_array(o) + } + #[inline(always)] pub fn simd_min(self, other: Self) -> Self { let a = self.to_array(); let b = other.to_array(); let mut o = [0.0f64; 8]; for i in 0..8 { o[i] = a[i].min(b[i]); } Self::from_array(o) } + #[inline(always)] pub fn simd_max(self, other: Self) -> Self { let a = self.to_array(); let b = other.to_array(); let mut o = [0.0f64; 8]; for i in 0..8 { o[i] = a[i].max(b[i]); } Self::from_array(o) } + #[inline(always)] pub fn simd_clamp(self, lo: Self, hi: Self) -> Self { self.simd_max(lo).simd_min(hi) } + #[inline(always)] pub fn simd_ge(self, other: Self) -> F64Mask8 { + let a = self.to_array(); let b = other.to_array(); + let mut bits: u8 = 0; for i in 0..8 { if a[i] >= b[i] { bits |= 1 << i; } } F64Mask8(bits) + } + #[inline(always)] pub fn simd_le(self, other: Self) -> F64Mask8 { + let a = self.to_array(); let b = other.to_array(); + let mut bits: u8 = 0; for i in 0..8 { if a[i] <= b[i] { bits |= 1 << i; } } F64Mask8(bits) + } + #[inline(always)] pub fn to_bits(self) -> U64x8 { + let a = self.to_array(); let mut o = [0u64; 8]; for i in 0..8 { o[i] = a[i].to_bits(); } U64x8(o) + } + #[inline(always)] pub fn from_bits(bits: U64x8) -> Self { + let mut o = [0.0f64; 8]; for i in 0..8 { o[i] = f64::from_bits(bits.0[i]); } Self::from_array(o) + } +} + +impl Add for F64x8 { type Output = Self; #[inline(always)] fn add(self, rhs: Self) -> Self { Self(self.0 + rhs.0, self.1 + rhs.1) } } +impl Sub for F64x8 { type Output = Self; #[inline(always)] fn sub(self, rhs: Self) -> Self { Self(self.0 - rhs.0, self.1 - rhs.1) } } +impl Mul for F64x8 { type Output = Self; #[inline(always)] fn mul(self, rhs: Self) -> Self { Self(self.0 * rhs.0, self.1 * rhs.1) } } +impl Div for F64x8 { type Output = Self; #[inline(always)] fn div(self, rhs: Self) -> Self { Self(self.0 / rhs.0, self.1 / rhs.1) } } +impl AddAssign for F64x8 { #[inline(always)] fn add_assign(&mut self, rhs: Self) { *self = *self + rhs; } } +impl SubAssign for F64x8 { #[inline(always)] fn sub_assign(&mut self, rhs: Self) { *self = *self - rhs; } } +impl MulAssign for F64x8 { #[inline(always)] fn mul_assign(&mut self, rhs: Self) { *self = *self * rhs; } } +impl DivAssign for F64x8 { #[inline(always)] fn div_assign(&mut self, rhs: Self) { *self = *self / rhs; } } +impl Neg for F64x8 { type Output = Self; #[inline(always)] fn neg(self) -> Self { let a = self.to_array(); let mut o = [0.0f64; 8]; for i in 0..8 { o[i] = -a[i]; } Self::from_array(o) } } +impl fmt::Debug for F64x8 { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { write!(f, "F64x8({:?})", self.to_array()) } } +impl PartialEq for F64x8 { fn eq(&self, other: &Self) -> bool { self.to_array() == other.to_array() } } +impl Default for F64x8 { fn default() -> Self { Self::splat(0.0) } } + +#[derive(Copy, Clone, Debug)] +pub struct F64Mask8(pub u8); +impl F64Mask8 { + #[inline(always)] + pub fn select(self, true_val: F64x8, false_val: F64x8) -> F64x8 { + let t = true_val.to_array(); let f = false_val.to_array(); + let mut o = [0.0f64; 8]; + for i in 0..8 { o[i] = if (self.0 >> i) & 1 == 1 { t[i] } else { f[i] }; } + F64x8::from_array(o) + } +} + +// ── Integer types: array-backed, use scalar ops (no AVX2 integer 512-bit) ── + +macro_rules! avx2_int_type { + ($name:ident, $elem:ty, $lanes:expr, $zero:expr) => { + #[derive(Copy, Clone)] + #[repr(align(64))] + pub struct $name(pub [$elem; $lanes]); + + impl Default for $name { #[inline(always)] fn default() -> Self { Self([$zero; $lanes]) } } + impl $name { + pub const LANES: usize = $lanes; + #[inline(always)] pub fn splat(v: $elem) -> Self { Self([v; $lanes]) } + #[inline(always)] pub fn from_slice(s: &[$elem]) -> Self { assert!(s.len() >= $lanes); let mut a = [$zero; $lanes]; a.copy_from_slice(&s[..$lanes]); Self(a) } + #[inline(always)] pub fn from_array(a: [$elem; $lanes]) -> Self { Self(a) } + #[inline(always)] pub fn to_array(self) -> [$elem; $lanes] { self.0 } + #[inline(always)] pub fn copy_to_slice(self, s: &mut [$elem]) { assert!(s.len() >= $lanes); s[..$lanes].copy_from_slice(&self.0); } + #[inline(always)] pub fn reduce_sum(self) -> $elem { let mut s: $elem = $zero; for i in 0..$lanes { s = s.wrapping_add(self.0[i]); } s } + } + impl Add for $name { type Output = Self; #[inline(always)] fn add(self, r: Self) -> Self { let mut o = [$zero; $lanes]; for i in 0..$lanes { o[i] = self.0[i].wrapping_add(r.0[i]); } Self(o) } } + impl Sub for $name { type Output = Self; #[inline(always)] fn sub(self, r: Self) -> Self { let mut o = [$zero; $lanes]; for i in 0..$lanes { o[i] = self.0[i].wrapping_sub(r.0[i]); } Self(o) } } + impl BitAnd for $name { type Output = Self; #[inline(always)] fn bitand(self, r: Self) -> Self { let mut o = [$zero; $lanes]; for i in 0..$lanes { o[i] = self.0[i] & r.0[i]; } Self(o) } } + impl BitOr for $name { type Output = Self; #[inline(always)] fn bitor(self, r: Self) -> Self { let mut o = [$zero; $lanes]; for i in 0..$lanes { o[i] = self.0[i] | r.0[i]; } Self(o) } } + impl BitXor for $name { type Output = Self; #[inline(always)] fn bitxor(self, r: Self) -> Self { let mut o = [$zero; $lanes]; for i in 0..$lanes { o[i] = self.0[i] ^ r.0[i]; } Self(o) } } + impl BitAndAssign for $name { #[inline(always)] fn bitand_assign(&mut self, r: Self) { for i in 0..$lanes { self.0[i] &= r.0[i]; } } } + impl BitOrAssign for $name { #[inline(always)] fn bitor_assign(&mut self, r: Self) { for i in 0..$lanes { self.0[i] |= r.0[i]; } } } + impl BitXorAssign for $name { #[inline(always)] fn bitxor_assign(&mut self, r: Self) { for i in 0..$lanes { self.0[i] ^= r.0[i]; } } } + impl Not for $name { type Output = Self; #[inline(always)] fn not(self) -> Self { let mut o = [$zero; $lanes]; for i in 0..$lanes { o[i] = !self.0[i]; } Self(o) } } + impl AddAssign for $name { #[inline(always)] fn add_assign(&mut self, r: Self) { for i in 0..$lanes { self.0[i] = self.0[i].wrapping_add(r.0[i]); } } } + impl SubAssign for $name { #[inline(always)] fn sub_assign(&mut self, r: Self) { for i in 0..$lanes { self.0[i] = self.0[i].wrapping_sub(r.0[i]); } } } + impl fmt::Debug for $name { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { write!(f, concat!(stringify!($name), "({:?})"), &self.0[..]) } } + impl PartialEq for $name { fn eq(&self, other: &Self) -> bool { self.0 == other.0 } } + }; +} + +avx2_int_type!(U8x64, u8, 64, 0u8); +avx2_int_type!(I32x16, i32, 16, 0i32); +avx2_int_type!(I64x8, i64, 8, 0i64); +avx2_int_type!(U32x16, u32, 16, 0u32); +avx2_int_type!(U64x8, u64, 8, 0u64); + +impl I32x16 { + #[inline(always)] pub fn reduce_min(self) -> i32 { *self.0.iter().min().unwrap() } + #[inline(always)] pub fn reduce_max(self) -> i32 { *self.0.iter().max().unwrap() } + #[inline(always)] pub fn simd_min(self, other: Self) -> Self { let mut o = [0i32; 16]; for i in 0..16 { o[i] = self.0[i].min(other.0[i]); } Self(o) } + #[inline(always)] pub fn simd_max(self, other: Self) -> Self { let mut o = [0i32; 16]; for i in 0..16 { o[i] = self.0[i].max(other.0[i]); } Self(o) } + #[inline(always)] pub fn cast_f32(self) -> F32x16 { let mut o = [0.0f32; 16]; for i in 0..16 { o[i] = self.0[i] as f32; } F32x16::from_array(o) } + #[inline(always)] pub fn abs(self) -> Self { let mut o = [0i32; 16]; for i in 0..16 { o[i] = self.0[i].abs(); } Self(o) } +} +impl Mul for I32x16 { type Output = Self; #[inline(always)] fn mul(self, r: Self) -> Self { let mut o = [0i32; 16]; for i in 0..16 { o[i] = self.0[i].wrapping_mul(r.0[i]); } Self(o) } } +impl MulAssign for I32x16 { #[inline(always)] fn mul_assign(&mut self, r: Self) { *self = *self * r; } } +impl Neg for I32x16 { type Output = Self; #[inline(always)] fn neg(self) -> Self { let mut o = [0i32; 16]; for i in 0..16 { o[i] = -self.0[i]; } Self(o) } } + +impl I64x8 { + #[inline(always)] pub fn reduce_min(self) -> i64 { *self.0.iter().min().unwrap() } + #[inline(always)] pub fn reduce_max(self) -> i64 { *self.0.iter().max().unwrap() } + #[inline(always)] pub fn simd_min(self, other: Self) -> Self { let mut o = [0i64; 8]; for i in 0..8 { o[i] = self.0[i].min(other.0[i]); } Self(o) } + #[inline(always)] pub fn simd_max(self, other: Self) -> Self { let mut o = [0i64; 8]; for i in 0..8 { o[i] = self.0[i].max(other.0[i]); } Self(o) } +} + +/// Lowercase aliases (std::simd convention) +pub type f32x16 = F32x16; +pub type f64x8 = F64x8; +pub type u8x64 = U8x64; +pub type i32x16 = I32x16; +pub type i64x8 = I64x8; +pub type u32x16 = U32x16; +pub type u64x8 = U64x8; + #[cfg(test)] mod tests { use super::*; diff --git a/src/simd_avx512.rs b/src/simd_avx512.rs index 726a594f..e3cb8f44 100644 --- a/src/simd_avx512.rs +++ b/src/simd_avx512.rs @@ -1259,6 +1259,36 @@ impl MulAssign for F32x8 { } } +impl Sub for F32x8 { + type Output = Self; + #[inline(always)] + fn sub(self, rhs: Self) -> Self { + Self(unsafe { _mm256_sub_ps(self.0, rhs.0) }) + } +} + +impl SubAssign for F32x8 { + #[inline(always)] + fn sub_assign(&mut self, rhs: Self) { + self.0 = unsafe { _mm256_sub_ps(self.0, rhs.0) }; + } +} + +impl Div for F32x8 { + type Output = Self; + #[inline(always)] + fn div(self, rhs: Self) -> Self { + Self(unsafe { _mm256_div_ps(self.0, rhs.0) }) + } +} + +impl DivAssign for F32x8 { + #[inline(always)] + fn div_assign(&mut self, rhs: Self) { + self.0 = unsafe { _mm256_div_ps(self.0, rhs.0) }; + } +} + impl fmt::Debug for F32x8 { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { write!(f, "F32x8({:?})", self.to_array()) @@ -1360,6 +1390,36 @@ impl MulAssign for F64x4 { } } +impl Sub for F64x4 { + type Output = Self; + #[inline(always)] + fn sub(self, rhs: Self) -> Self { + Self(unsafe { _mm256_sub_pd(self.0, rhs.0) }) + } +} + +impl SubAssign for F64x4 { + #[inline(always)] + fn sub_assign(&mut self, rhs: Self) { + self.0 = unsafe { _mm256_sub_pd(self.0, rhs.0) }; + } +} + +impl Div for F64x4 { + type Output = Self; + #[inline(always)] + fn div(self, rhs: Self) -> Self { + Self(unsafe { _mm256_div_pd(self.0, rhs.0) }) + } +} + +impl DivAssign for F64x4 { + #[inline(always)] + fn div_assign(&mut self, rhs: Self) { + self.0 = unsafe { _mm256_div_pd(self.0, rhs.0) }; + } +} + impl fmt::Debug for F64x4 { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { write!(f, "F64x4({:?})", self.to_array())