diff --git a/.vscode/extensions.json b/.vscode/extensions.json index 272828b..e80666b 100644 --- a/.vscode/extensions.json +++ b/.vscode/extensions.json @@ -1,7 +1,7 @@ { - // See http://go.microsoft.com/fwlink/?LinkId=827846 - // for the documentation about the extensions.json format - "recommendations": [ - "platformio.platformio-ide" - ] -} \ No newline at end of file + // See http://go.microsoft.com/fwlink/?LinkId=827846 + // for the documentation about the extensions.json format + "recommendations": [ + "platformio.platformio-ide" + ] +} diff --git a/Schematic/OPL3_VGM_Player/OPL3_VGM_Player.bak b/Schematic/OPL3_VGM_Player/OPL3_VGM_Player.bak new file mode 100644 index 0000000..0cae0e0 --- /dev/null +++ b/Schematic/OPL3_VGM_Player/OPL3_VGM_Player.bak @@ -0,0 +1,1975 @@ +EESchema Schematic File Version 4 +LIBS:OPL3_VGM_Player-cache +EELAYER 26 0 +EELAYER END +$Descr A3 16535 11693 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L stm32:STM32F103C8Tx U2 +U 1 1 5D058320 +P 4800 3100 +F 0 "U2" H 5700 5000 50 0000 C CNN +F 1 "STM32F103C8Tx" H 5950 4900 50 0000 C CNN +F 2 "Housings_QFP:LQFP-48_7x7mm_Pitch0.5mm" H 7600 4775 50 0001 R TNN +F 3 "http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/CD00161566.pdf" H 4800 3100 50 0001 C CNN + 1 4800 3100 + 1 0 0 -1 +$EndComp +Text Notes 13300 10350 0 50 ~ 0 +Designed and Programmed by:\nAidan Lawrence\nwww.aidanlawrence.com +Text Notes 12250 10950 0 50 ~ 0 +OPL3 VGM Player +Text Notes 15500 11050 0 50 ~ 0 +1 +Text Notes 13050 11050 0 50 ~ 0 +Saturday, June 15 2019 +$Comp +L regul:LD1117S33TR_SOT223 U1 +U 1 1 5D0584AC +P 2700 7000 +F 0 "U1" H 2700 7242 50 0000 C CNN +F 1 "LD1117S33TR_SOT223" H 2700 7151 50 0000 C CNN +F 2 "TO_SOT_Packages_SMD:SOT-223-3_TabPin2" H 2700 7200 50 0001 C CNN +F 3 "http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/CD00000544.pdf" H 2800 6750 50 0001 C CNN + 1 2700 7000 + 1 0 0 -1 +$EndComp +$Comp +L conn:USB_OTG J1 +U 1 1 5D058575 +P 1200 7200 +F 0 "J1" H 1255 7667 50 0000 C CNN +F 1 "USB_OTG" H 1255 7576 50 0000 C CNN +F 2 "Connectors:USB_Mini-B" H 1350 7150 50 0001 C CNN +F 3 "" H 1350 7150 50 0001 C CNN + 1 1200 7200 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR01 +U 1 1 5D058603 +P 1200 7600 +F 0 "#PWR01" H 1200 7350 50 0001 C CNN +F 1 "GND" H 1205 7427 50 0000 C CNN +F 2 "" H 1200 7600 50 0001 C CNN +F 3 "" H 1200 7600 50 0001 C CNN + 1 1200 7600 + 1 0 0 -1 +$EndComp +Text GLabel 1500 7200 2 50 Input ~ 0 +D+ +Text GLabel 1500 7300 2 50 Input ~ 0 +D- +NoConn ~ 1100 7600 +Wire Wire Line + 1500 7000 1900 7000 +Wire Wire Line + 1900 7000 2350 7000 +Connection ~ 1900 7000 +Wire Wire Line + 1900 6850 1900 7000 +$Comp +L device:C_Small C1 +U 1 1 5D058A9F +P 2350 7150 +F 0 "C1" H 2200 7200 50 0000 L CNN +F 1 "10uF" H 2100 7100 50 0000 L CNN +F 2 "Capacitors_SMD:C_1206" H 2350 7150 50 0001 C CNN +F 3 "~" H 2350 7150 50 0001 C CNN + 1 2350 7150 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2350 7000 2350 7050 +Connection ~ 2350 7000 +Wire Wire Line + 2350 7000 2400 7000 +Wire Wire Line + 2350 7250 2350 7400 +Wire Wire Line + 2350 7400 2700 7400 +Wire Wire Line + 2700 7400 2700 7300 +Wire Wire Line + 2700 7400 2700 7500 +Connection ~ 2700 7400 +$Comp +L power:GND #PWR03 +U 1 1 5D058C00 +P 2700 7500 +F 0 "#PWR03" H 2700 7250 50 0001 C CNN +F 1 "GND" H 2705 7327 50 0000 C CNN +F 2 "" H 2700 7500 50 0001 C CNN +F 3 "" H 2700 7500 50 0001 C CNN + 1 2700 7500 + 1 0 0 -1 +$EndComp +$Comp +L device:C_Small C2 +U 1 1 5D058C1E +P 3050 7150 +F 0 "C2" H 3150 7200 50 0000 L CNN +F 1 "10uF" H 3150 7100 50 0000 L CNN +F 2 "Capacitors_SMD:C_1206" H 3050 7150 50 0001 C CNN +F 3 "~" H 3050 7150 50 0001 C CNN + 1 3050 7150 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3000 7000 3050 7000 +Wire Wire Line + 3050 7000 3050 7050 +Wire Wire Line + 3050 7250 3050 7400 +Wire Wire Line + 3050 7400 2700 7400 +Wire Wire Line + 3050 7000 3250 7000 +Wire Wire Line + 3250 7000 3250 6850 +Connection ~ 3050 7000 +$Comp +L power:+3.3V #PWR04 +U 1 1 5D058F09 +P 3250 6850 +F 0 "#PWR04" H 3250 6700 50 0001 C CNN +F 1 "+3.3V" H 3265 7023 50 0000 C CNN +F 2 "" H 3250 6850 50 0001 C CNN +F 3 "" H 3250 6850 50 0001 C CNN + 1 3250 6850 + 1 0 0 -1 +$EndComp +$Comp +L ch340:CH340E U3 +U 1 1 5D05952B +P 2450 8200 +F 0 "U3" H 2700 8425 50 0000 C CNN +F 1 "CH340E" H 2700 8334 50 0000 C CNN +F 2 "Housings_SSOP:MSOP-10_3x3mm_Pitch0.5mm" H 2450 8200 50 0001 C CNN +F 3 "" H 2450 8200 50 0001 C CNN + 1 2450 8200 + 1 0 0 -1 +$EndComp +$Comp +L power:VCC #PWR05 +U 1 1 5D05967E +P 1900 6850 +F 0 "#PWR05" H 1900 6700 50 0001 C CNN +F 1 "VCC" H 1917 7023 50 0000 C CNN +F 2 "" H 1900 6850 50 0001 C CNN +F 3 "" H 1900 6850 50 0001 C CNN + 1 1900 6850 + 1 0 0 -1 +$EndComp +NoConn ~ 3150 8600 +NoConn ~ 1500 7400 +$Comp +L device:C_Small C3 +U 1 1 5D059B23 +P 3350 8200 +F 0 "C3" V 3121 8200 50 0000 C CNN +F 1 "100nF" V 3212 8200 50 0000 C CNN +F 2 "Capacitors_SMD:C_0805" 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5D05A843 +P 4500 6900 +F 0 "#PWR08" H 4500 6750 50 0001 C CNN +F 1 "VCC" H 4517 7073 50 0000 C CNN +F 2 "" H 4500 6900 50 0001 C CNN +F 3 "" H 4500 6900 50 0001 C CNN + 1 4500 6900 + 1 0 0 -1 +$EndComp +$Comp +L device:L L1 +U 1 1 5D05ACFF +P 4950 6900 +F 0 "L1" V 4772 6900 50 0000 C CNN +F 1 "BLM18PG221SN1D" V 4863 6900 50 0000 C CNN +F 2 "Inductors_SMD:L_0603" H 4950 6900 50 0001 C CNN +F 3 "~" H 4950 6900 50 0001 C CNN + 1 4950 6900 + 0 1 1 0 +$EndComp +Wire Wire Line + 4500 6900 4800 6900 +$Comp +L device:C_Small C4 +U 1 1 5D05AF43 +P 4800 7100 +F 0 "C4" H 4892 7146 50 0000 L CNN +F 1 "10nF" H 4892 7055 50 0000 L CNN +F 2 "Capacitors_SMD:C_0805" H 4800 7100 50 0001 C CNN +F 3 "~" H 4800 7100 50 0001 C CNN + 1 4800 7100 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4800 6900 4800 7000 +Connection ~ 4800 6900 +Wire Wire Line + 4800 7200 4800 7300 +$Comp +L device:C_Small C5 +U 1 1 5D05B3BD +P 5150 7100 +F 0 "C5" H 5242 7146 50 0000 L CNN +F 1 "100nF" H 5242 7055 50 0000 L CNN +F 2 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5800 6900 +Connection ~ 5550 6900 +$Comp +L power:+5V #PWR010 +U 1 1 5D05C695 +P 5800 6900 +F 0 "#PWR010" H 5800 6750 50 0001 C CNN +F 1 "+5V" H 5815 7073 50 0000 C CNN +F 2 "" H 5800 6900 50 0001 C CNN +F 3 "" H 5800 6900 50 0001 C CNN + 1 5800 6900 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR019 +U 1 1 5D05D1E7 +P 4600 4900 +F 0 "#PWR019" H 4600 4650 50 0001 C CNN +F 1 "GND" H 4605 4727 50 0000 C CNN +F 2 "" H 4600 4900 50 0001 C CNN +F 3 "" H 4600 4900 50 0001 C CNN + 1 4600 4900 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR021 +U 1 1 5D05D20F +P 4700 4900 +F 0 "#PWR021" H 4700 4650 50 0001 C CNN +F 1 "GND" H 4705 4727 50 0000 C CNN +F 2 "" H 4700 4900 50 0001 C CNN +F 3 "" H 4700 4900 50 0001 C CNN + 1 4700 4900 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR023 +U 1 1 5D05D230 +P 4800 4900 +F 0 "#PWR023" H 4800 4650 50 0001 C CNN +F 1 "GND" H 4805 4727 50 0000 C CNN +F 2 "" H 4800 4900 50 0001 C CNN +F 3 "" H 4800 4900 50 0001 C CNN + 1 4800 4900 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR025 +U 1 1 5D05D251 +P 4900 4900 +F 0 "#PWR025" H 4900 4650 50 0001 C CNN +F 1 "GND" H 4905 4727 50 0000 C CNN +F 2 "" H 4900 4900 50 0001 C CNN +F 3 "" H 4900 4900 50 0001 C CNN + 1 4900 4900 + 1 0 0 -1 +$EndComp +$Comp +L power:+3.3V #PWR018 +U 1 1 5D05DE8D +P 4600 1300 +F 0 "#PWR018" H 4600 1150 50 0001 C CNN +F 1 "+3.3V" H 4615 1473 50 0000 C CNN +F 2 "" H 4600 1300 50 0001 C CNN +F 3 "" H 4600 1300 50 0001 C CNN + 1 4600 1300 + 1 0 0 -1 +$EndComp +$Comp +L power:+3.3V #PWR020 +U 1 1 5D05DFB9 +P 4700 1300 +F 0 "#PWR020" H 4700 1150 50 0001 C CNN +F 1 "+3.3V" H 4715 1473 50 0000 C CNN +F 2 "" H 4700 1300 50 0001 C CNN +F 3 "" H 4700 1300 50 0001 C CNN + 1 4700 1300 + 1 0 0 -1 +$EndComp +$Comp +L power:+3.3V #PWR022 +U 1 1 5D05DFDA +P 4800 1300 +F 0 "#PWR022" H 4800 1150 50 0001 C CNN +F 1 "+3.3V" H 4815 1473 50 0000 C CNN +F 2 "" H 4800 1300 50 0001 C CNN +F 3 "" H 4800 1300 50 0001 C CNN + 1 4800 1300 + 1 0 0 -1 +$EndComp +$Comp +L power:+3.3V #PWR024 +U 1 1 5D05DFFB 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"GND" H 3705 827 50 0000 C CNN +F 2 "" H 3700 1000 50 0001 C CNN +F 3 "" H 3700 1000 50 0001 C CNN + 1 3700 1000 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR013 +U 1 1 5D05E1C9 +P 3200 1000 +F 0 "#PWR013" H 3200 750 50 0001 C CNN +F 1 "GND" H 3205 827 50 0000 C CNN +F 2 "" H 3200 1000 50 0001 C CNN +F 3 "" H 3200 1000 50 0001 C CNN + 1 3200 1000 + 1 0 0 -1 +$EndComp +$Comp +L device:Crystal_Small Y1 +U 1 1 5D05E7AA +P 1250 2350 +F 0 "Y1" V 1296 2262 50 0000 R CNN +F 1 "8MHz" V 1205 2262 50 0000 R CNN +F 2 "Crystals:Crystal_SMD_HC49-SD" H 1250 2350 50 0001 C CNN +F 3 "~" H 1250 2350 50 0001 C CNN + 1 1250 2350 + 0 -1 -1 0 +$EndComp +Wire Wire Line + 1250 2250 1800 2250 +Wire Wire Line + 1800 2250 1800 2300 +Wire Wire Line + 1800 2300 1900 2300 +Wire Wire Line + 1250 2450 1800 2450 +Wire Wire Line + 1800 2450 1800 2400 +Wire Wire Line + 1800 2400 1900 2400 +$Comp +L device:C_Small C7 +U 1 1 5D05F226 +P 1000 2250 +F 0 "C7" V 771 2250 50 0000 C CNN +F 1 "22pF" V 862 2250 50 0000 C CNN +F 2 "Capacitors_SMD:C_0603" H 1000 2250 50 0001 C CNN +F 3 "~" H 1000 2250 50 0001 C CNN + 1 1000 2250 + 0 1 1 0 +$EndComp +$Comp +L device:C_Small C8 +U 1 1 5D05F2AD +P 1000 2450 +F 0 "C8" V 1100 2450 50 0000 C CNN +F 1 "22pF" V 1150 2450 50 0000 C CNN +F 2 "Capacitors_SMD:C_0603" H 1000 2450 50 0001 C CNN +F 3 "~" H 1000 2450 50 0001 C CNN + 1 1000 2450 + 0 1 1 0 +$EndComp +Wire Wire Line + 1100 2450 1250 2450 +Connection ~ 1250 2450 +Wire Wire Line + 1100 2250 1250 2250 +Connection ~ 1250 2250 +$Comp +L power:GND #PWR011 +U 1 1 5D0600F3 +P 800 2450 +F 0 "#PWR011" H 800 2200 50 0001 C CNN +F 1 "GND" H 805 2277 50 0000 C CNN +F 2 "" H 800 2450 50 0001 C CNN +F 3 "" H 800 2450 50 0001 C CNN + 1 800 2450 + 1 0 0 -1 +$EndComp +Wire Wire Line + 900 2450 800 2450 +Wire Wire Line + 800 2250 900 2250 +Wire Wire Line + 800 2250 800 2450 +Connection ~ 800 2450 +$Comp +L conn:Conn_02x03_Odd_Even J2 +U 1 1 5D062755 +P 6200 850 +F 0 "J2" H 6250 1167 50 0000 C CNN +F 1 "Conn_02x03_Odd_Even" H 6250 1076 50 0000 C CNN +F 2 "Pin_Headers:Pin_Header_Straight_2x03_Pitch2.54mm" H 6200 850 50 0001 C CNN +F 3 "~" H 6200 850 50 0001 C CNN + 1 6200 850 + 1 0 0 -1 +$EndComp +$Comp +L power:+3.3V #PWR026 +U 1 1 5D0627F4 +P 6000 750 +F 0 "#PWR026" H 6000 600 50 0001 C CNN +F 1 "+3.3V" V 6015 878 50 0000 L CNN +F 2 "" H 6000 750 50 0001 C CNN +F 3 "" H 6000 750 50 0001 C CNN + 1 6000 750 + 0 -1 -1 0 +$EndComp +$Comp +L power:+3.3V #PWR028 +U 1 1 5D062860 +P 6500 750 +F 0 "#PWR028" H 6500 600 50 0001 C CNN +F 1 "+3.3V" V 6515 878 50 0000 L CNN +F 2 "" H 6500 750 50 0001 C CNN +F 3 "" H 6500 750 50 0001 C CNN + 1 6500 750 + 0 1 1 0 +$EndComp +$Comp +L power:GND #PWR029 +U 1 1 5D0628CA +P 6500 950 +F 0 "#PWR029" H 6500 700 50 0001 C CNN +F 1 "GND" H 6505 777 50 0000 C CNN +F 2 "" H 6500 950 50 0001 C CNN +F 3 "" H 6500 950 50 0001 C CNN + 1 6500 950 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR027 +U 1 1 5D062900 +P 6000 950 +F 0 "#PWR027" H 6000 700 50 0001 C CNN +F 1 "GND" H 6005 777 50 0000 C CNN +F 2 "" H 6000 950 50 0001 C CNN +F 3 "" H 6000 950 50 0001 C CNN + 1 6000 950 + 1 0 0 -1 +$EndComp +Text GLabel 6500 850 2 50 Input ~ 0 +BOOT1 +Text GLabel 6000 850 0 50 Input ~ 0 +BOOT0 +Text GLabel 1150 3200 0 50 Input ~ 0 +BOOT1 +$Comp +L device:R_Small R2 +U 1 1 5D062BAD +P 1350 3200 +F 0 "R2" V 1200 3200 50 0000 C CNN +F 1 "100K" V 1250 3200 50 0000 C CNN +F 2 "Resistors_SMD:R_0805" H 1350 3200 50 0001 C CNN +F 3 "~" H 1350 3200 50 0001 C CNN + 1 1350 3200 + 0 1 1 0 +$EndComp +Text GLabel 1400 1900 0 50 Input ~ 0 +BOOT0 +$Comp +L device:R_Small R1 +U 1 1 5D063E0F +P 1650 1900 +F 0 "R1" V 1750 1900 50 0000 C CNN +F 1 "100K" V 1545 1900 50 0000 C CNN +F 2 "Resistors_SMD:R_0805" H 1650 1900 50 0001 C CNN +F 3 "~" H 1650 1900 50 0001 C CNN + 1 1650 1900 + 0 1 1 0 +$EndComp +Wire Wire Line + 1400 1900 1550 1900 +Wire Wire Line + 1750 1900 1900 1900 +$Comp +L conn:Micro_SD_Card J3 +U 1 1 5D069A71 +P 1550 10250 +F 0 "J3" H 1500 9433 50 0000 C CNN +F 1 "Micro_SD_Card" H 1500 9524 50 0000 C CNN +F 2 "customMicroSD:SOFNG_TF_15x15_PUSH_PUSH" H 2700 10550 50 0001 C CNN +F 3 "http://katalog.we-online.de/em/datasheet/693072010801.pdf" H 1550 10250 50 0001 C CNN + 1 1550 10250 + -1 0 0 1 +$EndComp +Text GLabel 7700 3900 2 50 Input ~ 0 +RX +Text GLabel 7700 4000 2 50 Input ~ 0 +TX +NoConn ~ 2450 9850 +Text GLabel 2450 9950 2 50 Input ~ 0 +SD_MISO +$Comp +L power:GND #PWR0101 +U 1 1 5D06B662 +P 2450 10050 +F 0 "#PWR0101" H 2450 9800 50 0001 C CNN +F 1 "GND" V 2455 9922 50 0000 R CNN +F 2 "" H 2450 10050 50 0001 C CNN +F 3 "" H 2450 10050 50 0001 C CNN + 1 2450 10050 + 0 -1 -1 0 +$EndComp +Text GLabel 2450 10150 2 50 Input ~ 0 +SD_CLK +NoConn ~ 750 9650 +$Comp +L power:+3.3V #PWR0102 +U 1 1 5D06C158 +P 2450 10250 +F 0 "#PWR0102" H 2450 10100 50 0001 C CNN +F 1 "+3.3V" V 2465 10378 50 0000 L CNN +F 2 "" H 2450 10250 50 0001 C CNN +F 3 "" H 2450 10250 50 0001 C CNN + 1 2450 10250 + 0 1 1 0 +$EndComp +Text GLabel 2450 10350 2 50 Input ~ 0 +SD_MOSI +Text GLabel 2450 10450 2 50 Input ~ 0 +SD_CS +NoConn ~ 2450 10550 +$Comp +L device:C_Small C12 +U 1 1 5D06D6F8 +P 3050 10150 +F 0 "C12" H 3142 10196 50 0000 L CNN +F 1 "100nF" H 3142 10105 50 0000 L CNN +F 2 "Capacitors_SMD:C_0805" H 3050 10150 50 0001 C CNN +F 3 "~" H 3050 10150 50 0001 C CNN + 1 3050 10150 + 1 0 0 -1 +$EndComp +$Comp +L power:+3.3V #PWR0103 +U 1 1 5D06D772 +P 3050 10050 +F 0 "#PWR0103" H 3050 9900 50 0001 C CNN +F 1 "+3.3V" H 3065 10223 50 0000 C CNN +F 2 "" H 3050 10050 50 0001 C CNN +F 3 "" H 3050 10050 50 0001 C CNN + 1 3050 10050 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR0104 +U 1 1 5D06D7EB +P 3050 10250 +F 0 "#PWR0104" H 3050 10000 50 0001 C CNN +F 1 "GND" H 3055 10077 50 0000 C CNN +F 2 "" H 3050 10250 50 0001 C CNN +F 3 "" H 3050 10250 50 0001 C CNN + 1 3050 10250 + 1 0 0 -1 +$EndComp +Text GLabel 7700 3400 2 50 Input ~ 0 +SD_CS +Text GLabel 7700 3500 2 50 Input ~ 0 +SD_CLK +Text GLabel 7700 3600 2 50 Input ~ 0 +SD_MISO +Text GLabel 7700 3700 2 50 Input ~ 0 +SD_MOSI +$Comp +L switches:SW_Push_Dual SW1 +U 1 1 5D06F88C +P 1150 1050 +F 0 "SW1" H 1150 1335 50 0000 C CNN +F 1 "SW_Push_Dual" H 1150 1244 50 0000 C CNN +F 2 "Buttons_Switches_THT:SW_TH_Tactile_Omron_B3F-10xx" H 1150 1250 50 0001 C CNN +F 3 "" H 1150 1250 50 0001 C CNN + 1 1150 1050 + 1 0 0 -1 +$EndComp +Wire Wire Line + 950 1050 750 1050 +Wire Wire Line + 750 1050 750 1300 +$Comp +L device:R_Small R3 +U 1 1 5D070400 +P 750 1400 +F 0 "R3" H 809 1446 50 0000 L CNN +F 1 "1K" H 809 1355 50 0000 L CNN +F 2 "Resistors_SMD:R_0805" H 750 1400 50 0001 C CNN +F 3 "~" H 750 1400 50 0001 C CNN + 1 750 1400 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR0105 +U 1 1 5D0704A9 +P 750 1500 +F 0 "#PWR0105" H 750 1250 50 0001 C CNN +F 1 "GND" H 755 1327 50 0000 C CNN +F 2 "" H 750 1500 50 0001 C CNN +F 3 "" H 750 1500 50 0001 C CNN + 1 750 1500 + 1 0 0 -1 +$EndComp +Wire Wire Line + 1350 1250 1450 1250 +Wire Wire Line + 1450 1250 1450 1700 +Wire Wire Line + 1450 1700 1700 1700 +Wire Wire Line + 1700 1700 1700 1450 +Connection ~ 1700 1700 +Wire Wire Line + 1700 1700 1900 1700 +$Comp +L device:R_Small R4 +U 1 1 5D071EF5 +P 1700 1350 +F 0 "R4" H 1759 1396 50 0000 L CNN +F 1 "10K" H 1759 1305 50 0000 L CNN +F 2 "Resistors_SMD:R_0805" H 1700 1350 50 0001 C CNN +F 3 "~" H 1700 1350 50 0001 C CNN + 1 1700 1350 + 1 0 0 -1 +$EndComp +$Comp +L power:+3.3V #PWR0106 +U 1 1 5D0720B0 +P 1700 1250 +F 0 "#PWR0106" H 1700 1100 50 0001 C CNN +F 1 "+3.3V" H 1715 1423 50 0000 C CNN +F 2 "" H 1700 1250 50 0001 C CNN +F 3 "" H 1700 1250 50 0001 C CNN + 1 1700 1250 + 1 0 0 -1 +$EndComp +NoConn ~ 1350 1050 +NoConn ~ 950 1250 +$Comp +L power:GNDA #PWR0107 +U 1 1 5D074B7B +P 7050 7250 +F 0 "#PWR0107" H 7050 7000 50 0001 C CNN +F 1 "GNDA" H 7055 7077 50 0000 C CNN +F 2 "" H 7050 7250 50 0001 C CNN +F 3 "" H 7050 7250 50 0001 C CNN + 1 7050 7250 + 1 0 0 -1 +$EndComp +$Comp +L power:+5VA #PWR0108 +U 1 1 5D074C15 +P 7050 6850 +F 0 "#PWR0108" H 7050 6700 50 0001 C CNN +F 1 "+5VA" H 7065 7023 50 0000 C CNN +F 2 "" H 7050 6850 50 0001 C CNN +F 3 "" H 7050 6850 50 0001 C CNN + 1 7050 6850 + 1 0 0 -1 +$EndComp +$Comp +L power:+5V #PWR0109 +U 1 1 5D074EB1 +P 6250 6850 +F 0 "#PWR0109" H 6250 6700 50 0001 C CNN +F 1 "+5V" H 6265 7023 50 0000 C CNN +F 2 "" H 6250 6850 50 0001 C CNN +F 3 "" H 6250 6850 50 0001 C CNN + 1 6250 6850 + 1 0 0 -1 +$EndComp +$Comp +L device:L_Small L2 +U 1 1 5D074F1A +P 6650 6900 +F 0 "L2" V 6472 6900 50 0000 C CNN +F 1 "33uH" V 6563 6900 50 0000 C CNN +F 2 "custom_inductors:L_4x4" H 6650 6900 50 0001 C CNN +F 3 "~" H 6650 6900 50 0001 C CNN + 1 6650 6900 + 0 1 1 0 +$EndComp +Wire Wire Line + 6250 6850 6250 6900 +Wire Wire Line + 6250 6900 6550 6900 +Wire Wire Line + 6750 6900 7050 6900 +Wire Wire Line + 7050 6900 7050 6850 +Wire Wire Line + 7050 7250 7050 7200 +Wire Wire Line + 6250 7200 6250 7250 +$Comp +L power:GND #PWR0110 +U 1 1 5D078E29 +P 6250 7250 +F 0 "#PWR0110" H 6250 7000 50 0001 C CNN +F 1 "GND" H 6255 7077 50 0000 C CNN +F 2 "" H 6250 7250 50 0001 C CNN +F 3 "" H 6250 7250 50 0001 C CNN + 1 6250 7250 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6250 7200 7050 7200 +$Comp +L device:CP_Small C13 +U 1 1 5D07AFBC +P 7050 7050 +F 0 "C13" H 7138 7096 50 0000 L CNN +F 1 "10uF" H 7138 7005 50 0000 L CNN +F 2 "Capacitors_SMD:CP_Elec_3x5.3" H 7050 7050 50 0001 C CNN +F 3 "~" H 7050 7050 50 0001 C CNN + 1 7050 7050 + 1 0 0 -1 +$EndComp +Wire Wire Line + 7050 6950 7050 6900 +Connection ~ 7050 6900 +Wire Wire Line + 7050 7150 7050 7200 +Connection ~ 7050 7200 +$Comp +L OPL3:YMF262-M U4 +U 1 1 5D082473 +P 10650 3300 +F 0 "U4" H 10925 3525 50 0000 C CNN +F 1 "YMF262-M" H 10925 3434 50 0000 C CNN +F 2 "Housings_SOIC:SOIC-24W_7.5x15.4mm_Pitch1.27mm" H 10650 3300 50 0001 C CNN +F 3 "" H 10650 3300 50 0001 C CNN + 1 10650 3300 + 1 0 0 -1 +$EndComp +$Comp +L OPL3:YAC512-M U5 +U 1 1 5D0824E8 +P 12750 3300 +F 0 "U5" H 13250 3525 50 0000 C CNN +F 1 "YAC512-M" H 13250 3434 50 0000 C CNN +F 2 "Housings_SOIC:SOIC-16W_5.3x10.2mm_Pitch1.27mm" H 13150 3400 50 0001 C CNN +F 3 "" H 13150 3400 50 0001 C CNN + 1 12750 3300 + 1 0 0 -1 +$EndComp +$Comp +L power:+5V #PWR031 +U 1 1 5D082D07 +P 10450 3300 +F 0 "#PWR031" H 10450 3150 50 0001 C CNN +F 1 "+5V" H 10465 3473 50 0000 C CNN +F 2 "" H 10450 3300 50 0001 C CNN +F 3 "" H 10450 3300 50 0001 C CNN + 1 10450 3300 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR032 +U 1 1 5D082D78 +P 10450 4400 +F 0 "#PWR032" H 10450 4150 50 0001 C CNN +F 1 "GND" H 10455 4227 50 0000 C CNN +F 2 "" H 10450 4400 50 0001 C CNN +F 3 "" H 10450 4400 50 0001 C CNN + 1 10450 4400 + 1 0 0 -1 +$EndComp +$Comp +L device:C_Small C14 +U 1 1 5D082F21 +P 10900 4800 +F 0 "C14" H 10808 4754 50 0000 R CNN +F 1 "100nF" H 10808 4845 50 0000 R CNN +F 2 "Capacitors_SMD:C_0805" H 10900 4800 50 0001 C CNN +F 3 "~" H 10900 4800 50 0001 C CNN + 1 10900 4800 + -1 0 0 1 +$EndComp +$Comp +L power:+5V #PWR033 +U 1 1 5D08308B +P 10900 4700 +F 0 "#PWR033" H 10900 4550 50 0001 C CNN +F 1 "+5V" H 10915 4873 50 0000 C CNN +F 2 "" H 10900 4700 50 0001 C CNN +F 3 "" H 10900 4700 50 0001 C CNN + 1 10900 4700 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR034 +U 1 1 5D0830D2 +P 10900 4900 +F 0 "#PWR034" H 10900 4650 50 0001 C CNN +F 1 "GND" H 10905 4727 50 0000 C CNN +F 2 "" H 10900 4900 50 0001 C CNN +F 3 "" H 10900 4900 50 0001 C CNN + 1 10900 4900 + 1 0 0 -1 +$EndComp +$Comp +L device:C_Small C15 +U 1 1 5D0834D1 +P 13250 4400 +F 0 "C15" H 13158 4354 50 0000 R CNN +F 1 "100nF" H 13158 4445 50 0000 R CNN +F 2 "Capacitors_SMD:C_0805" H 13250 4400 50 0001 C CNN +F 3 "~" H 13250 4400 50 0001 C CNN + 1 13250 4400 + -1 0 0 1 +$EndComp +$Comp +L power:+5VA #PWR035 +U 1 1 5D084912 +P 13250 4300 +F 0 "#PWR035" H 13250 4150 50 0001 C CNN +F 1 "+5VA" H 13265 4473 50 0000 C CNN +F 2 "" H 13250 4300 50 0001 C CNN +F 3 "" H 13250 4300 50 0001 C CNN + 1 13250 4300 + 1 0 0 -1 +$EndComp +$Comp +L power:GNDA #PWR036 +U 1 1 5D084999 +P 13250 4500 +F 0 "#PWR036" H 13250 4250 50 0001 C CNN +F 1 "GNDA" H 13255 4327 50 0000 C CNN +F 2 "" H 13250 4500 50 0001 C CNN +F 3 "" H 13250 4500 50 0001 C CNN + 1 13250 4500 + 1 0 0 -1 +$EndComp +Text GLabel 11400 3300 2 50 Input ~ 0 +YM_CLK +Text GLabel 7700 3100 2 50 Input ~ 0 +YM_CLK +Text GLabel 10450 3500 0 50 Input ~ 0 +YM_IC +Text GLabel 7700 4500 2 50 Input ~ 0 +YM_IC +Text GLabel 10450 3600 0 50 Input ~ 0 +YM_A0 +Text GLabel 1900 2600 0 50 Input ~ 0 +YM_A0 +Text GLabel 1900 2700 0 50 Input ~ 0 +YM_A1 +Text GLabel 10450 3700 0 50 Input ~ 0 +YM_A1 +Text GLabel 10450 3800 0 50 Input ~ 0 +YM_WR +Text GLabel 1900 3500 0 50 Input ~ 0 +YM_WR +Text GLabel 10450 4000 0 50 Input ~ 0 +YM_CS +Text GLabel 7700 3800 2 50 Input ~ 0 +YM_CS +$Comp +L device:R_Small R5 +U 1 1 5D06D45A +P 10000 3900 +F 0 "R5" V 9804 3900 50 0000 C CNN +F 1 "10K" V 9895 3900 50 0000 C CNN +F 2 "Resistors_SMD:R_0805" H 10000 3900 50 0001 C CNN +F 3 "~" H 10000 3900 50 0001 C CNN + 1 10000 3900 + 0 1 1 0 +$EndComp +Wire Wire Line + 10100 3900 10450 3900 +$Comp +L power:+5V #PWR030 +U 1 1 5D06E62F +P 9650 3850 +F 0 "#PWR030" H 9650 3700 50 0001 C CNN +F 1 "+5V" H 9665 4023 50 0000 C CNN +F 2 "" H 9650 3850 50 0001 C CNN +F 3 "" H 9650 3850 50 0001 C CNN + 1 9650 3850 + 1 0 0 -1 +$EndComp +Wire Wire Line + 9650 3850 9650 3900 +Wire Wire Line + 9650 3900 9900 3900 +NoConn ~ 10450 4100 +NoConn ~ 10450 3400 +Text GLabel 10450 4200 0 50 Input ~ 0 +D0 +Text GLabel 10450 4300 0 50 Input ~ 0 +D1 +Text GLabel 11400 4400 2 50 Input ~ 0 +D2 +Text GLabel 11400 4300 2 50 Input ~ 0 +D3 +Text GLabel 11400 4200 2 50 Input ~ 0 +D4 +Text GLabel 11400 4100 2 50 Input ~ 0 +D5 +Text GLabel 11400 4000 2 50 Input ~ 0 +D6 +Text GLabel 11400 3900 2 50 Input ~ 0 +D7 +Text GLabel 1900 3800 0 50 Input ~ 0 +D0 +Text GLabel 1900 3900 0 50 Input ~ 0 +D1 +Text GLabel 1900 4000 0 50 Input ~ 0 +D2 +Text GLabel 1900 4100 0 50 Input ~ 0 +D3 +Text GLabel 1900 4200 0 50 Input ~ 0 +D4 +Text GLabel 1900 4300 0 50 Input ~ 0 +D5 +Text GLabel 1900 4400 0 50 Input ~ 0 +D6 +Text GLabel 1900 4500 0 50 Input ~ 0 +D7 +$Comp +L conn:Conn_01x04 J4 +U 1 1 5D073B3F +P 7800 800 +F 0 "J4" H 7880 792 50 0000 L CNN +F 1 "Conn_01x04" H 7880 701 50 0000 L CNN +F 2 "Pin_Headers:Pin_Header_Straight_1x04_Pitch2.54mm" H 7800 800 50 0001 C CNN +F 3 "~" H 7800 800 50 0001 C CNN + 1 7800 800 + 1 0 0 -1 +$EndComp +Text GLabel 7600 800 0 50 Input ~ 0 +SWDIO +Text GLabel 7600 900 0 50 Input ~ 0 +SWCLK +$Comp +L power:GND #PWR038 +U 1 1 5D0742FC +P 7600 1000 +F 0 "#PWR038" H 7600 750 50 0001 C CNN +F 1 "GND" H 7605 827 50 0000 C CNN +F 2 "" H 7600 1000 50 0001 C CNN +F 3 "" H 7600 1000 50 0001 C CNN + 1 7600 1000 + 1 0 0 -1 +$EndComp +$Comp +L power:+3.3V #PWR037 +U 1 1 5D074375 +P 7600 700 +F 0 "#PWR037" H 7600 550 50 0001 C CNN +F 1 "+3.3V" H 7615 873 50 0000 C CNN +F 2 "" H 7600 700 50 0001 C CNN +F 3 "" H 7600 700 50 0001 C CNN + 1 7600 700 + 1 0 0 -1 +$EndComp +Text GLabel 7700 4300 2 50 Input ~ 0 +SWDIO +Text GLabel 7700 4400 2 50 Input ~ 0 +SWCLK +$Comp +L power:+5VA #PWR039 +U 1 1 5D07802E +P 12550 3200 +F 0 "#PWR039" H 12550 3050 50 0001 C CNN +F 1 "+5VA" H 12565 3373 50 0000 C CNN +F 2 "" H 12550 3200 50 0001 C CNN +F 3 "" H 12550 3200 50 0001 C CNN + 1 12550 3200 + 1 0 0 -1 +$EndComp +Wire Wire Line + 12550 3200 12550 3300 +Wire Wire Line + 12550 3300 12750 3300 +Wire Wire Line + 12550 3300 12550 3500 +Wire Wire Line + 12550 3500 12750 3500 +Connection ~ 12550 3300 +Wire Wire Line + 12750 3400 12650 3400 +$Comp +L power:GNDA #PWR040 +U 1 1 5D07BA7A +P 12650 4500 +F 0 "#PWR040" H 12650 4250 50 0001 C CNN +F 1 "GNDA" H 12655 4327 50 0000 C CNN +F 2 "" H 12650 4500 50 0001 C CNN +F 3 "" H 12650 4500 50 0001 C CNN + 1 12650 4500 + 1 0 0 -1 +$EndComp +Wire Wire Line + 12650 3400 12650 4500 +Wire Wire Line + 11400 3400 12250 3400 +Wire Wire Line + 12250 3400 12250 3700 +Wire Wire Line + 12250 3700 12750 3700 +Wire Wire Line + 11400 3600 12750 3600 +Wire Wire Line + 11400 3700 12000 3700 +Wire Wire Line + 12000 3700 12000 3900 +Wire Wire Line + 12000 3900 12750 3900 +Wire Wire Line + 11400 3800 11900 3800 +Wire Wire Line + 11900 3800 11900 4000 +Wire Wire Line + 11900 4000 12750 4000 +NoConn ~ 11400 3500 +Wire Wire Line + 12750 3800 12550 3800 +Wire Wire Line + 12550 3800 12550 3500 +Connection ~ 12550 3500 +$Comp +L power:+5VA #PWR041 +U 1 1 5D086A9D +P 13750 4000 +F 0 "#PWR041" H 13750 3850 50 0001 C CNN +F 1 "+5VA" H 13765 4173 50 0000 C CNN +F 2 "" H 13750 4000 50 0001 C CNN +F 3 "" H 13750 4000 50 0001 C CNN + 1 13750 4000 + 0 1 1 0 +$EndComp +NoConn ~ 13750 3400 +$Comp +L linear:TL074 U6 +U 1 1 5D088E9C +P 14850 2600 +F 0 "U6" H 15191 2646 50 0000 L CNN +F 1 "TL074" H 15191 2555 50 0000 L CNN +F 2 "Housings_SOIC:SOIC-14_3.9x8.7mm_Pitch1.27mm" H 14800 2700 50 0001 C CNN +F 3 "http://www.ti.com/lit/ds/symlink/tl071.pdf" H 14900 2800 50 0001 C CNN + 1 14850 2600 + 1 0 0 -1 +$EndComp +$Comp +L linear:TL074 U6 +U 3 1 5D08A6B2 +P 14850 4200 +F 0 "U6" H 15191 4246 50 0000 L CNN +F 1 "TL074" H 15191 4155 50 0000 L CNN +F 2 "Housings_SOIC:SOIC-14_3.9x8.7mm_Pitch1.27mm" H 14800 4300 50 0001 C CNN +F 3 "http://www.ti.com/lit/ds/symlink/tl071.pdf" H 14900 4400 50 0001 C CNN + 3 14850 4200 + 1 0 0 -1 +$EndComp +$Comp +L linear:TL074 U6 +U 4 1 5D08A737 +P 14850 5000 +F 0 "U6" H 15191 5046 50 0000 L CNN +F 1 "TL074" H 15191 4955 50 0000 L CNN +F 2 "Housings_SOIC:SOIC-14_3.9x8.7mm_Pitch1.27mm" H 14800 5100 50 0001 C CNN +F 3 "http://www.ti.com/lit/ds/symlink/tl071.pdf" H 14900 5200 50 0001 C CNN + 4 14850 5000 + 1 0 0 -1 +$EndComp +$Comp +L power:GNDA #PWR047 +U 1 1 5D08ABA3 +P 14750 2900 +F 0 "#PWR047" H 14750 2650 50 0001 C CNN +F 1 "GNDA" H 14755 2727 50 0000 C CNN +F 2 "" H 14750 2900 50 0001 C CNN +F 3 "" H 14750 2900 50 0001 C CNN + 1 14750 2900 + 1 0 0 -1 +$EndComp +$Comp +L power:+5VA #PWR046 +U 1 1 5D08ACD6 +P 14750 2100 +F 0 "#PWR046" H 14750 1950 50 0001 C CNN +F 1 "+5VA" H 14765 2273 50 0000 C CNN +F 2 "" H 14750 2100 50 0001 C CNN +F 3 "" H 14750 2100 50 0001 C CNN + 1 14750 2100 + 1 0 0 -1 +$EndComp +$Comp +L device:C_Small C20 +U 1 1 5D08B2F4 +P 15050 2200 +F 0 "C20" V 14821 2200 50 0000 C CNN +F 1 "100nF" V 14912 2200 50 0000 C CNN +F 2 "Capacitors_SMD:C_0805" H 15050 2200 50 0001 C CNN +F 3 "~" H 15050 2200 50 0001 C CNN + 1 15050 2200 + 0 1 1 0 +$EndComp +Wire Wire Line + 14750 2100 14750 2200 +Wire Wire Line + 14750 2200 14950 2200 +Connection ~ 14750 2200 +Wire Wire Line + 14750 2200 14750 2300 +$Comp +L power:GNDA #PWR048 +U 1 1 5D08E9E3 +P 15150 2200 +F 0 "#PWR048" H 15150 1950 50 0001 C CNN +F 1 "GNDA" H 15155 2027 50 0000 C CNN +F 2 "" H 15150 2200 50 0001 C CNN +F 3 "" H 15150 2200 50 0001 C CNN + 1 15150 2200 + 1 0 0 -1 +$EndComp +$Comp +L device:CP_Small C19 +U 1 1 5D08F345 +P 14150 2600 +F 0 "C19" H 14238 2646 50 0000 L CNN +F 1 "10uF" H 14238 2555 50 0000 L CNN +F 2 "Capacitors_SMD:CP_Elec_3x5.3" H 14150 2600 50 0001 C CNN +F 3 "~" H 14150 2600 50 0001 C CNN + 1 14150 2600 + 1 0 0 -1 +$EndComp +Wire Wire Line + 14150 2500 14550 2500 +$Comp +L power:GNDA #PWR045 +U 1 1 5D091290 +P 14150 2700 +F 0 "#PWR045" H 14150 2450 50 0001 C CNN +F 1 "GNDA" H 14155 2527 50 0000 C CNN +F 2 "" H 14150 2700 50 0001 C CNN +F 3 "" H 14150 2700 50 0001 C CNN + 1 14150 2700 + 1 0 0 -1 +$EndComp +Wire Wire Line + 14150 2500 13850 2500 +Wire Wire Line + 13850 2500 13850 3300 +Wire Wire Line + 13850 3300 13750 3300 +Connection ~ 14150 2500 +Wire Wire Line + 14550 2700 14550 2950 +Wire Wire Line + 14550 2950 13900 2950 +Wire Wire Line + 13900 2950 13900 3500 +Wire Wire Line + 13900 3500 13750 3500 +Wire Wire Line + 13750 3600 13950 3600 +Wire Wire Line + 13950 3600 13950 3300 +Wire Wire Line + 13950 3300 14050 3300 +$Comp +L device:C_Small C16 +U 1 1 5D099A66 +P 14050 3400 +F 0 "C16" H 13958 3354 50 0000 R CNN +F 1 "68pF" H 13958 3445 50 0000 R CNN +F 2 "Capacitors_SMD:C_0603" H 14050 3400 50 0001 C CNN +F 3 "~" H 14050 3400 50 0001 C CNN + 1 14050 3400 + -1 0 0 1 +$EndComp +Connection ~ 14050 3300 +Wire Wire Line + 14050 3300 14550 3300 +$Comp +L power:GNDA #PWR042 +U 1 1 5D099B83 +P 14050 3500 +F 0 "#PWR042" H 14050 3250 50 0001 C CNN +F 1 "GNDA" H 14055 3327 50 0000 C CNN +F 2 "" H 14050 3500 50 0001 C CNN +F 3 "" H 14050 3500 50 0001 C CNN + 1 14050 3500 + 1 0 0 -1 +$EndComp +$Comp +L device:R_Small R6 +U 1 1 5D09C4DE +P 14400 3500 +F 0 "R6" V 14300 3500 50 0000 C CNN +F 1 "33" V 14400 3500 50 0000 C CNN +F 2 "Resistors_SMD:R_0805" H 14400 3500 50 0001 C CNN +F 3 "~" H 14400 3500 50 0001 C CNN + 1 14400 3500 + 0 1 1 0 +$EndComp +Wire Wire Line + 14500 3500 14550 3500 +Connection ~ 14500 3500 +Wire Wire Line + 14300 3500 14300 3700 +Wire Wire Line + 14300 3700 13750 3700 +$Comp +L device:C_Small C18 +U 1 1 5D0ACB88 +P 14100 4150 +F 0 "C18" H 14008 4104 50 0000 R CNN +F 1 "2.7nF" H 14008 4195 50 0000 R CNN +F 2 "Capacitors_SMD:C_0603" H 14100 4150 50 0001 C CNN +F 3 "~" H 14100 4150 50 0001 C CNN + 1 14100 4150 + -1 0 0 1 +$EndComp +Wire Wire Line + 14100 4050 14350 4050 +Wire Wire Line + 14350 4050 14350 4100 +Wire Wire Line + 14350 4100 14550 4100 +Wire Wire Line + 14100 4050 14100 3800 +Wire Wire Line + 14100 3800 13750 3800 +Connection ~ 14100 4050 +Wire Wire Line + 14550 4300 14550 4550 +Wire Wire Line + 14550 4550 15150 4550 +Wire Wire Line + 15150 4550 15150 4200 +Wire Wire Line + 15150 4200 15550 4200 +Connection ~ 15150 4200 +Text GLabel 15550 4200 2 50 Input ~ 0 +CH2_OUT +$Comp +L power:GNDA #PWR044 +U 1 1 5D0B96A4 +P 14100 4250 +F 0 "#PWR044" H 14100 4000 50 0001 C CNN +F 1 "GNDA" H 14105 4077 50 0000 C CNN +F 2 "" H 14100 4250 50 0001 C CNN +F 3 "" H 14100 4250 50 0001 C CNN + 1 14100 4250 + 1 0 0 -1 +$EndComp +Wire Wire Line + 13750 3900 14000 3900 +Wire Wire Line + 14000 3900 14000 4900 +Wire Wire Line + 14000 4900 14050 4900 +$Comp +L device:C_Small C17 +U 1 1 5D0BD076 +P 14050 5000 +F 0 "C17" H 13958 4954 50 0000 R CNN +F 1 "2.7nF" H 13958 5045 50 0000 R CNN +F 2 "Capacitors_SMD:C_0603" H 14050 5000 50 0001 C CNN +F 3 "~" H 14050 5000 50 0001 C CNN + 1 14050 5000 + -1 0 0 1 +$EndComp +Connection ~ 14050 4900 +Wire Wire Line + 14050 4900 14550 4900 +$Comp +L power:GNDA #PWR043 +U 1 1 5D0BD239 +P 14050 5100 +F 0 "#PWR043" H 14050 4850 50 0001 C CNN +F 1 "GNDA" H 14055 4927 50 0000 C CNN +F 2 "" H 14050 5100 50 0001 C CNN +F 3 "" H 14050 5100 50 0001 C CNN + 1 14050 5100 + 1 0 0 -1 +$EndComp +Wire Wire Line + 14550 5100 14550 5550 +Wire Wire Line + 14550 5550 15150 5550 +Wire Wire Line + 15150 5550 15150 5000 +Wire Wire Line + 15150 5000 15550 5000 +Connection ~ 15150 5000 +Text GLabel 15550 5000 2 50 Input ~ 0 +CH1_OUT +$Comp +L linear:TL074 U6 +U 2 1 5D08A637 +P 14850 3400 +F 0 "U6" H 15191 3446 50 0000 L CNN +F 1 "TL074" H 15191 3355 50 0000 L CNN +F 2 "Housings_SOIC:SOIC-14_3.9x8.7mm_Pitch1.27mm" H 14800 3500 50 0001 C CNN +F 3 "http://www.ti.com/lit/ds/symlink/tl071.pdf" H 14900 3600 50 0001 C CNN + 2 14850 3400 + 1 0 0 -1 +$EndComp +Wire Wire Line + 15150 3750 14500 3750 +Wire Wire Line + 15150 3400 15150 3750 +Wire Wire Line + 14500 3500 14500 3750 +$Comp +L oled:128x32_I2C_OLED DS1 +U 1 1 5D077C17 +P 9450 6350 +F 0 "DS1" H 10168 6575 50 0000 C CNN +F 1 "128x32_I2C_OLED" H 10168 6484 50 0000 C CNN +F 2 "oled_display:128x32_OLED_I2C_Module" H 9450 6350 50 0001 C CNN +F 3 "" H 9450 6350 50 0001 C CNN + 1 9450 6350 + 1 0 0 -1 +$EndComp +$Comp +L power:GNDD #PWR051 +U 1 1 5D0780DA +P 9150 6950 +F 0 "#PWR051" H 9150 6700 50 0001 C CNN +F 1 "GNDD" H 9154 6795 50 0000 C CNN +F 2 "" H 9150 6950 50 0001 C CNN +F 3 "" H 9150 6950 50 0001 C CNN + 1 9150 6950 + 1 0 0 -1 +$EndComp +$Comp +L power:GNDD #PWR049 +U 1 1 5D078C54 +P 3050 7450 +F 0 "#PWR049" H 3050 7200 50 0001 C CNN +F 1 "GNDD" H 3054 7295 50 0000 C CNN +F 2 "" H 3050 7450 50 0001 C CNN +F 3 "" H 3050 7450 50 0001 C CNN + 1 3050 7450 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3050 7450 3050 7400 +Connection ~ 3050 7400 +$Comp +L device:R_Small R7 +U 1 1 5D07C9BC +P 8550 6550 +F 0 "R7" V 8354 6550 50 0000 C CNN +F 1 "4.7" V 8445 6550 50 0000 C CNN +F 2 "Resistors_SMD:R_0805" H 8550 6550 50 0001 C CNN +F 3 "~" H 8550 6550 50 0001 C CNN + 1 8550 6550 + 0 1 1 0 +$EndComp +$Comp +L device:L_Small L3 +U 1 1 5D07CEA5 +P 8900 6550 +F 0 "L3" V 8722 6550 50 0000 C CNN +F 1 "10uH" V 8813 6550 50 0000 C CNN +F 2 "custom_inductors:L_4x4" H 8900 6550 50 0001 C CNN +F 3 "~" H 8900 6550 50 0001 C CNN + 1 8900 6550 + 0 1 1 0 +$EndComp +$Comp +L device:C_Small C21 +U 1 1 5D07D0A0 +P 9050 6800 +F 0 "C21" H 8900 6850 50 0000 L CNN +F 1 "10uF" H 8800 6750 50 0000 L CNN +F 2 "Capacitors_SMD:C_1206" H 9050 6800 50 0001 C CNN +F 3 "~" H 9050 6800 50 0001 C CNN + 1 9050 6800 + 1 0 0 -1 +$EndComp +Wire Wire Line + 9150 6650 9250 6650 +Wire Wire Line + 9150 6950 9150 6900 +Wire Wire Line + 9050 6900 9150 6900 +Connection ~ 9150 6900 +Wire Wire Line + 9150 6900 9150 6650 +Wire Wire Line + 9050 6700 9050 6550 +Wire Wire Line + 9050 6550 9000 6550 +Wire Wire Line + 9050 6550 9250 6550 +Connection ~ 9050 6550 +Wire Wire Line + 8800 6550 8650 6550 +$Comp +L power:+3V3 #PWR050 +U 1 1 5D09767B +P 8200 6550 +F 0 "#PWR050" H 8200 6400 50 0001 C CNN +F 1 "+3V3" H 8215 6723 50 0000 C CNN +F 2 "" H 8200 6550 50 0001 C CNN +F 3 "" H 8200 6550 50 0001 C CNN + 1 8200 6550 + 1 0 0 -1 +$EndComp +Wire Wire Line + 8200 6550 8450 6550 +Text GLabel 9250 6450 0 50 Input ~ 0 +SCL +Text GLabel 9250 6350 0 50 Input ~ 0 +SDA +Text Notes 9400 6850 0 50 ~ 0 +OLED is super noisy. Needs its own GND return path and RCL filter. +Text GLabel 1300 3600 0 50 Input ~ 0 +SCL +Text GLabel 1300 3700 0 50 Input ~ 0 +SDA +$Comp +L device:R_Small R8 +U 1 1 5D0A02B2 +P 1200 3500 +F 0 "R8" V 1004 3500 50 0000 C CNN +F 1 "4.7K" V 1095 3500 50 0000 C CNN +F 2 "Resistors_SMD:R_0805" H 1200 3500 50 0001 C CNN +F 3 "~" H 1200 3500 50 0001 C CNN + 1 1200 3500 + 0 1 1 0 +$EndComp +$Comp +L device:R_Small R9 +U 1 1 5D0A03C9 +P 1200 3800 +F 0 "R9" V 1400 3800 50 0000 C CNN +F 1 "4.7K" V 1300 3800 50 0000 C CNN +F 2 "Resistors_SMD:R_0805" H 1200 3800 50 0001 C CNN +F 3 "~" H 1200 3800 50 0001 C CNN + 1 1200 3800 + 0 1 1 0 +$EndComp +Wire Wire Line + 1300 3600 1400 3600 +Wire Wire Line + 1300 3700 1400 3700 +Wire Wire Line + 1300 3500 1400 3500 +Wire Wire Line + 1400 3500 1400 3600 +Connection ~ 1400 3600 +Wire Wire Line + 1400 3600 1900 3600 +Wire Wire Line + 1400 3700 1400 3800 +Wire Wire Line + 1400 3800 1300 3800 +Connection ~ 1400 3700 +Wire Wire Line + 1400 3700 1900 3700 +$Comp +L power:+3V3 #PWR052 +U 1 1 5D0B2209 +P 800 3500 +F 0 "#PWR052" H 800 3350 50 0001 C CNN +F 1 "+3V3" H 815 3673 50 0000 C CNN +F 2 "" H 800 3500 50 0001 C CNN +F 3 "" H 800 3500 50 0001 C CNN + 1 800 3500 + 1 0 0 -1 +$EndComp +Wire Wire Line + 800 3500 1100 3500 +Wire Wire Line + 1100 3800 800 3800 +Wire Wire Line + 800 3800 800 3500 +Connection ~ 800 3500 +$Comp +L switches:SW_Push_Dual SW2 +U 1 1 5D0BD2C0 +P 7550 8850 +F 0 "SW2" H 7550 9135 50 0000 C CNN +F 1 "SW_Push_Dual" H 7550 9044 50 0000 C CNN +F 2 "Buttons_Switches_THT:SW_TH_Tactile_Omron_B3F-10xx" H 7550 9050 50 0001 C CNN +F 3 "" H 7550 9050 50 0001 C CNN + 1 7550 8850 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR053 +U 1 1 5D0BDFA1 +P 7350 9050 +F 0 "#PWR053" H 7350 8800 50 0001 C CNN +F 1 "GND" H 7355 8877 50 0000 C CNN +F 2 "" H 7350 9050 50 0001 C CNN +F 3 "" H 7350 9050 50 0001 C CNN + 1 7350 9050 + 1 0 0 -1 +$EndComp +Text GLabel 7350 8850 0 50 Input ~ 0 +PREV +$Comp +L switches:SW_Push_Dual SW3 +U 1 1 5D0BE187 +P 8350 8850 +F 0 "SW3" H 8350 9135 50 0000 C CNN +F 1 "SW_Push_Dual" H 8350 9044 50 0000 C CNN +F 2 "Buttons_Switches_THT:SW_TH_Tactile_Omron_B3F-10xx" H 8350 9050 50 0001 C CNN +F 3 "" H 8350 9050 50 0001 C CNN + 1 8350 8850 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR054 +U 1 1 5D0BE18E +P 8150 9050 +F 0 "#PWR054" H 8150 8800 50 0001 C CNN +F 1 "GND" H 8155 8877 50 0000 C CNN +F 2 "" H 8150 9050 50 0001 C CNN +F 3 "" H 8150 9050 50 0001 C CNN + 1 8150 9050 + 1 0 0 -1 +$EndComp +Text GLabel 8150 8850 0 50 Input ~ 0 +RAND +$Comp +L switches:SW_Push_Dual SW4 +U 1 1 5D0C3590 +P 9150 8850 +F 0 "SW4" H 9150 9135 50 0000 C CNN +F 1 "SW_Push_Dual" H 9150 9044 50 0000 C CNN +F 2 "Buttons_Switches_THT:SW_TH_Tactile_Omron_B3F-10xx" H 9150 9050 50 0001 C CNN +F 3 "" H 9150 9050 50 0001 C CNN + 1 9150 8850 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR055 +U 1 1 5D0C3597 +P 8950 9050 +F 0 "#PWR055" H 8950 8800 50 0001 C CNN +F 1 "GND" H 8955 8877 50 0000 C CNN +F 2 "" H 8950 9050 50 0001 C CNN +F 3 "" H 8950 9050 50 0001 C CNN + 1 8950 9050 + 1 0 0 -1 +$EndComp +Text GLabel 8950 8850 0 50 Input ~ 0 +NEXT +$Comp +L switches:SW_Push_Dual SW5 +U 1 1 5D0C8984 +P 9950 8850 +F 0 "SW5" H 9950 9135 50 0000 C CNN +F 1 "SW_Push_Dual" H 9950 9044 50 0000 C CNN +F 2 "Buttons_Switches_THT:SW_TH_Tactile_Omron_B3F-10xx" H 9950 9050 50 0001 C CNN +F 3 "" H 9950 9050 50 0001 C CNN + 1 9950 8850 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR056 +U 1 1 5D0C898B +P 9750 9050 +F 0 "#PWR056" H 9750 8800 50 0001 C CNN +F 1 "GND" H 9755 8877 50 0000 C CNN +F 2 "" H 9750 9050 50 0001 C CNN +F 3 "" H 9750 9050 50 0001 C CNN + 1 9750 9050 + 1 0 0 -1 +$EndComp +Text GLabel 9750 8850 0 50 Input ~ 0 +OPTION +NoConn ~ 7750 8850 +NoConn ~ 7750 9050 +NoConn ~ 8550 9050 +NoConn ~ 8550 8850 +NoConn ~ 9350 8850 +NoConn ~ 9350 9050 +NoConn ~ 10150 9050 +NoConn ~ 10150 8850 +Text GLabel 1900 3000 0 50 Input ~ 0 +PREV +Wire Wire Line + 1150 3200 1250 3200 +Wire Wire Line + 1450 3200 1900 3200 +Text GLabel 1900 3100 0 50 Input ~ 0 +RAND +Text GLabel 1900 3300 0 50 Input ~ 0 +NEXT +Text GLabel 1900 3400 0 50 Input ~ 0 +OPTION +Text GLabel 13650 6250 0 50 Input ~ 0 +CH2_OUT +Text GLabel 13650 5750 0 50 Input ~ 0 +CH1_OUT +$Comp +L device:CP_Small C22 +U 1 1 5D10A294 +P 13900 5750 +F 0 "C22" V 14125 5750 50 0000 C CNN +F 1 "10uF" V 14034 5750 50 0000 C CNN +F 2 "Capacitors_SMD:CP_Elec_3x5.3" H 13900 5750 50 0001 C CNN +F 3 "~" H 13900 5750 50 0001 C CNN + 1 13900 5750 + 0 -1 -1 0 +$EndComp +Wire Wire Line + 13650 5750 13800 5750 +$Comp +L device:CP_Small C23 +U 1 1 5D10F969 +P 13900 6250 +F 0 "C23" V 13800 6250 50 0000 C CNN +F 1 "10uF" V 13700 6250 50 0000 C CNN +F 2 "Capacitors_SMD:CP_Elec_3x5.3" H 13900 6250 50 0001 C CNN +F 3 "~" H 13900 6250 50 0001 C CNN + 1 13900 6250 + 0 -1 -1 0 +$EndComp +Wire Wire Line + 13800 6250 13650 6250 +$Comp +L device:R_POT_Dual RV1 +U 1 1 5D115438 +P 14750 6150 +F 0 "RV1" V 14704 5962 50 0000 R CNN +F 1 "R_POT_Dual" V 14795 5962 50 0000 R CNN +F 2 "Potentiometers:Potentiometer_Alps_RK097_Double_Vertical" H 15000 6075 50 0001 C CNN +F 3 "~" H 15000 6075 50 0001 C CNN + 1 14750 6150 + 0 1 1 0 +$EndComp +Wire Wire Line + 14000 5750 14650 5750 +Wire Wire Line + 14000 6250 14650 6250 +$Comp +L power:GNDA #PWR058 +U 1 1 5D141D49 +P 14650 6050 +F 0 "#PWR058" H 14650 5800 50 0001 C CNN +F 1 "GNDA" H 14655 5877 50 0000 C CNN +F 2 "" H 14650 6050 50 0001 C CNN +F 3 "" H 14650 6050 50 0001 C CNN + 1 14650 6050 + 1 0 0 -1 +$EndComp +$Comp +L power:GNDA #PWR059 +U 1 1 5D141DCB +P 14650 6550 +F 0 "#PWR059" H 14650 6300 50 0001 C CNN +F 1 "GNDA" H 14655 6377 50 0000 C CNN +F 2 "" H 14650 6550 50 0001 C CNN +F 3 "" H 14650 6550 50 0001 C CNN + 1 14650 6550 + 1 0 0 -1 +$EndComp +$Comp +L conn_custom:Audio-Jack-3 J5 +U 1 1 5D14207F +P 14550 7350 +F 0 "J5" H 14526 7675 50 0000 C CNN +F 1 "Audio-Jack-3" H 14526 7584 50 0000 C CNN +F 2 "35RAPC4BHN2:SWITCHCRAFT_35RAPC4BHN2" H 14800 7450 50 0001 C CNN +F 3 "~" H 14800 7450 50 0001 C CNN + 1 14550 7350 + 1 0 0 -1 +$EndComp +Wire Wire Line + 14850 5900 15350 5900 +Wire Wire Line + 15350 5900 15350 7350 +Wire Wire Line + 15350 7350 14750 7350 +Wire Wire Line + 14750 7250 14950 7250 +Wire Wire Line + 14950 7250 14950 6400 +Wire Wire Line + 14950 6400 14850 6400 +$Comp +L power:GNDA #PWR057 +U 1 1 5D164AF6 +P 14350 7450 +F 0 "#PWR057" H 14350 7200 50 0001 C CNN +F 1 "GNDA" H 14355 7277 50 0000 C CNN +F 2 "" H 14350 7450 50 0001 C CNN +F 3 "" H 14350 7450 50 0001 C CNN + 1 14350 7450 + 1 0 0 -1 +$EndComp +NoConn ~ 7700 3000 +NoConn ~ 7700 3200 +NoConn ~ 7700 3300 +NoConn ~ 7700 4100 +NoConn ~ 7700 4200 +NoConn ~ 1900 2800 +$Comp +L power:+3.3V #PWR060 +U 1 1 5D0AD22B +P 1900 2100 +F 0 "#PWR060" H 1900 1950 50 0001 C CNN +F 1 "+3.3V" H 1915 2273 50 0000 C CNN +F 2 "" H 1900 2100 50 0001 C CNN +F 3 "" H 1900 2100 50 0001 C CNN + 1 1900 2100 + 0 -1 -1 0 +$EndComp +$Comp +L mechanical:MountingHole H1 +U 1 1 5D0CCC85 +P 4450 10150 +F 0 "H1" H 4550 10196 50 0000 L CNN +F 1 "M3" H 4550 10105 50 0000 L CNN +F 2 "Mounting_Holes:MountingHole_3.2mm_M3" H 4450 10150 50 0001 C CNN +F 3 "~" H 4450 10150 50 0001 C CNN + 1 4450 10150 + 1 0 0 -1 +$EndComp +$Comp +L mechanical:MountingHole H2 +U 1 1 5D0CCDCD +P 4450 10350 +F 0 "H2" H 4550 10396 50 0000 L CNN +F 1 "M3" H 4550 10305 50 0000 L CNN +F 2 "Mounting_Holes:MountingHole_3.2mm_M3" H 4450 10350 50 0001 C CNN +F 3 "~" H 4450 10350 50 0001 C CNN + 1 4450 10350 + 1 0 0 -1 +$EndComp +$Comp +L mechanical:MountingHole H3 +U 1 1 5D0CCE57 +P 4450 10550 +F 0 "H3" H 4550 10596 50 0000 L CNN +F 1 "M3" H 4550 10505 50 0000 L CNN +F 2 "Mounting_Holes:MountingHole_3.2mm_M3" H 4450 10550 50 0001 C CNN +F 3 "~" H 4450 10550 50 0001 C CNN + 1 4450 10550 + 1 0 0 -1 +$EndComp +$Comp +L mechanical:MountingHole H4 +U 1 1 5D0CCEE7 +P 4450 10750 +F 0 "H4" H 4550 10796 50 0000 L CNN +F 1 "M3" H 4550 10705 50 0000 L CNN +F 2 "Mounting_Holes:MountingHole_3.2mm_M3" H 4450 10750 50 0001 C CNN +F 3 "~" H 4450 10750 50 0001 C CNN + 1 4450 10750 + 1 0 0 -1 +$EndComp +$Comp +L power:+5V #PWR0111 +U 1 1 5D0CF4B8 +P 3150 8500 +F 0 "#PWR0111" H 3150 8350 50 0001 C CNN +F 1 "+5V" H 3165 8673 50 0000 C CNN +F 2 "" H 3150 8500 50 0001 C CNN +F 3 "" H 3150 8500 50 0001 C CNN + 1 3150 8500 + 0 1 1 0 +$EndComp +Wire Wire Line + 15150 3050 14550 3050 +Wire Wire Line + 14550 3050 14550 2950 +Wire Wire Line + 15150 2600 15150 3050 +Connection ~ 14550 2950 +$EndSCHEMATC diff --git a/Schematic/OPL3_VGM_Player/bom/debug.log b/Schematic/OPL3_VGM_Player/bom/debug.log new file mode 100644 index 0000000..e8f87ec --- /dev/null +++ b/Schematic/OPL3_VGM_Player/bom/debug.log @@ -0,0 +1 @@ +[1230/125143.270:ERROR:directory_reader_win.cc(43)] FindFirstFile: The system cannot find the path specified. (0x3) diff --git a/Schematic/OPL3_VGM_Player/bom/ibom.html b/Schematic/OPL3_VGM_Player/bom/ibom.html index ebaa687..d10c59f 100644 --- a/Schematic/OPL3_VGM_Player/bom/ibom.html +++ b/Schematic/OPL3_VGM_Player/bom/ibom.html @@ -420,7 +420,7 @@ /////////////////////////////////////////////// /////////////////////////////////////////////// -var pcbdata = {"modules": {"RESET": {"layer": "F", "center": [167.2336, 107.9246], "pads": [{"layers": ["F", "B"], "angle": -270.0, "pos": [167.2336, 107.9246], "drillsize": [1.0, 1.0], "shape": "circle", "drillshape": "circle", "pin1": true, "type": "th", "size": [1.7, 1.7]}, {"layers": ["F", "B"], "angle": -270.0, "pos": [167.2336, 114.4246], "drillsize": [1.0, 1.0], "shape": "circle", "drillshape": "circle", "pin1": false, "type": "th", "size": [1.7, 1.7]}, {"layers": ["F", "B"], "angle": -270.0, "pos": [162.7336, 107.9246], "drillsize": [1.0, 1.0], "shape": "circle", "drillshape": "circle", "pin1": false, "type": "th", "size": [1.7, 1.7]}, {"layers": ["F", "B"], "angle": -270.0, "pos": [162.7336, 114.4246], "drillsize": [1.0, 1.0], "shape": "circle", "drillshape": "circle", "pin1": false, "type": "th", "size": [1.7, 1.7]}], "drawings": [], "ref": "RESET", "bbox": {"pos": [161.608599, 106.799599], "size": [6.800002, 8.800002]}}, "RAND": {"layer": "F", "center": [167.3352, 129.9083], "pads": [{"layers": ["F", "B"], "angle": -0.0, "pos": [173.8352, 134.4083], "drillsize": [1.0, 1.0], "shape": "circle", "drillshape": "circle", "pin1": false, "type": "th", "size": [1.7, 1.7]}, {"layers": ["F", "B"], "angle": -0.0, "pos": [167.3352, 134.4083], "drillsize": [1.0, 1.0], "shape": "circle", "drillshape": "circle", "pin1": false, "type": "th", "size": [1.7, 1.7]}, {"layers": ["F", "B"], "angle": -0.0, "pos": [173.8352, 129.9083], "drillsize": [1.0, 1.0], "shape": "circle", "drillshape": "circle", "pin1": false, "type": "th", "size": [1.7, 1.7]}, {"layers": ["F", "B"], "angle": -0.0, "pos": [167.3352, 129.9083], "drillsize": [1.0, 1.0], "shape": "circle", "drillshape": "circle", "pin1": true, "type": "th", "size": [1.7, 1.7]}], "drawings": [], "ref": "RAND", "bbox": {"pos": [166.210199, 128.733299], "size": [8.800002, 6.800002]}}, "G***": {"layer": "B", "center": [190.5, 113.03], "pads": [], "drawings": [], "ref": "G***", "bbox": {"pos": [156.035665, 101.51602299999999], "size": [69.507447, 22.846977]}}, "R7": {"layer": "F", "center": [179.85739999999998, 121.48819999999999], "pads": [{"layers": ["F"], "angle": -180.0, "pos": [178.9074, 121.48819999999999], "shape": "rect", "pin1": false, "type": "smd", "size": [0.7, 1.3]}, {"layers": ["F"], "angle": -180.0, "pos": [180.8074, 121.48819999999999], "shape": "rect", "pin1": true, "type": "smd", "size": [0.7, 1.3]}], "drawings": [], "ref": "R7", "bbox": {"pos": [178.282399, 120.548199], "size": [3.1500019999999997, 1.880002]}}, "R5": {"layer": "F", "center": [194.74179999999998, 104.50829999999999], "pads": [{"layers": ["F"], "angle": -90.0, "pos": [194.74179999999998, 103.55829999999999], "shape": "rect", "pin1": false, "type": "smd", "size": [0.7, 1.3]}, {"layers": ["F"], "angle": -90.0, "pos": [194.74179999999998, 105.4583], "shape": "rect", "pin1": true, "type": "smd", "size": [0.7, 1.3]}], "drawings": [], "ref": "R5", "bbox": {"pos": [193.801799, 102.93329899999999], "size": [1.880002, 3.1500019999999997]}}, "U5": {"layer": "F", "center": [208.5086, 113.43639999999999], "pads": [{"layers": ["F"], "angle": -0.0, "pos": [212.05859999999998, 108.9914], "shape": "rect", "pin1": false, "type": "smd", "size": [1.5, 0.6]}, {"layers": ["F"], "angle": -0.0, "pos": [212.05859999999998, 110.2614], "shape": "rect", "pin1": false, "type": "smd", "size": [1.5, 0.6]}, {"layers": ["F"], "angle": -0.0, "pos": [212.05859999999998, 111.53139999999999], "shape": "rect", "pin1": false, "type": "smd", "size": [1.5, 0.6]}, {"layers": ["F"], "angle": -0.0, "pos": [212.05859999999998, 112.8014], "shape": "rect", "pin1": false, "type": "smd", "size": [1.5, 0.6]}, {"layers": ["F"], "angle": -0.0, "pos": [212.05859999999998, 114.0714], "shape": "rect", "pin1": false, "type": "smd", "size": [1.5, 0.6]}, {"layers": ["F"], "angle": -0.0, "pos": [212.05859999999998, 115.3414], "shape": "rect", "pin1": false, "type": "smd", "size": [1.5, 0.6]}, {"layers": ["F"], "angle": -0.0, "pos": [212.05859999999998, 116.61139999999999], "shape": "rect", "pin1": false, "type": "smd", "size": [1.5, 0.6]}, {"layers": ["F"], "angle": -0.0, "pos": [212.05859999999998, 117.8814], "shape": "rect", "pin1": false, "type": "smd", "size": [1.5, 0.6]}, {"layers": ["F"], "angle": -0.0, "pos": [204.9586, 117.8814], "shape": "rect", "pin1": false, "type": "smd", "size": [1.5, 0.6]}, {"layers": ["F"], "angle": -0.0, "pos": [204.9586, 116.61139999999999], "shape": "rect", "pin1": false, "type": "smd", "size": [1.5, 0.6]}, {"layers": ["F"], "angle": -0.0, "pos": [204.9586, 115.3414], "shape": "rect", "pin1": false, "type": "smd", "size": [1.5, 0.6]}, {"layers": ["F"], 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@@ -0,0 +1,32 @@ +EESchema-LIBRARY Version 2.4 +#encoding utf-8 +# +# PJ-307C +# +DEF PJ-307C J 0 40 Y Y 1 F N +F0 "J" 200 -300 50 H V C CNN +F1 "PJ-307C" 350 -400 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +S -250 -100 -300 50 0 1 0 N +P 2 0 1 0 -250 150 -250 50 N +P 2 0 1 0 -100 150 -125 125 N +P 2 0 1 0 -100 150 -75 125 N +P 2 0 1 0 -50 -50 -75 -25 N +P 2 0 1 0 0 200 100 200 N +P 2 0 1 0 0 300 100 300 N +P 3 0 1 0 -250 150 -250 300 0 300 N +P 3 0 1 0 -50 0 -50 -50 -25 -25 N +P 3 0 1 0 -50 100 -100 100 -100 150 N +P 4 0 1 0 -200 200 -150 150 -100 200 0 200 N +P 4 0 1 0 100 -100 -50 -100 -100 -50 -150 -100 N +X ~ 1 150 300 200 L 50 50 1 1 I +X ~ 2 150 200 200 L 50 50 1 1 I +X ~ 3 150 100 200 L 50 50 1 1 I +X ~ 4 150 0 200 L 50 50 1 1 I +X ~ 5 150 -100 200 L 50 50 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/lib/MegaStream/megastream.c b/lib/MegaStream/megastream.c new file mode 100644 index 0000000..a99a085 --- /dev/null +++ b/lib/MegaStream/megastream.c @@ -0,0 +1,77 @@ +#include "megastream.h" +#include + +/* + * This is based off FreeRTOS StreamBuffers which are really just ring buffers with some rtos-flavored stuff that we don't actually need. + * + * Footguns: + * - Only one thread can be a reader or a writer + * - Don't write more than will fit + * - Don't read more than is available, or peek when nothing is available + * - Make sure nothing is reading or writing when resetting +*/ + +#define min(a,b) ((a) < (b) ? (a) : (b)) + +void MegaStream_Create(MegaStreamContext_t *ctx, uint8_t *buf, size_t size) { + ctx->size = size; + ctx->buf = buf; + ctx->head = 0; + ctx->tail = 0; +} + +void MegaStream_Reset(MegaStreamContext_t *ctx) { + ctx->head = 0; + ctx->tail = 0; +} + +void MegaStream_Send(MegaStreamContext_t *ctx, uint8_t *inbuf, size_t insize) { + size_t nexthead = ctx->head; + size_t firstlength = min(ctx->size-nexthead, insize); + memcpy(&(ctx->buf[nexthead]), inbuf, firstlength); + if (insize > firstlength) { + memcpy(ctx->buf, &inbuf[firstlength], insize-firstlength); + } + nexthead += insize; + if (nexthead >= ctx->size) { + nexthead -= ctx->size; + } + ctx->head = nexthead; +} + +void MegaStream_Recv(MegaStreamContext_t *ctx, uint8_t *outbuf, size_t outsize) { + size_t nexttail = ctx->tail; + size_t firstlength = min(ctx->size-nexttail, outsize); + memcpy(outbuf, &(ctx->buf[nexttail]), firstlength); + if (outsize > firstlength) { + memcpy(&outbuf[firstlength], ctx->buf, outsize-firstlength); + } + nexttail += outsize; + if (nexttail >= ctx->size) { + nexttail -= ctx->size; + } + ctx->tail = nexttail; +} + +uint8_t MegaStream_Peek(MegaStreamContext_t *ctx) { + return ctx->buf[ctx->tail]; +} + +size_t MegaStream_Used(MegaStreamContext_t *ctx) { + size_t c = ctx->size + ctx->head; + c -= ctx->tail; + if (c >= ctx->size) { + c -= ctx->size; + } + return c; +} + +size_t MegaStream_Free(MegaStreamContext_t *ctx) { + size_t s = ctx->size + ctx->tail; + s -= ctx->head; + s--; + if (s >= ctx->size) { + s -= ctx->size; + } + return s; +} \ No newline at end of file diff --git a/lib/MegaStream/megastream.h b/lib/MegaStream/megastream.h new file mode 100644 index 0000000..11063cb --- /dev/null +++ b/lib/MegaStream/megastream.h @@ -0,0 +1,36 @@ +#ifndef MEGASTREAM_H +#define MEGASTREAM_H + +#include +#include + + +typedef struct { + uint8_t *buf; + volatile size_t tail; + volatile size_t head; + size_t size; +} MegaStreamContext_t; +#ifdef __cplusplus +extern "C" { +#endif +void MegaStream_Create(MegaStreamContext_t *ctx, uint8_t *buf, size_t size); +void MegaStream_Reset(MegaStreamContext_t *ctx); +void MegaStream_Send(MegaStreamContext_t *ctx, uint8_t *inbuf, size_t insize); +void MegaStream_Recv(MegaStreamContext_t *ctx, uint8_t *outbuf, size_t outsize); +uint8_t MegaStream_Peek(MegaStreamContext_t *ctx); +size_t MegaStream_Used(MegaStreamContext_t *ctx); +size_t MegaStream_Free(MegaStreamContext_t *ctx); +#ifdef __cplusplus +} +#endif +#endif + + +/* +Example: + +MegaStreamContext_t stream; +uint8_t bigbuffer[20000]; +MegaStream_Create(&stream, bigbuffer, 20000); +*/ \ No newline at end of file diff --git a/lib/SdFat/library.properties b/lib/SdFat/library.properties index a3e3e97..2e52da5 100644 --- a/lib/SdFat/library.properties +++ b/lib/SdFat/library.properties @@ -1,5 +1,5 @@ name=SdFat -version=1.1.0 +version=1.1.4 license=MIT author=Bill Greiman maintainer=Bill Greiman diff --git a/lib/SdFat/src/FatLib/FatFile.cpp b/lib/SdFat/src/FatLib/FatFile.cpp index c02c085..a47788f 100644 --- a/lib/SdFat/src/FatLib/FatFile.cpp +++ b/lib/SdFat/src/FatLib/FatFile.cpp @@ -262,7 +262,7 @@ bool FatFile::mkdir(FatFile* parent, const char* path, bool pFlag) { fname_t fname; FatFile tmpDir; - if (isOpen() || !parent->isDir()) { + if (isOpen() || !parent || !parent->isDir()) { DBG_FAIL_MACRO; goto fail; } @@ -306,7 +306,7 @@ bool FatFile::mkdir(FatFile* parent, fname_t* fname) { dir_t* dir; cache_t* pc; - if (!parent->isDir()) { + if (!parent || !parent->isDir()) { DBG_FAIL_MACRO; goto fail; } @@ -379,7 +379,7 @@ bool FatFile::open(FatFile* dirFile, const char* path, oflag_t oflag) { fname_t fname; // error if already open - if (isOpen() || !dirFile->isDir()) { + if (isOpen() || !dirFile || !dirFile->isDir()) { DBG_FAIL_MACRO; goto fail; } @@ -425,7 +425,7 @@ bool FatFile::open(FatFile* dirFile, uint16_t index, oflag_t oflag) { ldir_t*ldir; // Error if already open. - if (isOpen() || !dirFile->isDir()) { + if (isOpen() || !dirFile || !dirFile->isDir()) { DBG_FAIL_MACRO; goto fail; } @@ -581,8 +581,9 @@ bool FatFile::openNext(FatFile* dirFile, oflag_t oflag) { uint8_t lfnOrd = 0; uint16_t index; - // Check for not open and valid directory.. - if (isOpen() || !dirFile->isDir() || (dirFile->curPosition() & 0X1F)) { + // Check for not open and valid directory. + if (isOpen() || !dirFile || !dirFile->isDir() + || (dirFile->curPosition() & 0X1F)) { DBG_FAIL_MACRO; goto fail; } @@ -643,7 +644,7 @@ bool FatFile::openParent(FatFile* dirFile) { uint32_t ddc; cache_t* cb; - if (isOpen() || !dirFile->isOpen()) { + if (isOpen() || !dirFile || !dirFile->isOpen()) { goto fail; } if (dirFile->m_dirCluster == 0) { @@ -1235,8 +1236,8 @@ bool FatFile::timestamp(FatFile* file) { dir_t* dir; dir_t srcDir; - // most be files get timestamps - if (!isFile() || !file->isFile() || !file->dirEntry(&srcDir)) { + // must be files to get timestamps + if (!isFile() || !file || !file->isFile() || !file->dirEntry(&srcDir)) { DBG_FAIL_MACRO; goto fail; } diff --git a/lib/SdFat/src/FatLib/FatFile.h b/lib/SdFat/src/FatLib/FatFile.h index 0065427..f5e1fc5 100644 --- a/lib/SdFat/src/FatLib/FatFile.h +++ b/lib/SdFat/src/FatLib/FatFile.h @@ -835,7 +835,7 @@ class FatFile { * \return true for success else false. */ static bool setCwd(FatFile* dir) { - if (!dir->isDir()) { + if (!dir || !dir->isDir()) { return false; } m_cwd = dir; diff --git a/lib/SdFat/src/FatLib/FatFileLFN.cpp b/lib/SdFat/src/FatLib/FatFileLFN.cpp index 571623d..4ff9867 100644 --- a/lib/SdFat/src/FatLib/FatFileLFN.cpp +++ b/lib/SdFat/src/FatLib/FatFileLFN.cpp @@ -303,7 +303,7 @@ bool FatFile::open(FatFile* dirFile, fname_t* fname, oflag_t oflag) { ldir_t* ldir; size_t len = fname->len; - if (!dirFile->isDir() || isOpen()) { + if (!dirFile || !dirFile->isDir() || isOpen()) { DBG_FAIL_MACRO; goto fail; } @@ -502,9 +502,11 @@ bool FatFile::open(FatFile* dirFile, fname_t* fname, oflag_t oflag) { //------------------------------------------------------------------------------ size_t FatFile::printName(print_t* pr) { FatFile dirFile; - uint16_t u; - size_t n = 0; ldir_t* ldir; + size_t n = 0; + uint16_t u; + uint8_t buf[13]; + uint8_t i; if (!isLFN()) { return printSFN(pr); @@ -523,29 +525,24 @@ size_t FatFile::printName(print_t* pr) { DBG_FAIL_MACRO; goto fail; } + if (ldir->attr != DIR_ATT_LONG_NAME || ord != (ldir->ord & 0X1F)) { DBG_FAIL_MACRO; goto fail; } - for (uint8_t i = 0; i < 13; i++) { + for (i = 0; i < 13; i++) { u = lfnGetChar(ldir, i); if (u == 0) { // End of name. break; } - if (u > 0X7E) { - u = '?'; - } - pr->write(static_cast(u)); + buf[i] = u < 0X7F ? u : '?'; n++; } - if (ldir->ord & LDIR_ORD_LAST_LONG_ENTRY) { - return n; - } + pr->write(buf, i); } - // Fall into fail; - DBG_FAIL_MACRO; + return n; fail: return 0; diff --git a/lib/SdFat/src/FatLib/FatVolume.cpp b/lib/SdFat/src/FatLib/FatVolume.cpp index 4a606a0..772ed73 100644 --- a/lib/SdFat/src/FatLib/FatVolume.cpp +++ b/lib/SdFat/src/FatLib/FatVolume.cpp @@ -357,7 +357,7 @@ bool FatVolume::fatPut(uint32_t cluster, uint32_t value) { //------------------------------------------------------------------------------ // free a cluster chain bool FatVolume::freeChain(uint32_t cluster) { - uint32_t next; + uint32_t next = 0; int8_t fg; do { fg = fatGet(cluster, &next); diff --git a/lib/SdFat/src/SdFat.h b/lib/SdFat/src/SdFat.h index 385e4bb..4b7216f 100644 --- a/lib/SdFat/src/SdFat.h +++ b/lib/SdFat/src/SdFat.h @@ -36,8 +36,8 @@ #include "sdios.h" #endif // INCLUDE_SDIOS //------------------------------------------------------------------------------ -/** SdFat version 1.1.0 */ -#define SD_FAT_VERSION 10100 +/** SdFat version 1.1.2 */ +#define SD_FAT_VERSION 10102 //============================================================================== /** * \class SdBaseFile diff --git a/lib/SdFat/src/SdFatConfig.h b/lib/SdFat/src/SdFatConfig.h index e6f1d85..4394d0a 100644 --- a/lib/SdFat/src/SdFatConfig.h +++ b/lib/SdFat/src/SdFatConfig.h @@ -99,6 +99,8 @@ #elif defined(__arm__) // ARM gcc defines open flags. #define USE_FCNTL_H 1 +#elif defined(ESP32) +#define USE_FCNTL_H 1 #else // defined(__AVR__) #define USE_FCNTL_H 0 #endif // defined(__AVR__) @@ -145,7 +147,7 @@ #endif //------------------------------------------------------------------------------ /** - * Set FAT12_SUPPORT nonzero to enable use if FAT12 volumes. + * Set FAT12_SUPPORT nonzero to enable use of FAT12 volumes. * FAT12 has not been well tested and requires additional flash. */ #define FAT12_SUPPORT 0 diff --git a/lib/SdFat/src/SpiDriver/SdSpiTeensy3.cpp b/lib/SdFat/src/SpiDriver/SdSpiTeensy3.cpp index 02ed2af..d703774 100644 --- a/lib/SdFat/src/SpiDriver/SdSpiTeensy3.cpp +++ b/lib/SdFat/src/SpiDriver/SdSpiTeensy3.cpp @@ -25,7 +25,7 @@ #include "SdSpiDriver.h" #if defined(__arm__) && defined(CORE_TEENSY) // SPI definitions -#include "kinetis.h" +// #include "kinetis.h" //------------------------------------------------------------------------------ void SdSpiAltDriver::activate() { diff --git a/lib/VGMEngine/Bus.cpp b/lib/VGMEngine/Bus.cpp new file mode 100644 index 0000000..4c4bb01 --- /dev/null +++ b/lib/VGMEngine/Bus.cpp @@ -0,0 +1,43 @@ +#include "Bus.h" + + +Bus::Bus(uint8_t _D0, uint8_t _D1, uint8_t _D2, uint8_t _D3, uint8_t _D4, uint8_t _D5, uint8_t _D6, uint8_t _D7) +{ + pins[0] = _D0; + pins[1] = _D1; + pins[2] = _D2; + pins[3] = _D3; + pins[4] = _D4; + pins[5] = _D5; + pins[6] = _D6; + pins[7] = _D7; + prepare(); +} + +Bus::Bus(uint8_t _pins[8]) +{ + memcpy(pins, _pins, sizeof(uint8_t)*8); +} + +//Generic parallel write function. Might be slow on most hardware, but easy to use if you have arb. bus pins +void Bus::write(uint8_t data) +{ + data = ~data; + GPIOB->regs->BSRR = (1U << 8) << (16 * ((data >> 0)&1)); + GPIOB->regs->BSRR = (1U << 9) << (16 * ((data >> 1)&1)); + GPIOC->regs->BSRR = (1U << 13) << (16 * ((data >> 2)&1)); + GPIOC->regs->BSRR = (1U << 14) << (16 * ((data >> 3)&1)); + GPIOC->regs->BSRR = (1U << 15) << (16 * ((data >> 4)&1)); + GPIOA->regs->BSRR = (1U << 0) << (16 * ((data >> 5)&1)); + GPIOA->regs->BSRR = (1U << 1) << (16 * ((data >> 6)&1)); + GPIOA->regs->BSRR = (1U << 2) << (16 * ((data >> 7)&1)); + // for(uint8_t i = 0; i<8; i++) + // digitalWrite(pins[i], ((data >> i)&1)); +} + +void Bus::prepare() +{ + for(uint8_t i=0; i<8; i++) + pinMode(pins[i], OUTPUT); + write(0); +} \ No newline at end of file diff --git a/lib/VGMEngine/Bus.h b/lib/VGMEngine/Bus.h new file mode 100644 index 0000000..ab5e8f0 --- /dev/null +++ b/lib/VGMEngine/Bus.h @@ -0,0 +1,17 @@ +#ifndef _BUS_H_ +#define _BUS_H_ +#include + +class Bus +{ +public: + Bus(uint8_t _D0, uint8_t _D1, uint8_t _D2, uint8_t _D3, uint8_t _D4, uint8_t _D5, uint8_t _D6, uint8_t _D7); + Bus(uint8_t _pins[8]); + void write(uint8_t data); +private: + void prepare(); + uint8_t pins[8]; +}; + + +#endif \ No newline at end of file diff --git a/lib/VGMEngine/DeviceEnable.h b/lib/VGMEngine/DeviceEnable.h new file mode 100644 index 0000000..67d0f2f --- /dev/null +++ b/lib/VGMEngine/DeviceEnable.h @@ -0,0 +1,49 @@ +#ifndef _DEVICE_ENABLE_H_ +#define _DEVICE_ENABLE_H_ + + +#define ENABLE_SN76489 false +#define ENABLE_YM2413 false +#define ENABLE_YM2612 false +#define ENABLE_YM2151 false +#define ENABLE_SEGAPCM false +#define ENABLE_RF5C68 false +#define ENABLE_YM2203 false +#define ENABLE_YM2608 false +#define ENABLE_YM2610 false +#define ENABLE_YM3812 true +#define ENABLE_YM3526 true +#define ENABLE_Y8950 false +#define ENABLE_YMF262 true +#define ENABLE_YMF278B false +#define ENABLE_YMF271 false +#define ENABLE_YMZ280B false +#define ENABLE_RF5C164 false +#define ENABLE_PWM false +#define ENABLE_AY8910 false +#define ENABLE_GAMEBOY false +#define ENABLE_NESAPU false +#define ENABLE_MULTIPCM false +#define ENABLE_UDP7759 false +#define ENABLE_OKIM6258 false +#define ENABLE_OKIM6295 false +#define ENABLE_K051649 false +#define ENABLE_K054539 false +#define ENABLE_HUC6280 false +#define ENABLE_C140 false +#define ENABLE_K053260 false +#define ENABLE_POKEY false +#define ENABLE_QSOUND false +#define ENABLE_SCSP false +#define ENABLE_WONDERSWAN false +#define ENABLE_VSU false +#define ENABLE_SAA1099 false +#define ENABLE_ES5503 false +#define ENABLE_ES5506 false +#define ENABLE_X1010 false +#define ENABLE_C352 false +#define ENABLE_GA20 false + +#define ENABLE_SPIRAM false + +#endif \ No newline at end of file diff --git a/lib/VGMEngine/GD3.cpp b/lib/VGMEngine/GD3.cpp new file mode 100644 index 0000000..e08960f --- /dev/null +++ b/lib/VGMEngine/GD3.cpp @@ -0,0 +1,90 @@ +#include "GD3.h" + +GD3::GD3(){} + +GD3::~GD3() +{ + delete &version; + delete &size; + delete[] data; + delete[] enTrackName; + delete[] jpTrackName; + delete[] enGameName; + delete[] jpGameName; + delete[] enSystemName; + delete[] jpSystemName; + delete[] enAuthor; + delete[] jpAuthor; + delete[] releaseDate; + delete[] converterName; + delete[] notes; +} + +bool GD3::read(File *f, uint32_t gd3Offset) +{ + free(data); + uint32_t prePos = f->curPosition(); + f->seek(gd3Offset); + uint32_t magic = 0; + f->read(&magic, 4); + if(magic != 540238919) //Gd3_ + return false; + f->read(&version, 4); //Version info + f->read(&size, 4); //GD3 size + + //Grab the entire GD3 data block and stash it away + data = (wide*)malloc(sizeof(wide) * (size+1)); + f->read(data, size); + + //You don't need loops, you need line count. That's what gets you hired! + + //This section jumps through the GD3 data block stored above and dots pointers at the start of every substring + uint16_t offset = 0; + uint16_t length = wstrlen(data+offset); + + enTrackName = (wide*)data+offset; + offset += length; + + length = wstrlen(data+offset); + jpTrackName = (wide*)data+offset; + offset += length; + + length = wstrlen(data+offset); + enGameName = (wide*)data+offset; + offset += length; + + length = wstrlen(data+offset); + jpGameName = (wide*)data+offset; + offset += length; + + length = wstrlen(data+offset); + enSystemName = (wide*)data+offset; + offset += length; + + length = wstrlen(data+offset); + jpSystemName = (wide*)data+offset; + offset += length; + + length = wstrlen(data+offset); + enAuthor = (wide*)data+offset; + offset += length; + + length = wstrlen(data+offset); + jpAuthor = (wide*)data+offset; + offset += length; + + length = wstrlen(data+offset); + releaseDate = (wide*)data+offset; + offset += length; + + length = wstrlen(data+offset); + converterName = (wide*)data+offset; + offset += length; + + length = wstrlen(data+offset); + notes = (wide*)data+offset; + offset += length; + + f->seek(prePos); + return true; +} \ No newline at end of file diff --git a/lib/VGMEngine/GD3.h b/lib/VGMEngine/GD3.h new file mode 100644 index 0000000..af261c5 --- /dev/null +++ b/lib/VGMEngine/GD3.h @@ -0,0 +1,34 @@ +#ifndef _GD3_H_ +#define _GD3_H_ +#include +#include +#include +#include "WideStrings.h" + +//GD3 uses wide chars (16-bit chars) + +class GD3 +{ +public: + uint32_t version; + uint32_t size; + wide* data; + wide* enTrackName; + wide* jpTrackName; + wide* enGameName; + wide* jpGameName; + wide* enSystemName; + wide* jpSystemName; + wide* enAuthor; + wide* jpAuthor; + wide* releaseDate; + wide* converterName; + wide* notes; + GD3(); + bool read(File *f, uint32_t gd3Offset); + ~GD3(); +private: +}; + + +#endif \ No newline at end of file diff --git a/src/OPL3.cpp b/lib/VGMEngine/OPL3.cpp similarity index 80% rename from src/OPL3.cpp rename to lib/VGMEngine/OPL3.cpp index d9b00ec..4e4401b 100644 --- a/src/OPL3.cpp +++ b/lib/VGMEngine/OPL3.cpp @@ -6,40 +6,45 @@ union U_32 uint8_t bytes[4]; //0-1 LOW+HIGH, 2-3 EMPTY } port; -void Write(uint8_t data) +void send(uint8_t data) { port.fullWord = GPIOB->regs->ODR; //Grab current state of the port port.bytes[1] = data; //Stuff data byte into section where the 8-bit GPIO data bus is GPIOB->regs->ODR = port.fullWord; //Send it back to the port } -void OPL3::Send(uint8_t addr, uint8_t data, bool setA1) +void OPL3::write(uint8_t addr, uint8_t data, bool setA1) { GPIOC->regs->BSRR = (1U << 14) << (16 * !setA1); //A1 setA1 GPIOC->regs->ODR &= ~(0x2000); //A0 LOW - Write(addr); + nop; + send(addr); GPIOB->regs->ODR &= ~(0x20); //WR LOW GPIOA->regs->ODR |= 0x100; //CS LOW (OPEN_DRAIN : HIGH) delayMicroseconds(2); GPIOB->regs->ODR |= 0x20; //WR HIGH GPIOA->regs->ODR &= ~(0x100); //CS HIGH (OPEN_DRAIN : LOW) GPIOC->regs->ODR |= 0x2000; //A0 HIGH - Write(data); + nop; + send(data); GPIOB->regs->ODR &= ~(0x20); //WR LOW GPIOA->regs->ODR |= 0x100; //CS LOW (OPEN_DRAIN : HIGH) delayMicroseconds(2); GPIOB->regs->ODR |= 0x20; //WR HIGH GPIOA->regs->ODR &= ~(0x100); //CS HIGH (OPEN_DRAIN : LOW) + GPIOC->regs->BSRR = (1U << 14) << (16 * !setA1); //A1 setA1 + GPIOC->regs->ODR &= ~(0x2000); //A0 LOW + delayMicroseconds(5); } - void OPL3::SetOPLMode(bool isOPL3) + void OPL3::setOPLMode(bool isOPL3) { - Reset(); - Send(0x05, isOPL3, 1); //Set the OPL mode. Write 1 to this address for OPL3, 0 for OPL2. + reset(); + write(0x05, isOPL3, 1); //Set the OPL mode. Write 1 to this address for OPL3, 0 for OPL2. delayMicroseconds(5); } -void OPL3::Reset() +void OPL3::reset() { digitalWrite(IC, LOW); delayMicroseconds(100); diff --git a/src/OPL3.h b/lib/VGMEngine/OPL3.h similarity index 69% rename from src/OPL3.h rename to lib/VGMEngine/OPL3.h index a5ceffd..75e825a 100644 --- a/src/OPL3.h +++ b/lib/VGMEngine/OPL3.h @@ -1,6 +1,9 @@ #ifndef __OPL3_H__ #define __OPL3_H__ #include +#include "Bus.h" + +#define nop __asm__ __volatile__ ("nop\n\t") class OPL3 { @@ -10,13 +13,13 @@ class OPL3 uint8_t A0 = PC13; uint8_t A1 = PC14; uint8_t WR = PB5; - + uint32_t clkfrq; public: OPL3(/* args */); ~OPL3(); - void Send(uint8_t addr, uint8_t data, bool setA1); - void SetOPLMode(bool isOPL3); - void Reset(); + void write(uint8_t addr, uint8_t data, bool setA1); + void setOPLMode(bool isOPL3); + void reset(); }; diff --git a/lib/VGMEngine/SerialUtils.cpp b/lib/VGMEngine/SerialUtils.cpp new file mode 100644 index 0000000..b08e023 --- /dev/null +++ b/lib/VGMEngine/SerialUtils.cpp @@ -0,0 +1,23 @@ +#include "SerialUtils.h" + +void BeginSerial(uint32_t baud) +{ + Serial.begin(baud); +} + +void printw(wide* str) +{ + uint16_t size = wstrlen(str); + if(size == 0) + return; + for(int i = 0; i +#include "WideStrings.h" + +void BeginSerial(uint32_t baud); +void printw(wide* str); +void printlnw(wide* str); + +#endif \ No newline at end of file diff --git a/lib/VGMEngine/SpinSleep.h b/lib/VGMEngine/SpinSleep.h new file mode 100644 index 0000000..ab52860 --- /dev/null +++ b/lib/VGMEngine/SpinSleep.h @@ -0,0 +1,37 @@ +#include + +#ifndef _SPIN_SLEEP_H_ +#define _SPIN_SLEEP_H_ + +#define DRIVER_CLOCK_RATE 72000000 + +#define DEMCR (*((volatile uint32_t *)0xE000EDFC)) +#define DWT_CTRL (*(volatile uint32_t *)0xe0001000) +#define CYCCNTENA (1<<0) +#define DWT_CYCCNT ((volatile uint32_t *)0xE0001004) +#define CPU_CYCLES *DWT_CYCCNT +#define DEMCR_TRCENA 0x01000000 + + +inline static void resetSleepSpin() +{ + DEMCR |= DEMCR_TRCENA; + *DWT_CYCCNT = 0; + DWT_CTRL |= CYCCNTENA; +} + +inline static void sleepSpin(uint32_t us) //quick and dirty spin sleep +{ + uint32_t s = CPU_CYCLES; //DWT_CYCCNT + uint32_t c = us*(DRIVER_CLOCK_RATE/1000000); + while (CPU_CYCLES - s < c); +} + +inline void sleepClocks(uint32_t f, uint32_t clks) //same dirty spin sleep, but timed relative to a certain clock freq and number of clocks +{ + uint32_t s = CPU_CYCLES; + uint64_t c = (DRIVER_CLOCK_RATE*(uint64_t)clks)/f; + while (CPU_CYCLES - s < c); +} + +#endif \ No newline at end of file diff --git a/lib/VGMEngine/VGMEngine.cpp b/lib/VGMEngine/VGMEngine.cpp new file mode 100644 index 0000000..e58a0d7 --- /dev/null +++ b/lib/VGMEngine/VGMEngine.cpp @@ -0,0 +1,389 @@ +#include "VGMEngine.h" + +VGMEngineClass::VGMEngineClass() +{ + MegaStream_Create(&stream, buf, VGM_BUF_SIZE); +} +VGMEngineClass::~VGMEngineClass(){} + +bool VGMEngineClass::begin(File *f) +{ + ready = false; + file = f; + if(!header.read(file)) + return false; + gd3.read(file, header.gd3Offset+0x14); + + + if(header.vgmDataOffset == 0) + file->seek(0x40); + else + file->seek(header.vgmDataOffset+0x34); + + if(header.gd3Offset != 0) + { + loopPos = header.gd3Offset+0x14-1; + } + else + { + loopPos = header.EoF+4-1; + } + + chipSetup(); + + #if ENABLE_SPIRAM + ram.Init(); + #endif + + storePCM(true); + pcmBufferPosition = 0; + + waitSamples = 0; + loopCount = 0; + MegaStream_Reset(&stream); + load(); + ready = true; + return true; +} + +uint8_t empty = 0; +uint8_t VGMEngineClass::readBufOne() +{ + if(MegaStream_Used(&stream) < 1) + { + //digitalWrite(PA8, HIGH); + load(); + empty = 1; + } + uint8_t b[1]; + MegaStream_Recv(&stream, b, 1); + return b[0]; +} + +uint16_t VGMEngineClass::readBuf16() +{ + if(MegaStream_Used(&stream) < 2) + { + //digitalWrite(PA8, HIGH); + load(); + empty = 16; + } + uint16_t d; + uint8_t b[2]; + MegaStream_Recv(&stream, b, 2); + d = uint16_t(b[0] + (b[1] << 8)); + return d; +} + +uint32_t VGMEngineClass::readBuf32() +{ + if(MegaStream_Used(&stream) < 4) + { + //digitalWrite(PA8, HIGH); + load(); + empty = 32; + } + uint32_t d; + uint8_t b[4]; + MegaStream_Recv(&stream, b, 4); + d = uint32_t(b[0] + (b[1] << 8) + (b[2] << 16) + (b[3] << 24)); + return d; +} + +bool VGMEngineClass::topUp() +{ + if(MegaStream_Free(&stream) == 0) + return true; + byte b = file->read(); + MegaStream_Send(&stream, &b, 1); + return false; +} + +bool VGMEngineClass::storePCM(bool skip) +{ + bool isPCM = false; + if(file->peek() == 0x67) //PCM Block + { + isPCM = true; + //Serial.println("pcm"); + file->read(); //0x67 + file->read(); //0x66 + file->read(); //datatype + uint32_t pcmSize = 0; + file->read(&pcmSize, 4); //PCM chunk size + if(skip) //On loop, you'll want to just skip the PCM block since it's already loaded. + { + file->seekCur(pcmSize); + return false; + } + if(pcmSize > MAX_PCM_BUFFER_SIZE) + { + return true; //todo: Error out here or go to next track. return is temporary + } + else + { + for(uint32_t i = 0; iread()); + #endif + } + } + } + return isPCM; +} + +bool VGMEngineClass::load(bool singleChunk) +{ + const uint16_t MAX_CHUNK_SIZE = 512; + int32_t space = MegaStream_Free(&stream); + if(space == 0) + return true; + bool didSingleChunk = false; + uint8_t chunk[MAX_CHUNK_SIZE]; + while(MegaStream_Free(&stream) != 0 || didSingleChunk) //Fill up the entire buffer, or only grab a single chunk quickly + { + bool hitLoop = false; + uint16_t chunkSize = min(space, MAX_CHUNK_SIZE); //Who's smaller, the space left in the buffer or the maximum chunk size? + + if(file->position() + chunkSize >= loopPos+1) //Loop code. A bit of math to see where the file pointer is. If it goes over the 0x66 position, we'll set a flag to move the file pointer to the loop point and adjust the chunk as to not grab data past the 0x66 + { + chunkSize = loopPos+1 - file->position(); //+1 on loopPos is to make sure we include the 0x66 command in the buffer in order for loop-triggered events to work. + hitLoop = true; + } + + space -= chunkSize; //Reduce space by the chunkSize, then read from the SD card into the chunk. Send chunk to buffer. + file->read(chunk, chunkSize); + MegaStream_Send(&stream, chunk, chunkSize); + if(hitLoop) //Here is where we reset the file pointer back to the loop point + { + if(header.loopOffset !=0) + file->seek(header.loopOffset+0x1C); + else + { + if(header.vgmDataOffset == 0) + file->seek(0x40); + else + file->seek(header.vgmDataOffset+0x34); + storePCM(true); + } + } + if(space <= 0) //No more space in the buffer? Just eject. + return true; + if(singleChunk) //Only want to grab a single chunk instead of filling the entire buffer? Set this flag. + didSingleChunk = true; + } + //NOTE, Loop (0x66) will ALWAYS be (Gd3 offset - 1) OR (EoF offset - 1) if there is no Gd3 data + return false; +} + +void VGMEngineClass::chipSetup() +{ + #if ENABLE_SN76489 + //sn76489->setClock(header.sn76489Clock); + ltcSN.SetFrequency(header.sn76489Clock); + delay(10); + sn76489->reset(); + #endif + #if ENABLE_YM2612 + //ym2612->setClock(header.ym2612Clock); + ltcOPN.SetFrequency(header.ym2612Clock); + delay(10); + ym2612->reset(); + #endif + #if ENABLE_YM3526 || ENABLE_YM3812 || ENABLE_YMF262 + if(header.ym3526clock > 0) + { + setClock(header.ym3526clock); + opl3->setOPLMode(0); //OPL1 and 2 mode + } + else if(header.ym3812clock > 0) + { + setClock(header.ym3812clock); + opl3->setOPLMode(0); //OPL1 and 2 mode + } + else if(header.ymf262clock > 0) + { + setClock(header.ymf262clock); + opl3->setOPLMode(1); //OPL3 mode + } + + #endif +} + +void VGMEngineClass::tick() +{ + if(!ready) + return; + waitSamples--; +} + +bool VGMEngineClass::play() +{ + load(); + while(waitSamples <= 0) + { + waitSamples += parseVGM(); + } + if(loopCount == maxLoops) + return true; + return false; +} + +uint16_t VGMEngineClass::getLoops() +{ + return loopCount; +} + +uint16_t VGMEngineClass::parseVGM() +{ + uint8_t cmd; + //ready = false; + while(true) + { + cmd = readBufOne(); + switch(cmd) + { + case 0x4F: + #if ENABLE_SN76489 + sn76489->write(0x06); + sn76489->write(readBufOne()); + #endif + break; + case 0x50: + #if ENABLE_SN76489 + sn76489->write(readBufOne()); + #endif + break; + case 0x52: + #if ENABLE_YM2612 + ym2612->write(readBufOne(), readBufOne(), 0); + #endif + break; + case 0x53: + #if ENABLE_YM2612 + ym2612->write(readBufOne(), readBufOne(), 1); + #endif + break; + case 0x5A: + #if ENABLE_YM3812 + opl3->write(readBufOne(), readBufOne(), 0); + #endif + break; + case 0x5B: + #if ENABLE_YM3526 + opl3->write(readBufOne(), readBufOne(), 0); + #endif + break; + case 0x5E: + #if ENABLE_YMF262 + opl3->write(readBufOne(), readBufOne(), 0); + #endif + break; + case 0x5F: + #if ENABLE_YMF262 + opl3->write(readBufOne(), readBufOne(), 1); + #endif + break; + case 0x61: + return readBuf16(); + case 0x62: + return 735; + case 0x63: + return 882; + case 0x67: + { + //who puttin' 0x67's in MUH stream? + Serial.println("0x67 PCM STORE command encountered mid stream"); + break; + } + case 0x70: + case 0x71: + case 0x72: + case 0x73: + case 0x74: + case 0x75: + case 0x76: + case 0x77: + case 0x78: + case 0x79: + case 0x7A: + case 0x7B: + case 0x7C: + case 0x7D: + case 0x7E: + case 0x7F: + return (cmd & 0x0F)+1; + case 0x80: + case 0x81: + case 0x82: + case 0x83: + case 0x84: + case 0x85: + case 0x86: + case 0x87: + case 0x88: + case 0x89: + case 0x8A: + case 0x8B: + case 0x8C: + case 0x8D: + case 0x8E: + case 0x8F: + { + #if ENABLE_YM2612 + ym2612->write(0x2A, ram.ReadByte(pcmBufferPosition++), 0); + #endif + + uint8_t wait = (cmd & 0x0F); + if(wait == 0) + break; + else + return wait; + } + case 0xE0: + pcmBufferPosition = readBuf32(); + break; + case 0x66: + { + //Loop + loopCount++; + return 0; + } + + break; + + //Things to ignore + case 0xB5: //Ignore common secondary PCM chips + case 0xB6: + case 0xB7: + case 0xB8: + case 0xB9: + case 0xBA: + case 0xBB: + case 0xBC: + case 0xBD: + case 0xBE: + case 0xBF: + readBuf16(); + break; + case 0xC0: //Ignore SegaPCM: + case 0xC1: + case 0xC2: + case 0xC3: + readBufOne();readBufOne();readBufOne(); + break; + case 0xD4: + readBufOne();readBufOne();readBufOne(); + break; + + + default: + Serial.print("E:"); Serial.println(cmd, HEX); + return 0; + } + } +} + +VGMEngineClass VGMEngine; \ No newline at end of file diff --git a/lib/VGMEngine/VGMEngine.h b/lib/VGMEngine/VGMEngine.h new file mode 100644 index 0000000..ec66eba --- /dev/null +++ b/lib/VGMEngine/VGMEngine.h @@ -0,0 +1,107 @@ +#ifndef _VGM_ENGINE_H_ +#define _VGM_ENGINE_H_ + +#include "DeviceEnable.h" //YOU MUST ENABLE EVERY DEVICE YOU PLAN TO USE FIRST! + +#include "VGMHeader.h" +#include "megastream.h" +#include "GD3.h" +#include "OPL3.h" + +#define min(a,b) ((a) < (b) ? (a) : (b)) +#define OPL_DEFAULT_CLOCK 14318180 +#define NTSC_COLORBURST 3579545 +#define MAX_PCM_BUFFER_SIZE 0 + +class VGMEngineClass +{ +public: + VGMEngineClass(); + ~VGMEngineClass(); + bool begin(File *f); + VGMHeader header; + GD3 gd3; + #if ENABLE_YM3526 || ENABLE_YM3812 || ENABLE_YMF262 + OPL3 * opl3; + #endif + bool load(bool singleChunk = false); + void tick(); + bool play(); + uint16_t getLoops(); + uint16_t maxLoops = 3; + bool resetISR = false; + +private: + File* file; + static const uint32_t VGM_BUF_SIZE = 8192; + volatile int32_t waitSamples = 0; + volatile bool ready = false; + bool bufLock = false; + uint32_t pcmBufferPosition = 0; + uint32_t loopPos = 0; //The location of the 0x66 command + uint16_t loopCount = 0; + MegaStreamContext_t stream; + uint8_t buf[VGM_BUF_SIZE]; + uint8_t readBufOne(); + uint16_t readBuf16(); + uint32_t readBuf32(); + + //void setClocks(); + void chipSetup(); + bool storePCM(bool skip = false); + bool topUp(); + uint16_t parseVGM(); +}; + +//<3 natalie +const static unsigned char CommandLengthLUT[256] = { + /*0 1 2 3 4 5 6 7 8 9 a b c d e f*/ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //0x00 + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //0x10 + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //0x20 + 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, //0x30 + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, //0x40 + 2, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, //0x50 + 0, 3, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, //0x60 + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, //0x70 + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, //0x80 + 5, 5, 6,11, 2, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //0x90 + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, //0xa0 + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, //0xb0 + 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, //0xc0 + 4, 4, 4, 4, 4, 4, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, //0xd0 + 5, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //0xe0 + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //0xf0 +}; + +inline uint8_t VgmCommandLength(uint8_t Command) //including the command itself. only for fixed size commands +{ + //Also natalie, tyvm + uint8_t val = CommandLengthLUT[Command]; + if (val) return val; + return 0xFF; +} + +extern VGMEngineClass VGMEngine; + +inline static void setClock(uint32_t frq) //Temporary until I find a better solutions for various clock chips/timers +{ + uint8_t tArr = 0; + if(frq == 0 || frq == OPL_DEFAULT_CLOCK || frq == NTSC_COLORBURST) + { + tArr = 4; + } + else //Adjust the OPL3 clock in proportion to OPL1/2 soundchips that have clock rates other than colorburst + { + double targetClock = 0; + targetClock = (double)frq / (double)NTSC_COLORBURST; + targetClock *= OPL_DEFAULT_CLOCK; + targetClock = F_CPU / (targetClock-1); + tArr = (uint8_t)round(targetClock); + } + + TIMER2_BASE->ARR = tArr; // Set Auto reload value + TIMER2_BASE->PSC = 0; // Set Prescalar value +} + +#endif \ No newline at end of file diff --git a/lib/VGMEngine/VGMHeader.cpp b/lib/VGMEngine/VGMHeader.cpp new file mode 100644 index 0000000..e0bbf72 --- /dev/null +++ b/lib/VGMEngine/VGMHeader.cpp @@ -0,0 +1,74 @@ +#include "VGMHeader.h" + +VGMHeader::VGMHeader(){} + +bool VGMHeader::read(File *f) +{ + f->read(&indent, 4); + f->read(&EoF, 4); + f->read(&version, 4); + f->read(&sn76489Clock, 4); + f->read(&ym2413Clock, 4); + f->read(&gd3Offset, 4); + f->read(&totalSamples, 4); + f->read(&loopOffset, 4); + f->read(&loopNumSamples, 4); + f->read(&rate, 4); + f->read(&snX, 4); + f->read(&ym2612Clock, 4); + f->read(&ym2151Clock, 4); + f->read(&vgmDataOffset, 4); + f->read(&segaPCMClock, 4); + f->read(&spcmInterface, 4); + f->read(&rf5C68clock, 4); + f->read(&ym2203clock, 4); + f->read(&ym2608clock, 4); + f->read(&ym2610clock, 4); + f->read(&ym3812clock, 4); + f->read(&ym3526clock, 4); + f->read(&y8950clock, 4); + f->read(&ymf262clock, 4); + f->read(&ymf278bclock, 4); + f->read(&ymf271clock, 4); + f->read(&ymz280Bclock, 4); + f->read(&rf5C164clock, 4); + f->read(&pwmclock, 4); + f->read(&ay8910clock, 4); + f->read(&ayclockflags, 4); + f->read(&vmlblm, 4); + f->read(&gbdgmclock, 4); + f->read(&nesapuclock, 4); + f->read(&multipcmclock, 4); + f->read(&upd7759clock, 4); + f->read(&okim6258clock, 4); + f->read(&ofkfcf, 4); + f->read(&okim6295clock, 4); + f->read(&k051649clock, 4); + f->read(&k054539clock, 4); + f->read(&huc6280clock, 4); + f->read(&c140clock, 4); + f->read(&k053260clock, 4); + f->read(&pokeyclock, 4); + f->read(&qsoundclock, 4); + f->read(&scspclock, 4); + f->read(&extrahdrofs, 4); + f->read(&wonderswanclock, 4); + f->read(&vsuClock, 4); + f->read(&saa1099clock, 4); + f->read(&es5503clock, 4); + f->read(&es5506clock, 4); + f->read(&eschcdxx, 4); + f->read(&x1010clock, 4); + f->read(&c352clock, 4); + f->read(&ga20clock, 4); + + f->seek(0); //Return back to start of file + return vgmVerify(); +} + +bool VGMHeader::vgmVerify() +{ + return indent == 0x206D6756; +} + +VGMHeader::~VGMHeader(){} \ No newline at end of file diff --git a/lib/VGMEngine/VGMHeader.h b/lib/VGMEngine/VGMHeader.h new file mode 100644 index 0000000..7cbb3d5 --- /dev/null +++ b/lib/VGMEngine/VGMHeader.h @@ -0,0 +1,76 @@ +#ifndef _VGM_HEADER_H_ +#define _VGM_HEADER_H_ +#include +#include +#include + +class VGMHeader +{ +public: + VGMHeader(); + ~VGMHeader(); + bool read(File *f); + uint32_t indent; + uint32_t EoF; + uint32_t version; + uint32_t sn76489Clock; + uint32_t ym2413Clock; + uint32_t gd3Offset; + uint32_t totalSamples; + uint32_t loopOffset; + uint32_t loopNumSamples; + uint32_t rate; + uint32_t snX; + uint32_t ym2612Clock; + uint32_t ym2151Clock; + uint32_t vgmDataOffset; + uint32_t segaPCMClock; + uint32_t spcmInterface; + uint32_t rf5C68clock; + uint32_t ym2203clock; + uint32_t ym2608clock; + uint32_t ym2610clock; + uint32_t ym3812clock; + uint32_t ym3526clock; + uint32_t y8950clock; + uint32_t ymf262clock; + uint32_t ymf278bclock; + uint32_t ymf271clock; + uint32_t ymz280Bclock; + uint32_t rf5C164clock; + uint32_t pwmclock; + uint32_t ay8910clock; + uint32_t ayclockflags; + uint32_t vmlblm; + uint32_t gbdgmclock; + uint32_t nesapuclock; + uint32_t multipcmclock; + uint32_t upd7759clock; + uint32_t okim6258clock; + uint32_t ofkfcf; + uint32_t okim6295clock; + uint32_t k051649clock; + uint32_t k054539clock; + uint32_t huc6280clock; + uint32_t c140clock; + uint32_t k053260clock; + uint32_t pokeyclock; + uint32_t qsoundclock; + uint32_t scspclock; + uint32_t extrahdrofs; + uint32_t wonderswanclock; + uint32_t vsuClock; + uint32_t saa1099clock; + uint32_t es5503clock; + uint32_t es5506clock; + uint32_t eschcdxx; + uint32_t x1010clock; + uint32_t c352clock; + uint32_t ga20clock; +private: + bool vgmVerify(); +}; + + + +#endif \ No newline at end of file diff --git a/lib/VGMEngine/WideStrings.cpp b/lib/VGMEngine/WideStrings.cpp new file mode 100644 index 0000000..ade5f3d --- /dev/null +++ b/lib/VGMEngine/WideStrings.cpp @@ -0,0 +1,26 @@ +#include "WideStrings.h" + +unsigned short wstrlen(wide *in) +{ + unsigned short i = 0; + while(in[i].wchar != 0x0000) //0x0000 represents terminator + { + i++; + } + return i+1; +} + +char* widetochar(wide* in) +{ + free(OUTPUT_WIDE_TO_CHAR); + unsigned short size = wstrlen(in); + if(size == 0) + return 0; + OUTPUT_WIDE_TO_CHAR = (char*)malloc(sizeof(char) * (size)); + for(int i = 0; i + +//wchar_t types allocate as 32 bits, which throws things off a little. +//So, we'll just use this union to make our own custom wide char type. +union wide +{ + char bytes[2]; + unsigned short wchar; +}; + +//Iterates through wide string pointer until function hits 0x0000 (Terminator) +unsigned short wstrlen(wide *in); +//Converts wide chars to standard chars. GD3 specific, not for general usage. +char* widetochar(wide* in); +static char* OUTPUT_WIDE_TO_CHAR; + +#endif \ No newline at end of file diff --git a/platformio.ini b/platformio.ini index 94888c0..16f1752 100644 --- a/platformio.ini +++ b/platformio.ini @@ -8,19 +8,12 @@ ; Please visit documentation for the other options and examples ; https://docs.platformio.org/page/projectconf.html - - [env:genericSTM32F103C8] platform = https://github.com/platformio/platform-ststm32.git board = genericSTM32F103C8 framework = arduino debug_tool = stlink upload_protocol = serial -;upload_protocol = stlink - -; [env:bluepill_f103c8] -; platform = ststm32 -; board = bluepill_f103c8 -; framework = arduino -; debug_tool = stlink -; upload_protocol = stlink +board_build.core = maple +;upload_port = COM6 +lib_deps = olikraus/U8g2@^2.28.8 diff --git a/src/TrackStructs.h b/src/TrackStructs.h index b8357c2..15e6826 100644 --- a/src/TrackStructs.h +++ b/src/TrackStructs.h @@ -1,136 +1,8 @@ #ifndef TRACKSTRUCTS_H_ #define TRACKSTRUCTS_H_ #include -struct VGMHeader -{ - uint32_t indent; - uint32_t EoF; - uint32_t version; - uint32_t sn76489Clock; - uint32_t ym2413Clock; - uint32_t gd3Offset; - uint32_t totalSamples; - uint32_t loopOffset; - uint32_t loopNumSamples; - uint32_t rate; - uint32_t snX; - uint32_t ym2612Clock; - uint32_t ym2151Clock; - uint32_t vgmDataOffset; - uint32_t segaPCMClock; - uint32_t spcmInterface; - uint32_t rf5C68clock; - uint32_t ym2203clock; - uint32_t ym2608clock; - uint32_t ym2610clock; - uint32_t ym3812clock; - uint32_t ym3526clock; - uint32_t y8950clock; - uint32_t ymf262clock; - uint32_t ymf271clock; - uint32_t ymz280Bclock; - uint32_t rf5C164clock; - uint32_t pwmclock; - uint32_t ay8910clock; - uint32_t ayclockflags; - uint32_t vmlblm; - uint32_t gbdgmclock; - uint32_t nesapuclock; - uint32_t multipcmclock; - uint32_t upd7759clock; - uint32_t okim6258clock; - uint32_t ofkfcf; - uint32_t okim6295clock; - uint32_t k051649clock; - uint32_t k054539clock; - uint32_t huc6280clock; - uint32_t c140clock; - uint32_t k053260clock; - uint32_t pokeyclock; - uint32_t qsoundclock; - uint32_t scspclock; - uint32_t extrahdrofs; - uint32_t wonderswanclock; - uint32_t vsuClock; - uint32_t saa1099clock; - - void Reset() - { - indent = 0; - EoF = 0; - version = 0; - sn76489Clock = 0; - ym2413Clock = 0; - gd3Offset = 0; - totalSamples = 0; - loopOffset = 0; - loopNumSamples = 0; - rate = 0; - snX = 0; - ym2612Clock = 0; - ym2151Clock = 0; - vgmDataOffset = 0; - segaPCMClock = 0; - spcmInterface = 0; - rf5C68clock = 0; - ym2203clock = 0; - ym2608clock = 0; - ym2610clock = 0; - ym3812clock = 0; - ym3526clock = 0; - y8950clock = 0; - ymf262clock = 0; - ymf271clock = 0; - ymz280Bclock = 0; - rf5C164clock = 0; - pwmclock = 0; - ay8910clock = 0; - ayclockflags = 0; - vmlblm = 0; - gbdgmclock = 0; - nesapuclock = 0; - multipcmclock = 0; - upd7759clock = 0; - okim6258clock = 0; - ofkfcf = 0; - okim6295clock = 0; - k051649clock = 0; - k054539clock = 0; - huc6280clock = 0; - c140clock = 0; - k053260clock = 0; - pokeyclock = 0; - qsoundclock = 0; - scspclock = 0; - extrahdrofs = 0; - wonderswanclock = 0; - vsuClock = 0; - saa1099clock = 0; - } -}; - -struct GD3 -{ - uint32_t size; - String enTrackName; - String enGameName; - String enSystemName; - String enAuthor; - String releaseDate; - void Reset() - { - size = 0; - enTrackName = ""; - enGameName = ""; - enSystemName = ""; - enAuthor = ""; - releaseDate = ""; - } -}; enum FileStrategy {FIRST_START, NEXT, PREV, RND, REQUEST}; enum PlayMode {LOOP, PAUSE, SHUFFLE, IN_ORDER}; -static VGMHeader header; -static GD3 gd3; static PlayMode playMode; #endif \ No newline at end of file diff --git a/src/main.cpp b/src/main.cpp index 9998684..4d69181 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -1,11 +1,11 @@ #include #include -#include "OPL3.h" #include #include "SdFat.h" #include #include "TrackStructs.h" -#include "ringbuffer.h" +#include "SerialUtils.h" +#include "VGMEngine.h" //Debug variables //REMOVE IN PCB VERSION @@ -13,38 +13,22 @@ //REMOVE IN PCB VERSION #define DEBUG false //Set this to true for a detailed printout of the header data & any errored command bytes #define DEBUG_LED PC15 -bool commandFailed = false; -uint8_t failedCmd = 0x00; //Prototypes void setup(); void loop(); -void setClock(uint32_t frq); +//void setClock(uint32_t frq); void handleSerialIn(); void tick(); void removeMeta(); -void prebufferLoop(); -void injectPrebuffer(); -void fillBuffer(); -bool topUpBuffer(); -void clearBuffers(); -//void handleButtons(); -void prepareChips(); -void readGD3(); +void handleButtons(); void startISR(); +void pauseISR(); void drawOLEDTrackInfo(); bool startTrack(FileStrategy fileStrategy, String request = ""); -bool vgmVerify(); -uint8_t readBuffer(); -uint16_t readBuffer16(); -uint32_t readBuffer32(); -uint32_t readSD32(); -uint16_t parseVGM(); - -//Sound Chips -#define OPL_DEFAULT_CLOCK 14318180 -#define NTSC_COLORBURST 3579545 -OPL3 opl; + +//Sound Chip +OPL3 opl3; //Pins are already self-contained in this driver class. //SD & File Streaming SdFat SD; @@ -54,13 +38,6 @@ char fileName[MAX_FILE_NAME_SIZE]; uint32_t numberOfFiles = 0; uint32_t currentFileNumber = 0; -//Buffers -#define CMD_BUFFER_SIZE 8192 -#define LOOP_PREBUF_SIZE 512 -typedef ringbuffer_t RingBuffer; -static RingBuffer cmdBuffer; -uint8_t loopPreBuffer[LOOP_PREBUF_SIZE]; - //Counters uint32_t bufferPos = 0; uint32_t cmdPos = 0; @@ -70,7 +47,7 @@ uint16_t waitSamples = 0; uint16_t loopCount = 0; const uint8_t maxLoops = 3; bool fetching = false; -volatile bool ready = false; +bool trackError = false; //PlayMode playMode = PlayMode::IN_ORDER; //IO @@ -80,13 +57,13 @@ const uint8_t rand_btn = PB1; const uint8_t option_btn = PB4; //OLED -U8G2_SSD1306_128X32_UNIVISION_F_HW_I2C u8g2(U8G2_R0); +U8G2_SSD1306_128X32_UNIVISION_F_SW_I2C u8g2(U8G2_R0, PB6, PB7, U8X8_PIN_NONE); //SW I2C for now, HW seems to have a bug that crashes the unit bool isOledOn = true; void setup() { //init watchdog timer to reset on crash - iwdg_init(IWDG_PRE_32, INT16_MAX); + //iwdg_init(IWDG_PRE_32, INT16_MAX); //For breadboard prototypes only. //Use ENABLE_DEBUG_PORT_PIN as a jumper to enable and disable the SWD pins @@ -114,6 +91,10 @@ void setup() TIMER2_BASE->CCR2 = 2; // SET duty cycle to 50% setClock(OPL_DEFAULT_CLOCK); + + //Set Chips + VGMEngine.opl3 = &opl3; + playMode = PlayMode::SHUFFLE; delay(100); @@ -166,42 +147,17 @@ void setup() countFile.close(); SD.vwd()->rewind(); - //44.1KHz tick - startISR(); - //Begin startTrack(FIRST_START); - vgmVerify(); - prepareChips(); } -void setClock(uint32_t frq) -{ - uint8_t tArr = 0; - if(frq == 0 || frq == OPL_DEFAULT_CLOCK || frq == NTSC_COLORBURST) - { - tArr = 4; - } - else //Adjust the OPL3 clock in proportion to OPL1/2 soundchips that have clock rates other than colorburst - { - double targetClock = 0; - targetClock = (double)frq / (double)NTSC_COLORBURST; - targetClock *= OPL_DEFAULT_CLOCK; - targetClock = F_CPU / (targetClock-1); - tArr = (uint8_t)round(targetClock); - } - - TIMER2_BASE->ARR = tArr; // Set Auto reload value - TIMER2_BASE->PSC = 0; // Set Prescalar value -} - -void stopISR() +void pauseISR() { Timer4.pause(); Timer4.refresh(); } -void startISR() +void setISR() { Timer4.pause(); Timer4.setPrescaleFactor(1); @@ -219,15 +175,13 @@ void drawOLEDTrackInfo() u8g2.setPowerSave(0); u8g2.setFont(u8g2_font_helvR08_tf); u8g2.clearBuffer(); - char *cstr = &gd3.enTrackName[0u]; - u8g2.drawStr(0,9, cstr); - cstr = &gd3.enGameName[0u]; - u8g2.drawStr(0,22, cstr); + u8g2.drawStr(0,9, widetochar(VGMEngine.gd3.enTrackName)); + u8g2.drawStr(0,22, widetochar(VGMEngine.gd3.enGameName)); u8g2.setFont(u8g2_font_micro_tr); - if(playMode == LOOP) + if(playMode == PlayMode::LOOP) u8g2.drawStr(0,32, "LOOP"); - else if(playMode == SHUFFLE) + else if(playMode == PlayMode::SHUFFLE) u8g2.drawStr(0,32, "SHUFFLE"); else u8g2.drawStr(0,32, "IN ORDER"); @@ -240,32 +194,10 @@ void drawOLEDTrackInfo() u8g2.sendBuffer(); } -void prepareChips() -{ - if(header.ym3526clock > 0) - { - setClock(header.ym3526clock); - Serial.println("OPL1 MODE"); - opl.SetOPLMode(0); //OPL1 and 2 mode - } - else if(header.ym3812clock > 0) - { - setClock(header.ym3812clock); - Serial.println("OPL2 MODE"); - opl.SetOPLMode(0); //OPL1 and 2 mode - } - else if(header.ymf262clock > 0) - { - setClock(OPL_DEFAULT_CLOCK); - Serial.println("OPL3 MODE"); - opl.SetOPLMode(1); //OPL3 mode - } -} - //Mount file and prepare for playback. Returns true if file is found. bool startTrack(FileStrategy fileStrategy, String request) { - ready = false; + pauseISR(); File nextFile; memset(fileName, 0x00, MAX_FILE_NAME_SIZE); @@ -346,244 +278,55 @@ bool startTrack(FileStrategy fileStrategy, String request) break; case REQUEST: { - SD.vwd()->rewind(); - bool fileFound = false; - Serial.print("REQUEST: ");Serial.println(request); - for(uint32_t i = 0; i 0x151) { - header.gbdgmclock = readBuffer32(); - header.nesapuclock = readBuffer32(); - header.multipcmclock = readBuffer32(); - header.upd7759clock = readBuffer32(); - header.okim6258clock = readBuffer32(); - header.ofkfcf = readBuffer32(); - header.okim6295clock = readBuffer32(); - header.k051649clock = readBuffer32(); - header.k054539clock = readBuffer32(); - header.huc6280clock = readBuffer32(); - header.c140clock = readBuffer32(); - header.k053260clock = readBuffer32(); - header.pokeyclock = readBuffer32(); - header.qsoundclock = readBuffer32(); - header.scspclock = readBuffer32(); - header.extrahdrofs = readBuffer32(); - header.wonderswanclock = readBuffer32(); - header.vsuClock = readBuffer32(); - header.saa1099clock = readBuffer32(); - } - - #if DEBUG - Serial.print("Indent: 0x"); Serial.println(header.indent, HEX); - Serial.print("EoF: 0x"); Serial.println(header.EoF, HEX); - Serial.print("Version: 0x"); Serial.println(header.version, HEX); - Serial.print("SN Clock: "); Serial.println(header.sn76489Clock); - Serial.print("YM2413 Clock: "); Serial.println(header.ym2413Clock); - Serial.print("GD3 Offset: 0x"); Serial.println(header.gd3Offset, HEX); - Serial.print("Total Samples: "); Serial.println(header.totalSamples); - Serial.print("Loop Offset: 0x"); Serial.println(header.loopOffset, HEX); - Serial.print("Loop # Samples: "); Serial.println(header.loopNumSamples); - Serial.print("Rate: "); Serial.println(header.rate); - Serial.print("SN etc.: 0x"); Serial.println(header.snX, HEX); - Serial.print("YM2612 Clock: "); Serial.println(header.ym2612Clock); - Serial.print("YM2151 Clock: "); Serial.println(header.ym2151Clock); - Serial.print("VGM data Offset: 0x"); Serial.println(header.vgmDataOffset, HEX); - Serial.print("SPCM Interface: 0x"); Serial.println(header.spcmInterface, HEX); - Serial.println("..."); - Serial.print("YM3812 Clock: 0x"); Serial.println(header.ym3812clock, HEX); - Serial.print("YMF262clock Clock: 0x"); Serial.println(header.ymf262clock, HEX); - Serial.print("SAA1099 Clock: 0x"); Serial.println(header.saa1099clock, HEX); - #endif - - //Jump to VGM data start and compute loop location - if(header.vgmDataOffset == 0x0C) - header.vgmDataOffset = 0x40; - else - header.vgmDataOffset += 0x34; - - if(header.vgmDataOffset != 0x40) - { - for(uint32_t i = 0x40; irewind(); } -//Keep a small cache of commands right at the loop point to prevent excessive SD seeking lag -void prebufferLoop() -{ - uint32_t prevPos = file.curPosition(); - file.seekSet(header.loopOffset); - file.readBytes(loopPreBuffer, LOOP_PREBUF_SIZE); - file.seekSet(prevPos); - #if DEBUG - Serial.print("FIRST LOOP BYTE: "); Serial.println(loopPreBuffer[0], HEX); - #endif -} - -//On loop, inject the small prebuffer back into the main ring buffer -void injectPrebuffer() -{ - for(int i = 0; i= file.size()) - return true; - fetching = true; - cmdBuffer.push_back_nc(file.read()); - bufferPos = 0; - fetching = false; - return false; -} - -void clearBuffers() -{ - bufferPos = 0; - cmdBuffer.clear(); -} - -uint8_t readBuffer() -{ - if(cmdBuffer.empty()) //Buffer exauhsted prematurely. Force replenish - { - topUpBuffer(); - } - bufferPos++; - cmdPos++; - return cmdBuffer.pop_front_nc(); -} - -uint16_t readBuffer16() -{ - uint16_t d; - byte v0 = readBuffer(); - byte v1 = readBuffer(); - d = uint16_t(v0 + (v1 << 8)); - bufferPos+=2; - cmdPos+=2; - return d; -} - -uint32_t readBuffer32() -{ - uint32_t d; - byte v0 = readBuffer(); - byte v1 = readBuffer(); - byte v2 = readBuffer(); - byte v3 = readBuffer(); - d = uint32_t(v0 + (v1 << 8) + (v2 << 16) + (v3 << 24)); - bufferPos+=4; - cmdPos+=4; - return d; -} - -//Read 32 bits right off of the SD card. -uint32_t readSD32() -{ - uint32_t d; - byte v[4]; - file.readBytes(v, 4); - d = uint32_t(v[0] + (v[1] << 8) + (v[2] << 16) + (v[3] << 24)); - return d; -} - //Count at 44.1KHz void tick() { - if(!ready || cmdBuffer.empty()) - return; - if(waitSamples > 0) - waitSamples--; -} - -//Execute next VGM command set. Return back wait time in samples -uint16_t parseVGM() -{ - uint8_t cmd = readBuffer(); - switch(cmd) - { - case 0x5A: - case 0x5B: - case 0x5E: - { - uint8_t a = readBuffer(); - uint8_t d = readBuffer(); - opl.Send(a, d, 0); - return 1; - } - case 0x5F: - { - uint8_t a = readBuffer(); - uint8_t d = readBuffer(); - opl.Send(a, d, 1); - return 1; - } - case 0x61: - return readBuffer16(); - case 0x62: - return 735; - case 0x63: - return 882; - case 0x70: - case 0x71: - case 0x72: - case 0x73: - case 0x74: - case 0x75: - case 0x76: - case 0x77: - case 0x78: - case 0x79: - case 0x7A: - case 0x7B: - case 0x7C: - case 0x7D: - case 0x7E: - case 0x7F: - { - return (cmd & 0x0F)+1; - } - case 0x66: - { - ready = false; - clearBuffers(); - cmdPos = 0; - injectPrebuffer(); - loopCount++; - ready = true; - } - return 0; - default: - commandFailed = true; - failedCmd = cmd; - return 0; - } - return 0; + VGMEngine.tick(); } -//Poll the Serial2 port +//Poll the serial port void handleSerialIn() { - bool newTrack = false; while(Serial.available()) { - char Serial2Cmd = Serial.read(); - switch(Serial2Cmd) + pauseISR(); + char serialCmd = Serial.read(); + switch(serialCmd) { case '+': - newTrack = startTrack(NEXT); + startTrack(NEXT); break; case '-': - newTrack = startTrack(PREV); + startTrack(PREV); break; case '*': - newTrack = startTrack(RND); + startTrack(RND); break; case '/': - playMode = PlayMode::SHUFFLE; + playMode = SHUFFLE; drawOLEDTrackInfo(); break; case '.': - playMode = PlayMode::LOOP; + playMode = LOOP; drawOLEDTrackInfo(); break; case '?': - Serial.println(gd3.enGameName); - Serial.println(gd3.enTrackName); - Serial.println(gd3.enSystemName); - Serial.println(gd3.releaseDate); - Serial.print("Version: "); Serial.println(header.version, HEX); + printlnw(VGMEngine.gd3.enGameName); + printlnw(VGMEngine.gd3.enTrackName); + printlnw(VGMEngine.gd3.enSystemName); + printlnw(VGMEngine.gd3.releaseDate); break; case '!': - + isOledOn = !isOledOn; + drawOLEDTrackInfo(); break; case 'r': { String req = Serial.readString(); req.remove(0, 1); //Remove colon character - newTrack = startTrack(REQUEST, req); + startTrack(REQUEST, req); } break; default: continue; } } - if(newTrack) - { - vgmVerify(); - prepareChips(); - } + Serial.flush(); + setISR(); } //Check for button input bool buttonLock = false; void handleButtons() { - bool newTrack = false; bool togglePlaymode = false; uint32_t count = 0; if(!digitalRead(next_btn)) - newTrack = startTrack(NEXT); + startTrack(NEXT); if(!digitalRead(prev_btn)) - newTrack = startTrack(PREV); + startTrack(PREV); if(!digitalRead(rand_btn)) - newTrack = startTrack(RND); + startTrack(RND); if(!digitalRead(option_btn)) togglePlaymode = true; else buttonLock = false; while(!digitalRead(option_btn)) { + pauseISR(); if(count >= 100) { //toggle OLED after one second of holding OPTION button @@ -868,56 +445,47 @@ void handleButtons() count++; } if(buttonLock) - togglePlaymode = false; - if(newTrack) { - vgmVerify(); - prepareChips(); - delay(100); + togglePlaymode = false; + setISR(); } + if(togglePlaymode) { togglePlaymode = false; - if(playMode == SHUFFLE) - playMode = LOOP; - else if(playMode == LOOP) - playMode = IN_ORDER; - else if(playMode == IN_ORDER) - playMode = SHUFFLE; + if(playMode == PlayMode::SHUFFLE) + playMode = PlayMode::LOOP; + else if(playMode == PlayMode::LOOP) + playMode = PlayMode::IN_ORDER; + else if(playMode == PlayMode::IN_ORDER) + playMode = PlayMode::SHUFFLE; drawOLEDTrackInfo(); + setISR(); } } void loop() -{ - topUpBuffer(); - if(waitSamples == 0) +{ + if(trackError) { - waitSamples += parseVGM(); - return; + startTrack(NEXT); + trackError = false; } - if(loopCount >= maxLoops && playMode != PlayMode::LOOP) + while(!VGMEngine.play()) //needs to account for LOOP playmode { - bool newTrack = false; - if(playMode == PlayMode::SHUFFLE) - newTrack = startTrack(RND); - if(playMode == PlayMode::IN_ORDER) - newTrack = startTrack(NEXT); - if(newTrack) + if(Serial.available() > 0) + handleSerialIn(); + handleButtons(); + if(trackError) { - vgmVerify(); - prepareChips(); + startTrack(NEXT); + trackError = false; } } - if(Serial.available() > 0) - handleSerialIn(); - handleButtons(); - #if DEBUG - if(commandFailed) - { - commandFailed = false; - Serial.print("CMD ERROR: "); Serial.println(failedCmd, HEX); - } - #endif - iwdg_feed(); + //Hit max loops and/or VGM exited + if(playMode == PlayMode::SHUFFLE) + startTrack(RND); + if(playMode == PlayMode::IN_ORDER) + startTrack(NEXT); + //iwdg_feed(); } diff --git a/src/ringbuffer.h b/src/ringbuffer.h deleted file mode 100644 index 5563756..0000000 --- a/src/ringbuffer.h +++ /dev/null @@ -1,177 +0,0 @@ -/* - ringbuffer.h - yet another version of ringbuffer_t c++ template - - Desc: This template class creates a ringbuffer with arbitrary types. Provides push - and pop methods for adding and removing items. Access function for checking - the number of items in the buffer, capacity and full or empty methods - provide safe access to the info. - - This version has been optimized for the msp430-gcc and stm32. It doesn't use disable - or enable any interrupts. It is safe nonetheless for use when there is a single - writer and single reader. This is common when using an interrupt and the main - line thread working together to move data in and out of peripherals on demand. - - Version: 1.0.3 - Created: Jul-24-2012 - Author: rick@kimballsoftware.com - Date: 02-28-2013 - - ========================================================================= - Copyright © 2012-2016 Rick Kimball - - This program is free software: you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation, either version 3 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . - - Jul-14-2016: rick@kimballsoftware.com removed extra stuff not needed for stm32 - formatted using auto format in arduino ide - -*/ - -#ifndef RINGBUFFER_T_H_ -#define RINGBUFFER_T_H_ -#include - -/** - struct_is_power_of_two - power of 2 checker - enforce at compile time that SIZE is power of 2 and >= 2 -*/ - -template -struct is_power_of_two { - enum {val = (SIZE >= 2) & (SIZE > 1) & !(SIZE & (SIZE - 1))}; - static const unsigned badSIZE[(val == 1) ? 1 : -1]; // SIZE is not a power of 2 if you an error here. -}; - -/** - uint16x2_t - a union containing 16 bit head and tail offsets into the ring buffer. The union - allows the c code to grab both values with one assembler instruction access. - -*/ -union uint16x2_t { - // access as 32 bit - unsigned long both; - // -- or as 2 16 bit values -- - struct { - unsigned head: 16; - unsigned tail: 16; - }; -}; - -/** - ringbuffer_t - provide a circular_buffer without disabling interrupts - expects a power of 2 container, and only one reader and one writer - container capacity SIZE-1 -*/ - -template < - typename T, /* works with any type */ - uint16_t SIZE, /* how many elements-1 must be power of 2 */ - typename POP_T = int16_t, /* return type of pop_front */ - POP_T EMPTY_ELEM = (POP_T) - 1 /* default return value when empty */ - > -struct ringbuffer_t { - - // --- private structure data --- - // although variables are accessible because this is a struct - - volatile uint16x2_t offsets; // comes first so we can use 0 offset to variables - // for fastest access - T elements[SIZE]; - - enum { CAPACITY = SIZE - 1 }; // leave one slot open - - is_power_of_two check_buffer_size; // your SIZE is not a power of 2, if you get an error here - - // --- public methods --- - - // write access zeros out head and tail - inline void clear(void ) { - offsets.both = 0; - } - - // return the count of used slots - size_t available() { - register uint16x2_t temp = { offsets.both }; - - temp.both = (temp.head - temp.tail) & CAPACITY; - - return temp.both; - } - - // return maximum number of slots available - size_t capacity() { - return CAPACITY; - } - - // returns true when there is no used slots - bool inline empty() { - return !available(); - } - - // returns true when all slots used - bool inline full() { - return available() == capacity(); - } - - /* - push_back() - adds an element to the end of the queue - - Note: affects head, reads tail, element ignored if overflow ~300 ns @72MHz - */ - void push_back(const T element) { - register uint16_t temp_head = offsets.head; - - elements[temp_head++] = element; - temp_head &= CAPACITY; - if ( !(temp_head == offsets.tail) ) { // !full - offsets.head = temp_head; - } - - return; - } - - // no bounds check version, affects head ~250 ns @72MHz - void push_back_nc(const T element) { - register uint16_t temp_head = offsets.head; - - elements[temp_head++] = element; - offsets.head = temp_head & CAPACITY; - return; - } - - - // affects tail, reads head - POP_T pop_front(void) { - register uint16x2_t temp = { offsets.both }; - - if ( (temp.head - temp.tail) & CAPACITY ) { // !empty - POP_T elem = elements[temp.tail++]; - offsets.tail = temp.tail & CAPACITY; - return elem; - } - - return EMPTY_ELEM; // on underflow return default element - } - - // no bounds check, affects tail - POP_T pop_front_nc(void) { - register uint16_t temp_tail = offsets.tail; - - POP_T elem = elements[temp_tail++]; - offsets.tail = temp_tail & CAPACITY; - return elem; - } - -}; - -#endif /* RINGBUFFER_T_H_ */ \ No newline at end of file