/* * Author: Ben Westcott * Date created: 3/6/23 */ #ifndef ML_ADC_H #define ML_ADC_H #include #ifdef __cplusplus extern "C" { #endif /////////////////////////////////////////////////////////////////////////////////// /////////////////////////// MACRO DEFINITIONS ///////////////////////////////// /////////////////////////////////////////////////////////////////////////////////// /* TODO: ask whether the seperate or together for both mux and muxneg etc. #define ML_ADC0_AIN0 0x00 #define ML_ADC0_AIN1 0x01 #define ML_ADC0_AIN2 0x02 #define ML_ADC0_AIN3 0x03 #define ML_ADC0_AIN4 0x04 #define ML_ADC0_AIN5 0x05 #define ML_ADC0_AIN6 0x06 #define ML_ADC0_AIN7 0x07 #define ML_ADC0_GND 0x18 #define ML_ADC1_AIN0 0x00 #define ML_ADC1_AIN1 0x01 #define ML_ADC1_AIN2 0x02 #define ML_ADC1_AIN3 0x03 #define ML_ADC1_AIN4 0x04 #define ML_ADC1_AIN5 0x05 #define ML_ADC1_AIN6 0x06 #define ML_ADC1_AIN7 0x07 #define ML_ADC1_GND 0x18 */ #define ML_ADC_PRESCALER_DIV2 (0x00) #define ML_ADC_PRESCALER_DIV4 (0x01) #define ML_ADC_PRESCALER_DIV8 (0x02) #define ML_ADC_PRESCALER_DIV16 (0x03) #define ML_ADC_PRESCALER_DIV32 (0x04) #define ML_ADC_PRESCALER_DIV64 (0x05) #define ML_ADC_PRESCALER_DIV128 (0x06) #define ML_ADC_PRESCALER_DIV256 (0x07) #define ML_ADC_CONVERSION_RES12 (0x00) #define ML_ADC_CONVERSION_RES16 (0x01) #define ML_ADC_CONVERSION_RES10 (0x02) #define ML_ADC_CONVERSION_RES8 (0x03) #define ML_ADC_REFCTRL_INTREF (0x00) #define ML_ADC_REFCTRL_INTVCC0 (0x02) #define ML_ADC_REFCTRL_INTVCC1 (0x03) #define ML_ADC_REFCTRL_AREFA (0x04) #define ML_ADC_REFCTRL_AREFB (0x05) #define ML_ADC_REFCTRL_AREFC (0x06) /* MUX/MUXNEG input selection*/ #define ML_ADC_AIN0 (0x00) #define ML_ADC_AIN1 (0x01) #define ML_ADC_AIN2 (0x02) #define ML_ADC_AIN3 (0x03) #define ML_ADC_AIN4 (0x04) #define ML_ADC_AIN5 (0x05) #define ML_ADC_AIN6 (0x06) #define ML_ADC_AIN7 (0x07) #define ML_ADC_AIN8 (0x08) #define ML_ADC_AIN9 (0x09) #define ML_ADC_AIN10 (0x0A) #define ML_ADC_AIN11 (0x0B) #define ML_ADC_AIN12 (0x0C) #define ML_ADC_AIN13 (0x0D) #define ML_ADC_AIN14 (0x0E) #define ML_ADC_AIN15 (0x0F) #define ML_ADC_AIN16 (0x10) #define ML_ADC_AIN17 (0x11) #define ML_ADC_AIN18 (0x12) #define ML_ADC_AIN19 (0x13) #define ML_ADC_AIN20 (0x14) #define ML_ADC_AIN21 (0x15) #define ML_ADC_AIN22 (0x16) #define ML_ADC_AIN23 (0x17) /* Special MUX/MUXNEG input selection*/ #define ML_ADC_AINSCALEDCOREVCC (0x18) #define ML_ADC_AINGND (0x18) #define ML_ADC_AINSCALEDVBAT (0x19) #define ML_ADC_AINSCALEDIOVCC (0x20) #define ML_ADC_AINBANDGAP (0x21) #define ML_ADC_AINPTAT (0x22) #define ML_ADC_AINCTAT (0x23) #define ML_ADC_AINDAC (0x24) /////////////////////////////////////////////////////////////////////////////////// /////////////////////////// MACRO CONFIGURATIONS ////////////////////////// /////////////////////////////////////////////////////////////////////////////////// #define ML_ADC_ENABLE(instance) (instance->CTRLA.reg |= ADC_CTRLA_ENABLE) #define ML_ADC_DISABLE(instance) (instance->CTRLA.reg &= ~ADC_CTRLA_ENABLE) #define ML_ADC_SWRST(instance) (instance->CTRLA.reg |= ADC_CTRLA_SWRST) #define ML_ADC_SWTRIG_START(instance) (instance->SWTRIG.reg |= ADC_SWTRIG_START) /* CTRLA Configurations */ #define ML_ADC_R2R_ENABLE(instance) (instance->CTRLA.bit.R2R = 1) #define ML_ADC_R2R_DISABLE(instance) (instance->CTRLA.bit.R2R = 0) #define ML_ADC_SET_PRESCALER(instance, p) (instance->CTRLA.bit.PRESCALER = p) #define ML_ADC_ONDEMAND_ENABLE(instance) (instance->CTRLA.bit.ONDEMAND = 1) #define ML_ADC_ONDEMAND_DISABLE(instance) (instance->CTRLA.bit.ONDEMAND = 0) #define ML_ADC_SET_DUALSEL_BOTH(instance) (instance->CTRLA.bit.DUALSEL = 0) #define ML_ADC_SET_DUALSEL_INTER(instance) (instance->CTRLA.bit.DUALSEL = 1) /* CTRLB Configurations */ /* EVCTRL Configurations */ #define ML_ADC_WINMONITOREO_ENABLE(instance) (instance->EVCTRL.bit.WINMONEO = 1) #define ML_ADC_WINMONITOREO_DISABLE(instance) (instance->EVCTRL.bit.WINMONEO = 0) #define ML_ADC_RESULTEO_ENABLE(instance) (instance->EVCTRL.bit.RESRDYEO = 1) #define ML_ADC_RESULTEO_DISABLE(instance) (instance->EVCTRL.bit.RESRDYEO = 0) #define ML_ADC_START_INVEO_ENABLE(instance) (instance->EVCTRL.bit.STARTINV = 1) #define ML_ADC_START_INVEO_DISABLE(instance) (instance->EVCTRL.bit.STARTINV = 0) #define ML_ADC_FLUSH_INVEO_ENABLE(instance) (instance->EVCTRL.bit.FLUSHINV = 1) #define ML_ADC_FLUSH_INVEO_DISABLE(instance) (instance->EVCTRL.bit.FLUSHINV = 0) #define ML_ADC_START_CONVEO_ENABLE(instance) (instance->EVCTRL.bit.STARTEI = 1) #define ML_ADC_START_CONVEO_DISABLE(instance) (instance->EVCTRL.bit.STARTEI = 0) #define ML_ADC_FLUSHEV_ENABLE(instance) (instance->EVCTRL.bit.FLUSHEI = 1) #define ML_ADC_FLUSHEV_DISABLE(instance) (instance->EVCTRL.bit.FLUSHEI = 1) /* DBGCTRL Configuration */ #define ML_ADC_DBGCTRL_HALT(instance) (instance->DBGRUN.reg = 0) #define ML_ADC_DBGCTRL_CONT(instance) (instance->DBGRUN.reg = 1) /////////////////////////////////////////////////////////////////////////////////// ///////////////////////////////// Structures /////////////////////////////////// /////////////////////////////////////////////////////////////////////////////////// /* ADC structures */ typedef enum { ADC_PRESCALER_DIV2 = ML_ADC_PRESCALER_DIV2, ADC_PRESCALER_DIV4 = ML_ADC_PRESCALER_DIV4, ADC_PRESCALER_DIV8 = ML_ADC_PRESCALER_DIV8, ADC_PRESCALER_DIV16 = ML_ADC_PRESCALER_DIV16, ADC_PRESCALER_DIV32 = ML_ADC_PRESCALER_DIV32, ADC_PRESCALER_DIV64 = ML_ADC_PRESCALER_DIV64, ADC_PRESCALER_DIV128 = ML_ADC_PRESCALER_DIV128, ADC_PRESCALER_DIV256 = ML_ADC_PRESCALER_DIV256 } ml_adc_prescaler_t; typedef enum { ADC_CONV_RESOLUTION12 = ML_ADC_CONVERSION_RES12, ADC_CONV_RESOLUTION16 = ML_ADC_CONVERSION_RES16, ADC_CONV_RESOLUTION10 = ML_ADC_CONVERSION_RES10, ADC_CONV_RESOLUTION8 = ML_ADC_CONVERSION_RES8 } ml_adc_conv_resolution_t; typedef enum { ADC_VREF_VINTREF = ML_ADC_REFCTRL_INTREF, ADC_VREF_HALF_VDDANA = ML_ADC_REFCTRL_INTVCC0, ADC_VREF_HALF_VDDANA = ML_ADC_REFCTRL_INTVCC1, ADC_VREF_VREFA = ML_ADC_REFCTRL_AREFA, ADC_VREF_VREFB = ML_ADC_REFCTRL_AREFB, ADC_VREF_VREFC = ML_ADC_REFCTRL_AREFC } ml_adc_refsel_t; typedef enum { ADC_MUXNEG_AIN0 = ML_ADC_AIN0, ADC_MUXNEG_AIN1 = ML_ADC_AIN1, ADC_MUXNEG_AIN2 = ML_ADC_AIN2, ADC_MUXNEG_AIN3 = ML_ADC_AIN3, ADC_MUXNEG_AIN4 = ML_ADC_AIN4, ADC_MUXNEG_AIN5 = ML_ADC_AIN5, ADC_MUXNEG_AIN6 = ML_ADC_AIN6, ADC_MUXNEG_AIN7 = ML_ADC_AIN7, ADC_MUXNEG_AIN8 = ML_ADC_AINGND, } ml_adc_muxneg_t; typedef enum { ADC_MUXPOS_AIN0 = ML_ADC_AIN0, ADC_MUXPOS_AIN1 = ML_ADC_AIN1, ADC_MUXPOS_AIN2 = ML_ADC_AIN2, ADC_MUXPOS_AIN3 = ML_ADC_AIN3, ADC_MUXPOS_AIN4 = ML_ADC_AIN4, ADC_MUXPOS_AIN5 = ML_ADC_AIN5, ADC_MUXPOS_AIN6 = ML_ADC_AIN6, ADC_MUXPOS_AIN7 = ML_ADC_AIN7, ADC_MUXPOS_AIN8 = ML_ADC_AIN8, ADC_MUXPOS_AIN9 = ML_ADC_AIN9, ADC_MUXPOS_AIN10 = ML_ADC_AIN10, ADC_MUXPOS_AIN11 = ML_ADC_AIN11, ADC_MUXPOS_AIN12 = ML_ADC_AIN12, ADC_MUXPOS_AIN13 = ML_ADC_AIN13, ADC_MUXPOS_AIN14 = ML_ADC_AIN14, ADC_MUXPOS_AIN15 = ML_ADC_AIN15, ADC_MUXPOS_AIN16 = ML_ADC_AIN16, ADC_MUXPOS_AIN17 = ML_ADC_AIN17, ADC_MUXPOS_AIN18 = ML_ADC_AIN18, ADC_MUXPOS_AIN19 = ML_ADC_AIN19, ADC_MUXPOS_AIN20 = ML_ADC_AIN20, ADC_MUXPOS_AIN21 = ML_ADC_AIN21, ADC_MUXPOS_AIN22 = ML_ADC_AIN22, ADC_MUXPOS_AIN23 = ML_ADC_AIN23, ADC_MUXPOS_AINSCALEDVCC = ML_ADC_AINSCALEDCOREVCC, /* 1/4 Scaled Core Supply */ ADC_MUXPOS_AINSCALEDVBAT = ML_ADC_AINSCALEDVBAT, /* 1/4 Scaled VBAT Supply */ ADC_MUXPOS_AINIOVCC = ML_ADC_AINSCALEDIOVCC, /* 1/4 Scaled I/O Supply */ ADC_MUXPOS_AINBANDGAP = ML_ADC_AINBANDGAP, ADC_MUXPOS_AINPTAT = ML_ADC_AINPTAT, /* Temperature Sensor */ ADC_MUXPOS_AINCTAT = ML_ADC_AINCTAT, /* Temperature Sensor */ ADC_MUXPOS_AINDAC = ML_ADC_AINDAC /* DAC Output */ } ml_adc_muxpos_t; /////////////////////////////////////////////////////////////////////////////////// ///////////////////////// Function Configurations //////////////////////////////// /////////////////////////////////////////////////////////////////////////////////// /* CTRLA Configurations */ void ADC_enable(Adc* const); void ADC_disable(Adc* const); void ADC_swrst(Adc* const); /* CTRLB Configurations */ void ADC_set_conversion_resolution(Adc* const); /* INPUTCTRL Configurations */ void ADC_dma_autostop_enable(Adc* const); void ADC_dma_autostop_disable(Adc* const); void ADC_set_negInput(Adc* const, const ml_adc_muxneg_t); void ADC_set_posInput(Adc* const, const ml_adc_muxpos_t); void ADC_diffmode_single(Adc* const); void ADC_diffmode_diff(Adc* const); /* Initializations */ int8_t ADC_init(Adc* const); void ADC_sync(Adc * const instance); ////////////////////////////////////////////////////////////////////////////////// #ifdef __cplusplus } #endif #endif // ML_ADC_H