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Enabled muxer support for the CTAG. Needs to be manually enabled at c…

…ompile time (uncommenting #define ENABLE_MUXER). Closes #482
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giuliomoro committed Feb 6, 2019
1 parent e3b4767 commit 7badfebdbaff13bccb479a22caa50ab60591299e
Showing with 28 additions and 5 deletions.
  1. +28 −5 pru/pru_rtaudio_irq.p
@@ -11,11 +11,10 @@
// At least one needs to be selected. Maximum 2 can be selected without having
// the "jump too long" error mentioned above

// enables run-time selection of the Bela TLV32 codec.
#define ENABLE_CTAG_FACE
// enables run-time selection of the Bela TLV32 codec.
#define ENABLE_CTAG_BEAST
// #define ENABLE_BELA_TLV32 // enables run-time selection of the Bela TLV32 codec.
#define ENABLE_CTAG_FACE // enables run-time selection of the CTAG Face codec.
#define ENABLE_CTAG_BEAST // enables run-time selection of the CTAG Beast codecs
//#define ENABLE_BELA_TLV32 // enables run-time selection of the Bela TLV32 codec
//#define ENABLE_MUXER // enables run-time selection of the Multiplexer capelet
// there are some issues with this code and this codec.
// See https://github.com/BelaPlatform/Bela/issues/480

@@ -1845,6 +1844,18 @@ ANALOG_CHANNEL_7_END:
SBCO r0, C_ADC_DAC_MEM, reg_adc_current, 8
ADD reg_adc_current, reg_adc_current, 8

#ifdef ENABLE_MUXER
// If enabled, update the multiplexer settings
// Change mux settings for ch0-3 after reading ch. 3
QBBC MUX_0_3_DONE, reg_flags, FLAG_BIT_MCSPI_FIRST_FOUR_CH
MUX_INCREMENT_0_TO_3
MUX_0_3_DONE:
// Change mux settings for ch4-7 after reading ch. 7
QBBS MUX_4_7_DONE, reg_flags, FLAG_BIT_MCSPI_FIRST_FOUR_CH
MUX_INCREMENT_4_TO_7
MUX_4_7_DONE:
#endif /* ENABLE_MUXER */

XIN SCRATCHPAD_ID_BANK0, r0, 72 // load back register states from scratchpad

// Toggle flag to check on which SPI channels (i.e. ch0-ch3 or ch4-ch7) we are,
@@ -1992,6 +2003,18 @@ ALL_FRAMES_PROCESSED:
MOV reg_mcasp_buf1, r2
XOR reg_flags, reg_flags, (1 << FLAG_BIT_BUFFER1) //flip the buffer flag

#ifdef ENABLE_MUXER
// If multiplexer capelet is enabled, save which channel we got to
// Muxes 0-3 change at a different time than muxes 4-7 but the first
// of these is sufficient to capture where we are
MOV r2, FLAG_MASK_MUX_CONFIG
AND r2, reg_flags, r2
QBEQ MUX_CHANNEL_SAVE_DONE, r2, 0
AND r2, reg_pru1_mux_pins, 0x07
SBBO r2, reg_comm_addr, COMM_MUX_END_CHANNEL, 4
MUX_CHANNEL_SAVE_DONE:
#endif /* ENABLE_MUXER */

// Notify ARM of buffer swap
AND r2, reg_flags, (1 << FLAG_BIT_BUFFER1) // Mask out every but low bit
SBBO r2, reg_comm_addr, COMM_CURRENT_BUFFER, 4

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