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NL-AB-BBBC-00D0.dts
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NL-AB-BBBC-00D0.dts
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/*
* Copyright (C) 2014 Nimbelink, Corp <product.support@nimbelink.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This is a device tree overlay file for Nimbelinks Skywire Beaglebone Black Cape.
* This code initializes CAN1, UART2, UART4, and GPIOs P8.8 and P8.9 for use with the capes default operating mode.
* This overlay file was developed from referencing the projectM device tree files (https://github.com/gntoni/projectM/tree/master/devTree)
* and from the embedded things.com CANBUS tutorial (http://www.embedded-things.com/bbb/enable-canbus-on-the-beaglebone-black/)
*
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/board/am335x-bbw-bbb-base.h>
#include <dt-bindings/pinctrl/am33xx.h>
/{
compatible = "ti,beaglebone", "ti,beaglebone-black", "ti,beaglebone-green";
part-number = "NL-AB-BBBC";
version = "00D0";
/* State resources this cape uses */
exclusive-use =
/* the pin header and pins used */
"P9.13", /* UART4 TXD */
"P9.11", /* UART4 RXD */
"P9.21", /* UART2 TXD */
"P9.22", /* UART2 RXD */
"P9.24", /* CAN1 RXD */
"P9.26", /* CAN1 TXD */
"P8.8", /*SKYWIRE ON-OFF*/
"P8.9", /*SKYWIRE DTR*/
/* the hardware IP use */
"uart4_txd_mux2",
"uart4_rxd_mux2",
"uart2_txd",
"uart2_rxd",
"CAN1_rxd",
"CAN1_txd",
"gpio2_3",
"gpio2_5";
/*Mux the Pins */
fragment@0 {
target = <&am33xx_pinmux>;
__overlay__ {
/*CONFIGURE CAN1*/
can1_pins: pinmux_can1_pins {
pinctrl-single,pins = <
BONE_P9_24 (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.d_can1_rx */
BONE_P9_26 (PIN_OUTPUT_PULLUP | MUX_MODE2) /* uart1_rxd.d_can1_tx */
>;
};
/*CONFIGURE UART2*/
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
BONE_P9_21 (PIN_OUTPUT | MUX_MODE1) /* spi0_d0.uart2_txd */
BONE_P9_22 (PIN_INPUT | MUX_MODE1) /* spi0_sclk.uart2_rxd */
>;
};
/*CONFIGRE UART4*/
uart4_pins: pinmux_uart4_pins {
pinctrl-single,pins = <
BONE_P9_13 (PIN_OUTPUT | MUX_MODE6) /* gpmc_wpn.uart4_txd_mux2 */
BONE_P9_11 (PIN_INPUT | MUX_MODE6) /* gpmc_wait0.uart4_rxd_mux2 */
>;
/*CONFIGURE GPIO*/
};
gpio_pins: pinmux_gpio_pins{
pinctrl-single,pins = <
BONE_P8_08 0xf /* P8.8, gpio2_3, SLEWCTRL_FAST | PULLUP_DISABLED | MODE7*/
BONE_P8_09 0xf /* P9.9, gpio2_5, SLEWCTRL_FAST | PULLUP_DISABLED | MODE7*/
>;
};
};
};
/*=============Enable the device ==================*/
/*============Connect the device to user interface driver ==============*/
/*To connect the device with a user interface,
/*specify the compatible field in the ocp section.
/*ocp stand for On Chip Peripherals,
/*BTW. The compatible field should match the driver you want to use.*/
/*Turn on CAN1*/
fragment@1 {
target = <&dcan1>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&can1_pins>;
};
};
/*Turn on UART2*/
fragment@2 {
target = <&uart2>;
__overlay__ {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
};
};
/*Turn on UART4*/
fragment@3 {
target = <&uart4>;
__overlay__ {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins>;
status = "okay";
};
};
/*Turn on GPIO*/
fragment@4 {
target-path="/";
__overlay__ {
#address-cells = <1>;
#size-cells = <1>;
gpio {
compatible = "skywire-gpio";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&gpio_pins>;
/*declare the gpios*/
SKYWIREDTR {
gpio-name = "SKYDTR";
gpio = <&gpio2 5 0x00>;
output;
init-low;
};
SKYWIREONOFF {
gpio-name = "SKYONOFF";
GPIO = <&gpio2 3 0x00>;
output;
init-high;
};
};
};
};
};