This was a project realized during our second year of Bachelor at ECE Paris, Graduate School of Engineering.
You can have a look at the result here: https://www.youtube.com/watch?v=OTdqTFmP8sY.
This was entirely made in VHDL on a Basys Spartan-3E FPGA board using the software Xilinx.
The team was composed of:
- Maxime Biette - Project Manager and Lead developer - firstname.lastname@example.org
- Arthur Ricat - Design and Creation - email@example.com
- Maxence Verneuil - Development - firstname.lastname@example.org
After receiving several emails asking for it we decided to post the source code here. Thus, most of the documentation and variables are in French. Details of the project are posted on that website: http://biettemaxi.me . There are two versions of the software: an "old" and simple one name v1 and a more complicated (the one in the video) named v2.
The project is released under the GPLv3 license. Please have a look at the LICENSE file.