diff --git a/Dockerfile.dev b/Dockerfile.dev
index 44c7d19f..0eccea18 100644
--- a/Dockerfile.dev
+++ b/Dockerfile.dev
@@ -21,7 +21,10 @@ ENV DEBIAN_FRONTEND noninteractive
 WORKDIR /app
 COPY . /app
 
-RUN apt update && apt-get install -y cmake git gcc-arm-none-eabi locales python python-pip
+RUN apt update && apt-get install -y cmake git wget locales python python-pip
+RUN mkdir ~/Downloads && cd ~/Downloads && wget -O gcc.tar.bz2 https://developer.arm.com/-/media/Files/downloads/gnu-rm/7-2018q2/gcc-arm-none-eabi-7-2018-q2-update-linux.tar.bz2?revision=bc2c96c0-14b5-4bb4-9f18-bceb4050fee7?product=GNU%20Arm%20Embedded%20Toolchain,64-bit,,Linux,7-2018-q2-update
+RUN cd ~/Downloads && tar -xjvf gcc.tar.bz2
+RUN cd ~/Downloads && rsync -a gcc-arm-none-eabi-7-2018-q2-update/ /usr/local/
 RUN apt install -y libbz2-1.0 libncurses5 libz1 valgrind astyle clang libudev-dev python-urllib3 libssl1.0-dev
 RUN apt install -y libbz2-dev libbz2-dev libbz2-1.0 libncurses5 libz1 valgrind astyle clang libudev-dev python-urllib3
 RUN pip install --prefix /usr/local  cpp-coveralls
diff --git a/firmware.ld b/firmware.ld
index fbbdeea0..d2218184 100644
--- a/firmware.ld
+++ b/firmware.ld
@@ -9,8 +9,8 @@ SEARCH_DIR(.)
 MEMORY
 {
 	rom (rx)  : ORIGIN = 0x00409000, LENGTH = 0x00037000
-	ramf (rx) : ORIGIN = 0x20000000, LENGTH = 0x000000fc
-	ram (rw) : ORIGIN = 0x200000fc, LENGTH = 0x0000FF04
+	ramf (rx) : ORIGIN = 0x20000000, LENGTH = 0x000000f8
+	ram (rw) : ORIGIN = 0x200000f8, LENGTH = 0x0000FF08
 }
 
 __stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 0x2800;
diff --git a/src/mpu.c b/src/mpu.c
index bad3993c..8ea1d51c 100644
--- a/src/mpu.c
+++ b/src/mpu.c
@@ -82,30 +82,28 @@ extern uint32_t _ebss;
 extern uint32_t _sbss;
 extern uint32_t _sdata;
 extern uint32_t _sstack;
+extern uint32_t __stack_size__;
 
 /**
  * Enables execution protection for the SRAM region.
  */
 static void mpu_sram_nx(void)
 {
-    // Configure SRAM region, protect from execution
     MPU->RBAR = IRAM_ADDR | MPU_REGION_VALID | rn_sram;
     MPU->RASR = MPU_REGION_ENABLE | MPU_REGION_NORMAL | mpu_region_size(
                     IRAM_SIZE) | MPU_REGION_STATE_RO;
+
     MPU->RBAR = (uint32_t) &_sdata | MPU_REGION_VALID | rn_data;
-    MPU->RASR = MPU_REGION_ENABLE | MPU_REGION_NORMAL | mpu_region_size((
-                    uint32_t) &_erelocate -
-                (uint32_t) &_sdata) | MPU_REGION_STATE_RW | MPU_REGION_STATE_XN;
+    MPU->RASR = MPU_REGION_ENABLE | MPU_REGION_NORMAL | mpu_region_size(
+                    (uint32_t) &_sbss - (uint32_t) &_sdata) | MPU_REGION_STATE_RW | MPU_REGION_STATE_XN;
 
     MPU->RBAR = (uint32_t) &_sbss | MPU_REGION_VALID | rn_bss;
-    MPU->RASR = MPU_REGION_ENABLE | MPU_REGION_NORMAL |
-                mpu_region_size((uint32_t) &_ebss - (uint32_t) &_sbss) |
-                MPU_REGION_STATE_RW;
+    MPU->RASR = MPU_REGION_ENABLE | MPU_REGION_NORMAL | mpu_region_size(
+                    (uint32_t) &_sstack - (uint32_t) &_sbss) | MPU_REGION_STATE_RW | MPU_REGION_STATE_XN;
 
     MPU->RBAR = (uint32_t) &_sstack | MPU_REGION_VALID | rn_stack;
     MPU->RASR = MPU_REGION_ENABLE | MPU_REGION_NORMAL | mpu_region_size((
-                    IRAM_ADDR + IRAM_SIZE) -
-                (uint32_t) &_sstack) | MPU_REGION_STATE_RW | MPU_REGION_STATE_XN;
+                    uint32_t) __stack_size__) | MPU_REGION_STATE_RW;
 }
 
 /**