From 283ee1b688a33de5c455088841b7beeaa9d87595 Mon Sep 17 00:00:00 2001 From: fouriaux Date: Mon, 26 Mar 2018 12:01:48 +0200 Subject: [PATCH 01/22] * move coreneuron toward full c++ * move coreneuron to coreneuron namespace * fix test to comply to new changes * fix c++ link with mod2c generated files --- apps/coreneuron.cpp | 5 ++- coreneuron/CMakeLists.txt | 6 +-- coreneuron/coreneuron.h | 16 +++----- coreneuron/kinderiv.py | 5 ++- coreneuron/mech/cfile/cabvars.h | 9 ++--- coreneuron/mech/mod2c_core_thread.h | 8 +--- coreneuron/mech/mod_func.c.pl | 2 + coreneuron/mech/mod_func_ptrs.c.pl | 2 + coreneuron/mech/modfile/pattern.mod | 2 +- coreneuron/nrnconf.h | 11 +++-- coreneuron/nrniv/balance.cpp | 3 +- coreneuron/nrniv/cellorder.cpp | 4 +- coreneuron/nrniv/cellorder.h | 4 +- coreneuron/nrniv/cellorder1.cpp | 3 +- coreneuron/nrniv/cellorder2.cpp | 3 +- coreneuron/nrniv/coreneuron_main.cpp | 8 ++-- coreneuron/nrniv/cvodestb.cpp | 4 +- coreneuron/nrniv/global_vars.cpp | 3 +- coreneuron/nrniv/have2want.h | 3 +- coreneuron/nrniv/main1.cpp | 2 + coreneuron/nrniv/mk_mech.cpp | 2 + coreneuron/nrniv/multisend.cpp | 4 +- coreneuron/nrniv/multisend.h | 4 +- coreneuron/nrniv/multisend_setup.cpp | 4 +- coreneuron/nrniv/netcon.h | 4 +- coreneuron/nrniv/netcvode.cpp | 5 +-- coreneuron/nrniv/netcvode.h | 4 +- coreneuron/nrniv/netpar.cpp | 18 +++++---- coreneuron/nrniv/node_permute.cpp | 3 +- coreneuron/nrniv/node_permute.h | 4 +- coreneuron/nrniv/nrn_acc_manager.cpp | 12 ++---- coreneuron/nrniv/nrn_acc_manager.h | 11 +---- coreneuron/nrniv/nrn_checkpoint.cpp | 12 +++--- coreneuron/nrniv/nrn_checkpoint.h | 4 +- coreneuron/nrniv/nrn_filehandler.cpp | 3 +- coreneuron/nrniv/nrn_filehandler.h | 4 +- coreneuron/nrniv/nrn_setup.cpp | 17 ++++---- coreneuron/nrniv/nrn_setup.h | 4 +- coreneuron/nrniv/nrn_stats.cpp | 2 + coreneuron/nrniv/nrn_stats.h | 3 +- coreneuron/nrniv/nrniv_decl.h | 4 +- coreneuron/nrniv/nrnoptarg.cpp | 3 +- coreneuron/nrniv/nrnoptarg.h | 4 +- coreneuron/nrniv/output_spikes.cpp | 2 + coreneuron/nrniv/output_spikes.h | 4 +- coreneuron/nrniv/partrans.cpp | 3 +- coreneuron/nrniv/partrans.h | 4 +- coreneuron/nrniv/partrans_setup.cpp | 8 +++- coreneuron/nrniv/patternstim.cpp | 4 +- coreneuron/nrniv/prcellstate.cpp | 3 +- coreneuron/nrniv/profiler_interface.cpp | 4 ++ coreneuron/nrniv/profiler_interface.h | 3 +- coreneuron/nrniv/tnode.h | 4 +- coreneuron/nrniv/tqueue.cpp | 3 +- coreneuron/nrniv/tqueue.h | 7 ++-- coreneuron/nrniv/tqueue.ipp | 4 +- coreneuron/nrniv/vrecitem.h | 4 +- coreneuron/nrniv/vrecord.cpp | 3 +- .../nrnmpi/{mpispike.c => mpispike.cpp} | 3 +- coreneuron/nrnmpi/mpispike.h | 12 ++---- coreneuron/nrnmpi/{nrnmpi.c => nrnmpi.cpp} | 3 ++ coreneuron/nrnmpi/nrnmpi.h | 16 +------- coreneuron/nrnmpi/nrnmpi_def_cinc.h | 2 + coreneuron/nrnmpi/nrnmpi_impl.h | 4 +- coreneuron/nrnmpi/nrnmpidec.h | 9 +---- coreneuron/nrnoc/{capac.c => capac.cpp} | 3 ++ coreneuron/nrnoc/{eion.c => eion.cpp} | 3 +- .../{fadvance_core.c => fadvance_core.cpp} | 4 +- .../nrnoc/{finitialize.c => finitialize.cpp} | 3 +- coreneuron/nrnoc/md1redef.h | 2 - coreneuron/nrnoc/mech_mapping.cpp | 3 ++ coreneuron/nrnoc/mech_mapping.hpp | 13 ++---- coreneuron/nrnoc/membfunc.h | 40 +++++++++---------- .../nrnoc/{multicore.c => multicore.cpp} | 2 + coreneuron/nrnoc/multicore.h | 38 ++++++++---------- .../nrnoc/{nrnoc_aux.c => nrnoc_aux.cpp} | 3 ++ coreneuron/nrnoc/nrnoc_decl.h | 6 +-- coreneuron/nrnoc/nrnoc_ml.h | 24 +++++------ .../nrnoc/{nrntimeout.c => nrntimeout.cpp} | 3 +- .../{register_mech.c => register_mech.cpp} | 3 ++ coreneuron/nrnoc/register_mech.hpp | 11 +++++ .../nrnoc/{solve_core.c => solve_core.cpp} | 3 +- .../{treeset_core.c => treeset_core.cpp} | 2 + coreneuron/nrnomp/{nrnomp.c => nrnomp.cpp} | 3 +- coreneuron/nrnomp/nrnomp.h | 8 +--- .../scopmath_core/{abort.c => abort.cpp} | 3 +- .../{crout_thread.c => crout_thread.cpp} | 3 +- .../scopmath_core/{dimplic.c => dimplic.cpp} | 4 +- coreneuron/scopmath_core/errcodes.h | 6 +-- coreneuron/scopmath_core/newton_struct.h | 8 +--- .../{newton_thread.c => newton_thread.cpp} | 2 + .../{sparse_thread.c => sparse_thread.cpp} | 3 +- ...{ssimplic_thread.c => ssimplic_thread.cpp} | 2 + coreneuron/utils/data_layout.cpp | 2 + coreneuron/utils/data_layout.hpp | 4 +- coreneuron/utils/memory_utils.cpp | 3 ++ coreneuron/utils/memory_utils.h | 3 +- .../randoms/{nrnran123.c => nrnran123.cpp} | 3 +- coreneuron/utils/randoms/nrnran123.cu | 3 +- coreneuron/utils/randoms/nrnran123.h | 8 +--- coreneuron/utils/reports/nrnreport.cpp | 5 ++- coreneuron/utils/reports/nrnreport.h | 16 +++----- .../reports/report_configuration_parser.cpp | 3 ++ external/mod2c | 2 +- .../test_cmdline_interface.cpp | 2 +- .../interleave_info/check_constructors.cpp | 2 +- tests/unit/omp/test_omp.cpp | 2 +- tests/unit/queueing/test_queueing.cpp | 2 +- 108 files changed, 317 insertions(+), 298 deletions(-) rename coreneuron/nrnmpi/{mpispike.c => mpispike.cpp} (99%) rename coreneuron/nrnmpi/{nrnmpi.c => nrnmpi.cpp} (99%) rename coreneuron/nrnoc/{capac.c => capac.cpp} (99%) rename coreneuron/nrnoc/{eion.c => eion.cpp} (99%) rename coreneuron/nrnoc/{fadvance_core.c => fadvance_core.cpp} (98%) rename coreneuron/nrnoc/{finitialize.c => finitialize.cpp} (98%) rename coreneuron/nrnoc/{multicore.c => multicore.cpp} (99%) rename coreneuron/nrnoc/{nrnoc_aux.c => nrnoc_aux.cpp} (98%) rename coreneuron/nrnoc/{nrntimeout.c => nrntimeout.cpp} (98%) rename coreneuron/nrnoc/{register_mech.c => register_mech.cpp} (99%) create mode 100644 coreneuron/nrnoc/register_mech.hpp rename coreneuron/nrnoc/{solve_core.c => solve_core.cpp} (98%) rename coreneuron/nrnoc/{treeset_core.c => treeset_core.cpp} (99%) rename coreneuron/nrnomp/{nrnomp.c => nrnomp.cpp} (97%) rename coreneuron/scopmath_core/{abort.c => abort.cpp} (98%) rename coreneuron/scopmath_core/{crout_thread.c => crout_thread.cpp} (99%) rename coreneuron/scopmath_core/{dimplic.c => dimplic.cpp} (97%) rename coreneuron/scopmath_core/{newton_thread.c => newton_thread.cpp} (99%) rename coreneuron/scopmath_core/{sparse_thread.c => sparse_thread.cpp} (99%) rename coreneuron/scopmath_core/{ssimplic_thread.c => ssimplic_thread.cpp} (97%) rename coreneuron/utils/randoms/{nrnran123.c => nrnran123.cpp} (99%) diff --git a/apps/coreneuron.cpp b/apps/coreneuron.cpp index 73253ccf6..776e75b21 100644 --- a/apps/coreneuron.cpp +++ b/apps/coreneuron.cpp @@ -26,12 +26,13 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ - +namespace coreneuron { extern int main1(int argc, char** argv, char** env); +} extern "C" {extern void modl_reg(void);} int main(int argc, char** argv, char** env) { - return main1(argc, argv, env); + return coreneuron::main1(argc, argv, env); } /// Declare an empty function if Neurodamus mechanisms are not used, otherwise register them in mechs/cfile/mod_func.c diff --git a/coreneuron/CMakeLists.txt b/coreneuron/CMakeLists.txt index 841870937..2c5bd218d 100644 --- a/coreneuron/CMakeLists.txt +++ b/coreneuron/CMakeLists.txt @@ -55,7 +55,7 @@ set(MOD2C env "MODLUNIT=${MOD2C_UNITS}" ${MOD2C}) macro(mod2c_target name input) get_filename_component(mod2c_source_ ${input} ABSOLUTE) get_filename_component(mod2c_modname_ ${input} NAME) - string(REGEX REPLACE "\\.mod$" ".c" mod2c_cname_ "${mod2c_modname_}") + string(REGEX REPLACE "\\.mod$" ".cpp" mod2c_cname_ "${mod2c_modname_}") set(mod2c_output_ "${CMAKE_CURRENT_BINARY_DIR}/${mod2c_cname_}") list(APPEND MOD2C_${name}_OUTPUTS "${mod2c_output_}") @@ -192,7 +192,7 @@ mod2c_from_file(OPTMECH "${ADDITIONAL_MECHS}" "${ADDITIONAL_MECHPATH}") # For 'non-standard' mod files, need to generate registering function in mod_func.c -set(MOD_FUNC_C "${CMAKE_CURRENT_BINARY_DIR}/mod_func.c") +set(MOD_FUNC_C "${CMAKE_CURRENT_BINARY_DIR}/mod_func.cpp") set(MOD_FUNC_C_PL "${CMAKE_CURRENT_SOURCE_DIR}/mech/mod_func.c.pl") # ... pass as argument to the perl script the list of mod file names; @@ -221,7 +221,7 @@ add_custom_command(OUTPUT "${KINDERIV_H}" if (EXPORT_MECHS_FUNCTIONS) # Create C file with all "get function pointers" methods - set(MOD_FUNC_PTRS_C "${CMAKE_CURRENT_BINARY_DIR}/mod_func_ptrs.c") + set(MOD_FUNC_PTRS_C "${CMAKE_CURRENT_BINARY_DIR}/mod_func_ptrs.cpp") set(MOD_FUNC_PTRS_C_PL "${CMAKE_CURRENT_SOURCE_DIR}/mech/mod_func_ptrs.c.pl") # ... pass as argument to the perl script the list of mods full paths; diff --git a/coreneuron/coreneuron.h b/coreneuron/coreneuron.h index 986b97ac9..12b8ee136 100644 --- a/coreneuron/coreneuron.h +++ b/coreneuron/coreneuron.h @@ -44,11 +44,9 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrnoc/nrnoc_ml.h" //Memb_list and mechs info #include "coreneuron/utils/randoms/nrnran123.h" //Random Number Generator -#if defined(__cplusplus) #include "coreneuron/nrniv/memory.h" //Memory alignments and padding -extern "C" { -#endif +namespace coreneuron { #ifdef EXPORT_MECHS_FUNCTIONS // from (auto-generated) mod_func_ptrs.c @@ -59,18 +57,16 @@ extern mod_f_t get_BA_function(const char* sym, int BA_func_id); #endif // from nrnoc/capac.c -extern void nrn_init_capacitance(struct NrnThread*, struct Memb_list*, int); -extern void nrn_cur_capacitance(struct NrnThread* _nt, struct Memb_list* ml, int type); +extern void nrn_init_capacitance(NrnThread*, Memb_list*, int); +extern void nrn_cur_capacitance(NrnThread* _nt, Memb_list* ml, int type); extern void nrn_alloc_capacitance(double* data, Datum* pdata, int type); // from nrnoc/eion.c -extern void nrn_init_ion(struct NrnThread*, struct Memb_list*, int); -extern void nrn_cur_ion(struct NrnThread* _nt, struct Memb_list* ml, int type); +extern void nrn_init_ion(NrnThread*, Memb_list*, int); +extern void nrn_cur_ion(NrnThread* _nt, Memb_list* ml, int type); extern void nrn_alloc_ion(double* data, Datum* pdata, int type); extern void second_order_cur(NrnThread* _nt, int secondorder); -#if defined(__cplusplus) -} -#endif +} //namespace coreneuron #endif diff --git a/coreneuron/kinderiv.py b/coreneuron/kinderiv.py index e51fa6ea9..74c1eef65 100644 --- a/coreneuron/kinderiv.py +++ b/coreneuron/kinderiv.py @@ -14,7 +14,7 @@ import os -fnames = [f.replace('.mod', '.c') for f in os.listdir('.') if f.endswith('.mod')] +fnames = [f.replace('.mod', '.cpp') for f in os.listdir('.') if f.endswith('.mod')] euler = [] deriv = [] kin = [] @@ -47,6 +47,7 @@ fout.write(' */\n') fout.write("\n/* declarations */\n") +fout.write("\nnamespace coreneuron {\n") for item in deriv: fout.write('#pragma acc routine seq\n') fout.write('extern int %s%s(_threadargsproto_);\n' % (item[0], item[1])) @@ -90,6 +91,8 @@ fout.write("\n") fout.write('\n#endif\n') + +fout.write("\n} //namespace coreneuron\n") fout.close() # if kf exists and is same as kftmp, just remove kftmp. Otherwise diff --git a/coreneuron/mech/cfile/cabvars.h b/coreneuron/mech/cfile/cabvars.h index 09de46910..7802ce4df 100644 --- a/coreneuron/mech/cfile/cabvars.h +++ b/coreneuron/mech/cfile/cabvars.h @@ -26,9 +26,8 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifdef __cplusplus -extern "C" { -#endif + +namespace coreneuron { extern void capacitance_reg(void), _passive_reg(void), #if EXTRACELLULAR @@ -44,6 +43,4 @@ static void (*mechanism[])(void) = {/* type will start at 3 */ #endif _stim_reg, _hh_reg, _expsyn_reg, _netstim_reg, _exp2syn_reg, 0}; -#ifdef __cplusplus -} -#endif +} //namespace coreneuron diff --git a/coreneuron/mech/mod2c_core_thread.h b/coreneuron/mech/mod2c_core_thread.h index 09acf14c5..9c58167e0 100644 --- a/coreneuron/mech/mod2c_core_thread.h +++ b/coreneuron/mech/mod2c_core_thread.h @@ -4,9 +4,7 @@ #include "coreneuron/nrnoc/multicore.h" #include "coreneuron/nrnoc/nrnoc_ml.h" -#if defined(__cplusplus) -extern "C" { -#endif +namespace coreneuron { #if !defined(LAYOUT) /* 1 means AoS, >1 means AoSoA, <= 0 means SOA */ @@ -141,8 +139,6 @@ extern void _modl_set_dt_thread(double, NrnThread*); void nrn_sparseobj_copyto_device(SparseObj* so); -#if defined(__cplusplus) -} -#endif +} // namespace coreneuron #endif diff --git a/coreneuron/mech/mod_func.c.pl b/coreneuron/mech/mod_func.c.pl index f53b74df1..99e130477 100644 --- a/coreneuron/mech/mod_func.c.pl +++ b/coreneuron/mech/mod_func.c.pl @@ -26,6 +26,7 @@ print << "__eof"; #include +namespace coreneuron { extern int nrnmpi_myid; extern int nrn_nobanner_; extern int @{[join ",\n ", map{"_${_}_reg(void)"} @mods]}; @@ -41,4 +42,5 @@ @{[join "\n", map{" _${_}_reg();"} @mods] } } +} //namespace coreneuron __eof diff --git a/coreneuron/mech/mod_func_ptrs.c.pl b/coreneuron/mech/mod_func_ptrs.c.pl index af42318f6..3744d58b1 100755 --- a/coreneuron/mech/mod_func_ptrs.c.pl +++ b/coreneuron/mech/mod_func_ptrs.c.pl @@ -33,6 +33,7 @@ #include #include #include "coreneuron/coreneuron.h" +namespace coreneuron { __eof #Get the correct SUFFIX from each mod file for each mechanism @@ -121,5 +122,6 @@ { return NULL; } +} //namespace coreneuron __eof diff --git a/coreneuron/mech/modfile/pattern.mod b/coreneuron/mech/modfile/pattern.mod index 57129bf07..a4e78c557 100644 --- a/coreneuron/mech/modfile/pattern.mod +++ b/coreneuron/mech/modfile/pattern.mod @@ -64,7 +64,7 @@ int checkpoint_save_patternstim(_threadargsproto_) { void checkpoint_restore_patternstim(int _index, double _te, _threadargsproto_) { INFOCAST; Info* info = *ip; info->index = _index; - artcell_net_send(_tqitem, -1, _nt->_vdata[_ppvar[1*_STRIDE]], _te, 1.0); + artcell_net_send(_tqitem, -1, (Point_process*)_nt->_vdata[_ppvar[1*_STRIDE]], _te, 1.0); } ENDVERBATIM diff --git a/coreneuron/nrnconf.h b/coreneuron/nrnconf.h index ae0f63b84..0fa9ecd6a 100644 --- a/coreneuron/nrnconf.h +++ b/coreneuron/nrnconf.h @@ -35,12 +35,16 @@ THE POSSIBILITY OF SUCH DAMAGE. #include #include + +namespace coreneuron { + #define NRNBBCORE 1 #define nil NULL #define Sprintf sprintf typedef int Datum; +//#define Datum int typedef int (*Pfri)(); typedef char Symbol; @@ -53,9 +57,6 @@ typedef char Symbol; #define VEC_AREA(i) (_nt->_actual_area[(i)]) #define VECTORIZE 1 -#if defined(__cplusplus) -extern "C" { -#endif extern double celsius; extern double t, dt; @@ -91,8 +92,6 @@ typedef struct Point_process { extern char* pnt_name(Point_process* pnt); -#if defined(__cplusplus) -} -#endif +} //namespace coreneuron #endif diff --git a/coreneuron/nrniv/balance.cpp b/coreneuron/nrniv/balance.cpp index 2879de541..662e6946b 100644 --- a/coreneuron/nrniv/balance.cpp +++ b/coreneuron/nrniv/balance.cpp @@ -13,7 +13,7 @@ #include "coreneuron/nrniv/tnode.h" #include "coreneuron/nrniv/lpt.h" #include - +namespace coreneuron { int cellorder_nwarp = 0; // 0 means do not balance // ordering by warp, then old order @@ -103,3 +103,4 @@ size_t warp_balance(size_t ncell, VecTNode& nodevec) { return nwarp; } +} //namespace coreneuron diff --git a/coreneuron/nrniv/cellorder.cpp b/coreneuron/nrniv/cellorder.cpp index 36ab33ec2..09c01e242 100644 --- a/coreneuron/nrniv/cellorder.cpp +++ b/coreneuron/nrniv/cellorder.cpp @@ -12,7 +12,7 @@ #ifdef _OPENACC #include #endif - +namespace coreneuron { int use_interleave_permute; InterleaveInfo* interleave_info; // nrn_nthread array @@ -683,5 +683,5 @@ void solve_interleaved(int ith) { solve_interleaved1(ith); } } - +} //namespace coreneuron #endif diff --git a/coreneuron/nrniv/cellorder.h b/coreneuron/nrniv/cellorder.h index f159aff6d..f28ef0a80 100644 --- a/coreneuron/nrniv/cellorder.h +++ b/coreneuron/nrniv/cellorder.h @@ -2,7 +2,7 @@ #define cellorder_h #include - +namespace coreneuron { int* interleave_order(int ith, int ncell, int nnode, int* parent); void create_interleave_info(); @@ -57,5 +57,5 @@ void copy_array(T*& dest, T* src, size_t n) { #if INTERLEAVE_DEBUG void mk_cell_indices(); #endif - +} //namespace coreneuron #endif diff --git a/coreneuron/nrniv/cellorder1.cpp b/coreneuron/nrniv/cellorder1.cpp index 7bdfa179b..e59c55033 100644 --- a/coreneuron/nrniv/cellorder1.cpp +++ b/coreneuron/nrniv/cellorder1.cpp @@ -12,7 +12,7 @@ #include using namespace std; - +namespace coreneuron { static size_t groupsize = 32; static bool tnode_earlier(TNode* a, TNode* b) { @@ -669,3 +669,4 @@ for (int i = 0; i <= nwarp; ++i){ } #endif } +} //namespace coreneuron diff --git a/coreneuron/nrniv/cellorder2.cpp b/coreneuron/nrniv/cellorder2.cpp index e0cd57eb8..f3146c476 100644 --- a/coreneuron/nrniv/cellorder2.cpp +++ b/coreneuron/nrniv/cellorder2.cpp @@ -14,7 +14,7 @@ using namespace std; // experiment starting with identical cell ordering // groupindex aleady defined that keeps identical cells together // begin with leaf to root ordering - +namespace coreneuron { typedef VecTNode VTN; // level of nodes typedef vector VVTN; // group of levels typedef vector VVVTN; // groups @@ -530,3 +530,4 @@ void group_order2(VecTNode& nodevec, size_t groupsize, size_t ncell) { std::sort(nodevec.begin() + ncell, nodevec.end(), final_nodevec_cmp); set_nodeindex(nodevec); } +} //namespace coreneuron diff --git a/coreneuron/nrniv/coreneuron_main.cpp b/coreneuron/nrniv/coreneuron_main.cpp index 4b3d24d60..7149f53cf 100644 --- a/coreneuron/nrniv/coreneuron_main.cpp +++ b/coreneuron/nrniv/coreneuron_main.cpp @@ -25,9 +25,9 @@ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ - -extern int main1(int argc, char** argv, char** env); - +namespace coreneuron { + extern int main1(int argc, char** argv, char** env); +} int main(int argc, char** argv, char** env) { - return main1(argc, argv, env); + return coreneuron::main1(argc, argv, env); } diff --git a/coreneuron/nrniv/cvodestb.cpp b/coreneuron/nrniv/cvodestb.cpp index d701f9f31..94ab4590f 100644 --- a/coreneuron/nrniv/cvodestb.cpp +++ b/coreneuron/nrniv/cvodestb.cpp @@ -35,7 +35,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrniv/nrn_acc_manager.h" -extern "C" { +namespace coreneuron{ // for fixed step thread // check thresholds and deliver all (including binqueue) events @@ -112,4 +112,4 @@ int at_time(NrnThread* nt, double te) { } return 0; } -} +} //namespace coreneuron diff --git a/coreneuron/nrniv/global_vars.cpp b/coreneuron/nrniv/global_vars.cpp index 414a7852b..f076940f1 100644 --- a/coreneuron/nrniv/global_vars.cpp +++ b/coreneuron/nrniv/global_vars.cpp @@ -11,7 +11,7 @@ #include "coreneuron/nrniv/nrn_assert.h" using namespace std; - +namespace coreneuron { typedef pair PSD; typedef map N2V; @@ -106,3 +106,4 @@ void set_globals(const char* path) { delete n2v; n2v = NULL; } +} //namespace coreneuron diff --git a/coreneuron/nrniv/have2want.h b/coreneuron/nrniv/have2want.h index f0ed362c7..99aa2eebe 100644 --- a/coreneuron/nrniv/have2want.h +++ b/coreneuron/nrniv/have2want.h @@ -38,7 +38,7 @@ and minimize memory usage so that no single rank ever needs to know all keys. #ifndef HAVEWANT_t #define HAVEWANT_t int #endif - +namespace coreneuron { // round robin default rendezvous rank function static int default_rendezvous(HAVEWANT_t key) { return key % nrnmpi_numprocs; @@ -260,3 +260,4 @@ static void have_to_want(HAVEWANT_t* have, recv_from_have_cnt = want_s_cnt; recv_from_have_displ = want_s_displ; } +} //namespace coreneuron diff --git a/coreneuron/nrniv/main1.cpp b/coreneuron/nrniv/main1.cpp index 840b083e4..1ced2dfd0 100644 --- a/coreneuron/nrniv/main1.cpp +++ b/coreneuron/nrniv/main1.cpp @@ -65,6 +65,7 @@ int nrn_feenableexcept() { return result; } #endif +namespace coreneuron { int main1(int argc, char* argv[], char** env); void call_prcellstate_for_prcellgid(int prcellgid, int compute_gpu, int is_init); void nrn_init_and_load_data(int argc, @@ -386,3 +387,4 @@ void handle_forward_skip(double forwardskip, int prcellgid) { const char* nrn_version(int) { return "version id unimplemented"; } +} //namespace coreneuron diff --git a/coreneuron/nrniv/mk_mech.cpp b/coreneuron/nrniv/mk_mech.cpp index 60f37a4ab..448a91a3a 100644 --- a/coreneuron/nrniv/mk_mech.cpp +++ b/coreneuron/nrniv/mk_mech.cpp @@ -40,6 +40,7 @@ THE POSSIBILITY OF SUCH DAMAGE. static char banner[] = "Duke, Yale, and the BlueBrain Project -- Copyright 1984-2015"; +namespace coreneuron { int nrn_nobanner_; int nrn_need_byteswap; @@ -171,3 +172,4 @@ const char* nrn_get_mechname(int type) { } return NULL; } +} //namespace coreneuron diff --git a/coreneuron/nrniv/multisend.cpp b/coreneuron/nrniv/multisend.cpp index f0cfca81e..9569d1288 100644 --- a/coreneuron/nrniv/multisend.cpp +++ b/coreneuron/nrniv/multisend.cpp @@ -41,7 +41,7 @@ of spikes sent is equal to the number of spikes sent. // We expect that phase2 will work best in combination with ENQUEUE=2 // which has the greatest amount of overlap between computation // and communication. - +namespace coreneuron { int use_multisend_; int use_phase2_; int n_multisend_interval = 2; @@ -465,5 +465,5 @@ void nrn_multisend_setup() { } #endif } - +} // namespace coreneuron #endif // NRN_MULTISEND diff --git a/coreneuron/nrniv/multisend.h b/coreneuron/nrniv/multisend.h index 46f6b2608..c8f489216 100644 --- a/coreneuron/nrniv/multisend.h +++ b/coreneuron/nrniv/multisend.h @@ -2,7 +2,7 @@ #define nrnmultisend_h #include "coreneuron/nrnmpi/nrnmpiuse.h" - +namespace coreneuron { extern int use_multisend_; extern int n_multisend_interval; extern int use_phase2_; @@ -19,5 +19,5 @@ void nrn_multisend_cleanup(); void nrn_multisend_setup(); void nrn_multisend_setup_targets(int use_phase2, int*& targets_phase1, int*& targets_phase2); - +} //namespace coreneuron #endif // nrnmultisend_h diff --git a/coreneuron/nrniv/multisend_setup.cpp b/coreneuron/nrniv/multisend_setup.cpp index 19d3d934e..195dd1161 100644 --- a/coreneuron/nrniv/multisend_setup.cpp +++ b/coreneuron/nrniv/multisend_setup.cpp @@ -16,7 +16,7 @@ the source host owning the gid. */ #if NRN_MULTISEND - +namespace coreneuron { typedef std::map Gid2IPS; typedef std::map Gid2PS; @@ -702,5 +702,5 @@ static int setup_target_lists(int use_phase2, int** r_return) { *r_return = r; return sz; } - +} //namespace coreneuron #endif // NRN_MULTISEND diff --git a/coreneuron/nrniv/netcon.h b/coreneuron/nrniv/netcon.h index db25ffc2f..e22dcce37 100644 --- a/coreneuron/nrniv/netcon.h +++ b/coreneuron/nrniv/netcon.h @@ -35,7 +35,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #if MAC #define NetCon nrniv_Dinfo #endif - +namespace coreneuron { class PreSyn; class InputPreSyn; class TQItem; @@ -183,5 +183,5 @@ class NetParEvent : public DiscreteEvent { virtual void pr(const char*, double t, NetCvode*); }; - +} //namespace coreneuron #endif diff --git a/coreneuron/nrniv/netcvode.cpp b/coreneuron/nrniv/netcvode.cpp index aee74cc96..dd269a4b6 100644 --- a/coreneuron/nrniv/netcvode.cpp +++ b/coreneuron/nrniv/netcvode.cpp @@ -45,7 +45,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #ifdef _OPENACC #include #endif - +namespace coreneuron { #define PP2NT(pp) (nrn_threads + (pp)->_tid) #define PP2t(pp) (PP2NT(pp)->_t) #define POINT_RECEIVE(type, tar, w, f) (*pnt_receive[type])(tar, w, f) @@ -65,7 +65,6 @@ void mk_netcvode() { } } -extern "C" { //TODO following declarations dont appears in any include files extern short* nrn_artcell_qindex_; extern bool nrn_use_localgid_; @@ -86,7 +85,6 @@ static int nrn_errno_check(int type) { return 1; } #endif -} // for _OPENACC and/or NET_RECEIVE_BUFFERING // sem 0:3 send event move @@ -823,3 +821,4 @@ void NetCvode::deliver_net_events(NrnThread* nt) { // for default method (*net_buf_receive_[i])(nt); } } +} //namespace coreneuron diff --git a/coreneuron/nrniv/netcvode.h b/coreneuron/nrniv/netcvode.h index f902d9bf4..338490502 100644 --- a/coreneuron/nrniv/netcvode.h +++ b/coreneuron/nrniv/netcvode.h @@ -43,7 +43,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #else #define QTYPE pq_que #endif - +namespace coreneuron { class DiscreteEvent; class NetCvode; @@ -92,5 +92,5 @@ class NetCvode { void init_events(); void point_receive(int, Point_process*, double*, double); }; - +} //namespace coreneuron #endif diff --git a/coreneuron/nrniv/netpar.cpp b/coreneuron/nrniv/netpar.cpp index 8e1de70fa..10c9eda44 100644 --- a/coreneuron/nrniv/netpar.cpp +++ b/coreneuron/nrniv/netpar.cpp @@ -35,8 +35,6 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrnmpi/nrnmpi.h" #include "coreneuron/nrnoc/nrnoc_decl.h" #include "coreneuron/nrnmpi/nrnmpidec.h" -class PreSyn; -class InputPreSyn; #include "coreneuron/nrniv/netcon.h" #include "coreneuron/nrniv/netcvode.h" @@ -45,24 +43,27 @@ class InputPreSyn; #include "coreneuron/nrniv/multisend.h" #include "coreneuron/nrniv/nrn_assert.h" +namespace coreneuron { + +class PreSyn; +class InputPreSyn; + static double t_exchange_; static double dt1_; // 1/dt -extern "C" { void nrn_spike_exchange_init(); -} - +} //namespace coreneuron #if NRNMPI #include "coreneuron/nrnmpi/mpispike.h" -extern "C" { +namespace coreneuron { + void nrn_timeout(int); void nrn_spike_exchange(NrnThread*); extern int nrnmpi_int_allmax(int); extern void nrnmpi_int_allgather(int*, int*, int); void nrn2ncs_outputevent(int netcon_output_index, double firetime); -} // for compressed gid info during spike exchange bool nrn_use_localgid_; @@ -675,7 +676,7 @@ static void mk_localgid_rep() { // set the third arg to 1 and set the output cell thresholds very // high so that they do not themselves generate spikes. // Can only be called by thread 0 because of the ps->send. -extern "C" void nrn_fake_fire(int gid, double spiketime, int fake_out) { +void nrn_fake_fire(int gid, double spiketime, int fake_out) { std::map::iterator gid2in_it; gid2in_it = gid2in.find(gid); if (gid2in_it != gid2in.end()) { @@ -914,3 +915,4 @@ int nrnmpi_spike_compress(int nspike, bool gid_compress, int xchng_meth) { return 0; #endif } +} //namespace coreneuron diff --git a/coreneuron/nrniv/node_permute.cpp b/coreneuron/nrniv/node_permute.cpp index 2676d5a62..242f29b6b 100644 --- a/coreneuron/nrniv/node_permute.cpp +++ b/coreneuron/nrniv/node_permute.cpp @@ -72,7 +72,7 @@ so pdata_m(k, isz) = inew + data_t #include #include #include - +namespace coreneuron { template void permute(T* data, int cnt, int sz, int layout, int* p) { // data(p[icnt], isz) <- data(icnt, isz) @@ -329,3 +329,4 @@ void permute_nodeindices(Memb_list* ml, int* p) { invert_permute(ml->_permute, ml->nodecount); permute_ptr(ml->nodeindices, ml->nodecount, ml->_permute); } +} //namespace coreneuron diff --git a/coreneuron/nrniv/node_permute.h b/coreneuron/nrniv/node_permute.h index 3aa76a02d..3fb7257b7 100644 --- a/coreneuron/nrniv/node_permute.h +++ b/coreneuron/nrniv/node_permute.h @@ -1,6 +1,6 @@ #ifndef node_permute_h #define node_permute_h - +namespace coreneuron { struct NrnThread; struct Memb_list; @@ -18,5 +18,5 @@ void permute_ml(Memb_list* ml, int type, NrnThread& nt); int nrn_index_permute(int, int type, Memb_list* ml); int* inverse_permute(int* p, int n); - +} //namespace coreneuron #endif diff --git a/coreneuron/nrniv/nrn_acc_manager.cpp b/coreneuron/nrniv/nrn_acc_manager.cpp index 6be3020ca..afb7fa562 100644 --- a/coreneuron/nrniv/nrn_acc_manager.cpp +++ b/coreneuron/nrniv/nrn_acc_manager.cpp @@ -18,7 +18,7 @@ #ifdef CRAYPAT #include #endif - +namespace coreneuron { extern InterleaveInfo* interleave_info; void copy_ivoc_vect_to_device(IvocVect*& iv, IvocVect*& div); @@ -797,10 +797,6 @@ void update_nrnthreads_on_device(NrnThread* threads, int nthreads) { #endif } -#ifdef __cplusplus -extern "C" { -#endif - void update_matrix_from_gpu(NrnThread* _nt) { #ifdef _OPENACC if (_nt->compute_gpu && (_nt->end > 0)) { @@ -853,10 +849,6 @@ void update_matrix_to_gpu(NrnThread* _nt) { #endif } -#ifdef __cplusplus -} -#endif - void finalize_data_on_device() { /*@todo: when we have used random123 on gpu and we do this finalize, I am seeing cuCtxDestroy returned CUDA_ERROR_INVALID_CONTEXT error. @@ -999,3 +991,5 @@ void nrn_sparseobj_copyto_device(SparseObj* so) { } #endif } +} //namespace coreneuron + diff --git a/coreneuron/nrniv/nrn_acc_manager.h b/coreneuron/nrniv/nrn_acc_manager.h index d0cc70ae8..a3e785e4f 100644 --- a/coreneuron/nrniv/nrn_acc_manager.h +++ b/coreneuron/nrniv/nrn_acc_manager.h @@ -6,7 +6,7 @@ #endif #include "coreneuron/nrnoc/multicore.h" - +namespace coreneuron { void setup_nrnthreads_on_device(NrnThread* threads, int nthreads); void update_nrnthreads_on_host(NrnThread* threads, int nthreads); void update_nrnthreads_on_device(NrnThread* threads, int nthreads); @@ -14,18 +14,11 @@ void modify_data_on_device(NrnThread* threads, int nthreads); void dump_nt_to_file(char* filename, NrnThread* threads, int nthreads); void finalize_data_on_device(); -#ifdef __cplusplus -extern "C" { -#endif - void update_matrix_from_gpu(NrnThread* _nt); void update_matrix_to_gpu(NrnThread* _nt); void update_net_receive_buffer(NrnThread* _nt); void realloc_net_receive_buffer(NrnThread* nt, Memb_list* ml); void update_net_send_buffer_on_host(NrnThread* nt, NetSendBuffer_t* nsb); -#ifdef __cplusplus -} -#endif - +} //namespace coreneuron #endif // _nrn_device_manager_ diff --git a/coreneuron/nrniv/nrn_checkpoint.cpp b/coreneuron/nrniv/nrn_checkpoint.cpp index e11e2650e..a2574cd39 100644 --- a/coreneuron/nrniv/nrn_checkpoint.cpp +++ b/coreneuron/nrniv/nrn_checkpoint.cpp @@ -41,16 +41,16 @@ THE POSSIBILITY OF SUCH DAMAGE. #include #include #include - +namespace coreneuron { bool nrn_checkpoint_arg_exists; int _nrn_skip_initmodel; - +} #define UseFileHandlerWrap 0 #if UseFileHandlerWrap #include - +namespace coreneuron { /// wrapper class for FileHandler used for debugging checkpointing class FileHandlerWrap { public: @@ -91,13 +91,14 @@ class FileHandlerWrap { return *this; } }; - +} //namespace coreneuron #else #define FileHandlerWrap FileHandler #endif // UseFileHandlerWrap +namespace coreneuron { template T* chkpnt_soa2aos(T* data, int cnt, int sz, int layout, int* permute) { // inverse of F -> data. Just a copy if layout=1. If SoA, @@ -759,10 +760,8 @@ static void checkpoint_restore_tqitem(int type, NrnThread& nt, FileHandler& fh) } } -extern "C" { extern int checkpoint_save_patternstim(_threadargsproto_); extern void checkpoint_restore_patternstim(int, double, _threadargsproto_); -} static void write_tqueue(NrnThread& nt, FileHandlerWrap& fh) { // VecPlayContinuous @@ -889,3 +888,4 @@ bool checkpoint_initialize() { return checkpoint_restored_; } +} //namespace coreneuron diff --git a/coreneuron/nrniv/nrn_checkpoint.h b/coreneuron/nrniv/nrn_checkpoint.h index bc6ee24e5..f0625be8b 100644 --- a/coreneuron/nrniv/nrn_checkpoint.h +++ b/coreneuron/nrniv/nrn_checkpoint.h @@ -28,7 +28,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #ifndef _H_NRNCHECKPOINT_ #define _H_NRNCHECKPOINT_ - +namespace coreneuron { class NrnThread; class FileHandler; @@ -110,5 +110,5 @@ typedef struct NrnThreadChkpnt { } NrnThreadChkpnt; extern NrnThreadChkpnt* nrnthread_chkpnt; - +} //namespace coreneuron #endif diff --git a/coreneuron/nrniv/nrn_filehandler.cpp b/coreneuron/nrniv/nrn_filehandler.cpp index 44f1b91d1..f3cdcfe38 100644 --- a/coreneuron/nrniv/nrn_filehandler.cpp +++ b/coreneuron/nrniv/nrn_filehandler.cpp @@ -29,7 +29,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include #include "coreneuron/nrniv/nrn_filehandler.h" #include "coreneuron/nrnconf.h" - +namespace coreneuron { FileHandler::FileHandler(const char* filename, bool reorder) { this->open(filename, reorder); checkpoint(0); @@ -116,3 +116,4 @@ void FileHandler::read_checkpoint_assert() { void FileHandler::close() { F.close(); } +} //namespace coreneuron diff --git a/coreneuron/nrniv/nrn_filehandler.h b/coreneuron/nrniv/nrn_filehandler.h index b936d68b9..15f5a2d85 100644 --- a/coreneuron/nrniv/nrn_filehandler.h +++ b/coreneuron/nrniv/nrn_filehandler.h @@ -35,7 +35,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/utils/endianness.h" #include "coreneuron/utils/swap_endian.h" #include "coreneuron/nrniv/nrn_assert.h" - +namespace coreneuron { /** Encapsulate low-level reading of coreneuron input data files. * * Error handling is simple: abort()! @@ -279,5 +279,5 @@ class FileHandler { F << "chkpnt " << chkpnt++ << "\n"; } }; - +} //namespace coreneuron #endif // ifndef nrn_filehandler_h diff --git a/coreneuron/nrniv/nrn_setup.cpp b/coreneuron/nrniv/nrn_setup.cpp index 1864a8db8..e25368d3a 100644 --- a/coreneuron/nrniv/nrn_setup.cpp +++ b/coreneuron/nrniv/nrn_setup.cpp @@ -117,7 +117,7 @@ THE POSSIBILITY OF SUCH DAMAGE. // For this reason cellgroup data are divided into two separate // files with the first containing output_gids and netcon_srcgid which are // stored in the nt.presyns array and nt.netcons array respectively - +namespace coreneuron { int nrn_setup_multiple = 1; /* default */ int nrn_setup_extracon = 0; /* default */ static int maxgid; @@ -738,7 +738,7 @@ void read_phasegap(FileHandler& F, int imult, NrnThread& nt) { } int nrn_soa_padded_size(int cnt, int layout) { - return coreneuron::soa_padded_size(cnt, layout); + return soa_padded_size(cnt, layout); } static size_t nrn_soa_byte_align(size_t i) { @@ -1069,9 +1069,9 @@ void read_phase2(FileHandler& F, int imult, NrnThread& nt) { } if (shadow_rhs_cnt) { - nt._shadow_rhs = (double*)coreneuron::ecalloc_align(nrn_soa_padded_size(shadow_rhs_cnt, 0), + nt._shadow_rhs = (double*)ecalloc_align(nrn_soa_padded_size(shadow_rhs_cnt, 0), NRN_SOA_BYTE_ALIGN, sizeof(double)); - nt._shadow_d = (double*)coreneuron::ecalloc_align(nrn_soa_padded_size(shadow_rhs_cnt, 0), + nt._shadow_d = (double*)ecalloc_align(nrn_soa_padded_size(shadow_rhs_cnt, 0), NRN_SOA_BYTE_ALIGN, sizeof(double)); nt.shadow_rhs_cnt = shadow_rhs_cnt; } @@ -1130,7 +1130,7 @@ void read_phase2(FileHandler& F, int imult, NrnThread& nt) { // now that we know the effect of padding, we can allocate data space, // fill matrix, and adjust Memb_list data pointers - nt._data = (double*)coreneuron::ecalloc_align(nt._ndata, NRN_SOA_BYTE_ALIGN, sizeof(double)); + nt._data = (double*)ecalloc_align(nt._ndata, NRN_SOA_BYTE_ALIGN, sizeof(double)); nt._actual_rhs = nt._data + 0 * ne; nt._actual_d = nt._data + 1 * ne; nt._actual_a = nt._data + 2 * ne; @@ -1144,7 +1144,7 @@ void read_phase2(FileHandler& F, int imult, NrnThread& nt) { } // matrix info - nt._v_parent_index = (int*)coreneuron::ecalloc_align(nt.end, NRN_SOA_BYTE_ALIGN, sizeof(int)); + nt._v_parent_index = (int*)ecalloc_align(nt.end, NRN_SOA_BYTE_ALIGN, sizeof(int)); F.read_array(nt._v_parent_index, nt.end); #if CHKPNTDEBUG ntc.parent = new int[nt.end]; @@ -1178,7 +1178,7 @@ void read_phase2(FileHandler& F, int imult, NrnThread& nt) { if (!is_art) { ml->nodeindices = - (int*)coreneuron::ecalloc_align(ml->nodecount, NRN_SOA_BYTE_ALIGN, sizeof(int)); + (int*)ecalloc_align(ml->nodecount, NRN_SOA_BYTE_ALIGN, sizeof(int)); F.read_array(ml->nodeindices, ml->nodecount); } else { ml->nodeindices = NULL; @@ -1188,7 +1188,7 @@ void read_phase2(FileHandler& F, int imult, NrnThread& nt) { mech_layout(F, ml->data, n, szp, layout); if (szdp) { - ml->pdata = (int*)coreneuron::ecalloc_align(nrn_soa_padded_size(n, layout) * szdp, + ml->pdata = (int*)ecalloc_align(nrn_soa_padded_size(n, layout) * szdp, NRN_SOA_BYTE_ALIGN, sizeof(int)); mech_layout(F, ml->pdata, n, szdp, layout); #if CHKPNTDEBUG // Not substantive. Only for debugging. @@ -1983,3 +1983,4 @@ size_t model_size(void) { return nbyte; } +} //namespace coreneuron diff --git a/coreneuron/nrniv/nrn_setup.h b/coreneuron/nrniv/nrn_setup.h index 4c3c680fb..e7e7584d4 100644 --- a/coreneuron/nrniv/nrn_setup.h +++ b/coreneuron/nrniv/nrn_setup.h @@ -33,7 +33,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrnoc/multicore.h" #include "coreneuron/nrniv/nrn_filehandler.h" #include "coreneuron/utils/sdprintf.h" - +namespace coreneuron { static int ngroup_w; static int* gidgroups_w; static int* imult_w; @@ -146,5 +146,5 @@ namespace coreneuron { nrn_multithread_job(phase_wrapper_w

); } } // namespace coreneuron - +} //namespace coreneuron #endif diff --git a/coreneuron/nrniv/nrn_stats.cpp b/coreneuron/nrniv/nrn_stats.cpp index 18480b4dd..bc1ee35f2 100644 --- a/coreneuron/nrniv/nrn_stats.cpp +++ b/coreneuron/nrniv/nrn_stats.cpp @@ -42,6 +42,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrniv/netcvode.h" #include "coreneuron/nrniv/partrans.h" #include "coreneuron/nrniv/output_spikes.h" +namespace coreneuron { extern NetCvode* net_cvode_instance; const int NUM_STATS = 12; @@ -211,3 +212,4 @@ void report_cell_stats(void) { if (nrnmpi_myid == 0) printf("\n\n"); } +} //namespace diff --git a/coreneuron/nrniv/nrn_stats.h b/coreneuron/nrniv/nrn_stats.h index 1466638d2..d17c4c4a2 100644 --- a/coreneuron/nrniv/nrn_stats.h +++ b/coreneuron/nrniv/nrn_stats.h @@ -35,7 +35,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #ifndef _H_NRN_STATS_ #define _H_NRN_STATS_ - +namespace coreneuron { /** @brief Reports global cell statistics of the simulation * * This routine prints the global number of cells, synapses of the simulation @@ -44,4 +44,5 @@ THE POSSIBILITY OF SUCH DAMAGE. */ void report_cell_stats(void); +} //namespace coreneuron #endif /* ifndef _H_NRN_STATS_ */ diff --git a/coreneuron/nrniv/nrniv_decl.h b/coreneuron/nrniv/nrniv_decl.h index 7c803f5db..3e88b3de2 100644 --- a/coreneuron/nrniv/nrniv_decl.h +++ b/coreneuron/nrniv/nrniv_decl.h @@ -34,7 +34,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrniv/netcon.h" #include "coreneuron/utils/endianness.h" #include "coreneuron/nrniv/nrnoptarg.h" - +namespace coreneuron { extern int cvode_active_; /// Vector of maps for negative presyns extern std::vector > neg_gid2out; @@ -81,5 +81,5 @@ extern int nrn_soa_padded_size(int cnt, int layout); extern int use_interleave_permute; extern int cellorder_nwarp; - +} //namespace coreneuron #endif diff --git a/coreneuron/nrniv/nrnoptarg.cpp b/coreneuron/nrniv/nrnoptarg.cpp index bf9dad3df..519b5c18f 100644 --- a/coreneuron/nrniv/nrnoptarg.cpp +++ b/coreneuron/nrniv/nrnoptarg.cpp @@ -32,7 +32,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrnmpi/nrnmpi.h" #include "coreneuron/nrniv/nrnoptarg.h" #include "coreneuron/utils/ezoption/ezOptionParser.hpp" - +namespace coreneuron { struct param_int { const char* names; /* space separated (includes - or --) */ int dflt, low, high; @@ -368,3 +368,4 @@ static void graceful_exit(int err) { #endif exit(nrnmpi_myid == 0 ? err : 0); } +} //namespace coreneuron diff --git a/coreneuron/nrniv/nrnoptarg.h b/coreneuron/nrniv/nrnoptarg.h index 546af9789..aab84878f 100644 --- a/coreneuron/nrniv/nrnoptarg.h +++ b/coreneuron/nrniv/nrnoptarg.h @@ -40,7 +40,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #define nrnoptarg_h #include - +namespace coreneuron { // before nrnopt_parse() void nrnopt_add_flag(const char* names, const char* usage); void nrnopt_add_int(const char* names, const char* usage, int dflt, int low, int high); @@ -57,5 +57,5 @@ int nrnopt_get_int(const char* name); double nrnopt_get_dbl(const char* name); std::string nrnopt_get_str(const char* name); void nrnopt_modify_dbl(const char* name, double value); - +} //namespace coreneuron #endif diff --git a/coreneuron/nrniv/output_spikes.cpp b/coreneuron/nrniv/output_spikes.cpp index 74c409b25..6c8e869ed 100644 --- a/coreneuron/nrniv/output_spikes.cpp +++ b/coreneuron/nrniv/output_spikes.cpp @@ -39,6 +39,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrnmpi/nrnmpi_impl.h" #include "coreneuron/nrnmpi/nrnmpidec.h" +namespace coreneuron { std::vector spikevec_time; std::vector spikevec_gid; @@ -168,3 +169,4 @@ void validation(std::vector >& res) { if (spikevec_gid[i] > -1) res.push_back(std::make_pair(spikevec_time[i], spikevec_gid[i])); } +} //namespace coreneuron diff --git a/coreneuron/nrniv/output_spikes.h b/coreneuron/nrniv/output_spikes.h index 6ce2fe5e8..f4ab23837 100644 --- a/coreneuron/nrniv/output_spikes.h +++ b/coreneuron/nrniv/output_spikes.h @@ -31,7 +31,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include #include - +namespace coreneuron { void output_spikes(const char* outpath); void mk_spikevec_buffer(int); @@ -42,5 +42,5 @@ void validation(std::vector >& res); void spikevec_lock(); void spikevec_unlock(); - +} //namespace coreneuron #endif diff --git a/coreneuron/nrniv/partrans.cpp b/coreneuron/nrniv/partrans.cpp index 4548a2d6f..5f855e0d9 100644 --- a/coreneuron/nrniv/partrans.cpp +++ b/coreneuron/nrniv/partrans.cpp @@ -9,7 +9,7 @@ // assert that all HalfGaps are of the same type // assert that every HalfGap instance in the thread have been a // ParallelContext.target(&HalfGap.vpre, sid) - +namespace coreneuron { int nrn_have_gaps; using namespace nrn_partrans; @@ -178,3 +178,4 @@ void nrn_partrans::gap_update_indices() { } } } +} //namespace coreneuron diff --git a/coreneuron/nrniv/partrans.h b/coreneuron/nrniv/partrans.h index b1c894360..0ea672902 100644 --- a/coreneuron/nrniv/partrans.h +++ b/coreneuron/nrniv/partrans.h @@ -1,6 +1,6 @@ #ifndef partrans_h #define partrans_h - +namespace coreneuron { struct Memb_list; namespace nrn_partrans { @@ -57,5 +57,5 @@ namespace nrn_partrans { extern double* outsrc_buf_; // Send buffer for gap voltages extern int *insrccnt_, *insrcdspl_, *outsrccnt_, *outsrcdspl_; } - +} //namespace coreneuron #endif /*partrans_h*/ diff --git a/coreneuron/nrniv/partrans_setup.cpp b/coreneuron/nrniv/partrans_setup.cpp index 1f2c0e99c..fa4caf5b9 100644 --- a/coreneuron/nrniv/partrans_setup.cpp +++ b/coreneuron/nrniv/partrans_setup.cpp @@ -5,8 +5,8 @@ #include "coreneuron/nrniv/partrans.h" #include #include - -using namespace ::nrn_partrans; +namespace coreneuron { +using namespace coreneuron::nrn_partrans; nrn_partrans::SetupInfo* nrn_partrans::setup_info_; @@ -16,6 +16,7 @@ class SidData { std::vector indices_; }; +} //namespace coreneuron #if NRNLOGSGID #define sgid_alltoallv nrnmpi_long_alltoallv #else @@ -27,6 +28,8 @@ class SidData { #define HAVEWANT2Int std::map #include "coreneuron/nrniv/have2want.h" +namespace coreneuron { +using namespace coreneuron::nrn_partrans; nrn_partrans::TransferThreadData::TransferThreadData() { halfgap_ml = NULL; nsrc = 0; @@ -287,3 +290,4 @@ void nrn_partrans::gap_indices_permute(NrnThread& nt) { delete[] oldisi; } } +} //namespace coreneuron diff --git a/coreneuron/nrniv/patternstim.cpp b/coreneuron/nrniv/patternstim.cpp index 114911b16..e30b13b76 100644 --- a/coreneuron/nrniv/patternstim.cpp +++ b/coreneuron/nrniv/patternstim.cpp @@ -44,7 +44,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrniv/output_spikes.h" #include "coreneuron/nrniv/nrn_assert.h" -extern "C" { +namespace coreneuron { void _pattern_reg(void); extern void pattern_stim_setup_helper(int size, double* tvec, @@ -56,7 +56,6 @@ extern void pattern_stim_setup_helper(int size, ThreadDatum* _thread, NrnThread* _nt, double v); -} static size_t read_raster_file(const char* fname, double** tvec, int** gidvec); @@ -251,3 +250,4 @@ Point_process* nrn_artcell_instantiate(const char* mechname) { return pnt; } +} diff --git a/coreneuron/nrniv/prcellstate.cpp b/coreneuron/nrniv/prcellstate.cpp index b4b53f5b0..6e2eb58d2 100644 --- a/coreneuron/nrniv/prcellstate.cpp +++ b/coreneuron/nrniv/prcellstate.cpp @@ -38,7 +38,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrniv/nrn_assert.h" #define precision 15 - +namespace coreneuron { static std::map pnt2index; // for deciding if NetCon is to be printed static int pntindex; // running count of printed point processes. static std::map map_nc2src; @@ -295,3 +295,4 @@ int prcellstate(int gid, const char* suffix) { } return 0; } +} //namespace coreneuron diff --git a/coreneuron/nrniv/profiler_interface.cpp b/coreneuron/nrniv/profiler_interface.cpp index 2deb39903..da7d90882 100644 --- a/coreneuron/nrniv/profiler_interface.cpp +++ b/coreneuron/nrniv/profiler_interface.cpp @@ -14,10 +14,13 @@ #if defined(_OPENACC) #include +namespace coreneuron { static int cray_acc_debug_orig = 0; static int cray_acc_debug_zero = 0; +} //namespace coreneuron #endif +namespace coreneuron { void start_profile() { @@ -62,3 +65,4 @@ void stop_profile() { TAU_DISABLE_INSTRUMENTATION(); #endif } +}//namespace coreneuron diff --git a/coreneuron/nrniv/profiler_interface.h b/coreneuron/nrniv/profiler_interface.h index ca851a288..74446928e 100644 --- a/coreneuron/nrniv/profiler_interface.h +++ b/coreneuron/nrniv/profiler_interface.h @@ -1,7 +1,8 @@ #ifndef _profiler_interface_h_ #define _profiler_interface_h_ - +namespace coreneuron { void start_profile(); void stop_profile(); +} #endif diff --git a/coreneuron/nrniv/tnode.h b/coreneuron/nrniv/tnode.h index b7f1bbe84..b8c45c22b 100644 --- a/coreneuron/nrniv/tnode.h +++ b/coreneuron/nrniv/tnode.h @@ -4,7 +4,7 @@ #include // experiment with ordering strategies for Tree Nodes - +namespace coreneuron { class TNode; typedef std::vector VecTNode; @@ -36,5 +36,5 @@ size_t dist2child(TNode* nd); size_t warp_balance(size_t ncell, VecTNode& nodevec); #define warpsize 32 - +} #endif diff --git a/coreneuron/nrniv/tqueue.cpp b/coreneuron/nrniv/tqueue.cpp index d78351b9b..48a99994a 100644 --- a/coreneuron/nrniv/tqueue.cpp +++ b/coreneuron/nrniv/tqueue.cpp @@ -38,7 +38,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #else #define STAT(arg) /**/ #endif - +namespace coreneuron { // splay tree + bin queue limited to fixed step method // for event-sets or priority queues // this starts from the sptqueue.cpp file and adds a bin queue @@ -598,3 +598,4 @@ void spdelete(SPBLK* n, SPTREE* q) { } } /* spdelete */ +}//namespace coreneuron diff --git a/coreneuron/nrniv/tqueue.h b/coreneuron/nrniv/tqueue.h index 18224efdf..219942cf5 100644 --- a/coreneuron/nrniv/tqueue.h +++ b/coreneuron/nrniv/tqueue.h @@ -55,6 +55,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include #include "coreneuron/nrniv/nrnmutdec.h" +namespace coreneuron { #define COLLECT_TQueue_STATISTICS 0 #define STRCMP(a, b) (a - b) @@ -66,13 +67,13 @@ class TQItem; #define cnt cnt_ #define key t_ -typedef struct SPTREE { +struct SPTREE { SPBLK* root; /* root node */ /* Statistics, not strictly necessary, but handy for tuning */ int enqcmps; /* compares in spenq */ -} SPTREE; +}; #define spinit sptq_spinit #define spenq sptq_spenq @@ -213,6 +214,6 @@ class TQueue { unsigned long ncompare, nleastsrch, nfind, nfindsrch, nmove, nfastmove; #endif }; - +} //namespace coreneuron #include "coreneuron/nrniv/tqueue.ipp" #endif diff --git a/coreneuron/nrniv/tqueue.ipp b/coreneuron/nrniv/tqueue.ipp index 9f4bb166f..c4bb46a72 100644 --- a/coreneuron/nrniv/tqueue.ipp +++ b/coreneuron/nrniv/tqueue.ipp @@ -41,7 +41,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #else #define STAT(arg) /**/ #endif - +namespace coreneuron { // splay tree + bin queue limited to fixed step method // for event-sets or priority queues // this starts from the sptqueue.cpp file and adds a bin queue @@ -358,5 +358,5 @@ inline TQItem* TQueue::atomic_dq(double tt) { MUTUNLOCK return q; } - +} //namespace coreneuron #endif diff --git a/coreneuron/nrniv/vrecitem.h b/coreneuron/nrniv/vrecitem.h index 16f739b4f..bfe05b17b 100644 --- a/coreneuron/nrniv/vrecitem.h +++ b/coreneuron/nrniv/vrecitem.h @@ -31,7 +31,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrniv/netcon.h" #include "coreneuron/nrniv/ivocvect.h" - +namespace coreneuron { class PlayRecord; #define VecPlayContinuousType 4 @@ -108,5 +108,5 @@ class VecPlayContinuous : public PlayRecord { PlayRecordEvent* e_; }; - +} //namespace coreneuron #endif diff --git a/coreneuron/nrniv/vrecord.cpp b/coreneuron/nrniv/vrecord.cpp index 62ed209dc..35f854b58 100644 --- a/coreneuron/nrniv/vrecord.cpp +++ b/coreneuron/nrniv/vrecord.cpp @@ -33,7 +33,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrniv/ivocvect.h" #include "coreneuron/nrniv/netcvode.h" #include "coreneuron/nrniv/vrecitem.h" - +namespace coreneuron { extern NetCvode* net_cvode_instance; PlayRecordEvent::PlayRecordEvent() { @@ -178,3 +178,4 @@ void VecPlayContinuous::pr() { printf("VecPlayContinuous "); // printf("%s.x[%d]\n", hoc_object_name(y_->obj_), last_index_); } +} //namespace coreneuron diff --git a/coreneuron/nrnmpi/mpispike.c b/coreneuron/nrnmpi/mpispike.cpp similarity index 99% rename from coreneuron/nrnmpi/mpispike.c rename to coreneuron/nrnmpi/mpispike.cpp index 14aed9e36..01a65abd3 100644 --- a/coreneuron/nrnmpi/mpispike.c +++ b/coreneuron/nrnmpi/mpispike.cpp @@ -37,6 +37,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #if NRNMPI #include +namespace coreneuron { static int np; static int* displs; static int* byteovfl; /* for the compressed transfer method */ @@ -564,5 +565,5 @@ int nrnmpi_multisend_conserve(int nsend, int nrecv) { } #endif /*NRN_MULTISEND*/ - +} //namespace coreneuron #endif /*NRNMPI*/ diff --git a/coreneuron/nrnmpi/mpispike.h b/coreneuron/nrnmpi/mpispike.h index a63923c9b..b6a24300d 100644 --- a/coreneuron/nrnmpi/mpispike.h +++ b/coreneuron/nrnmpi/mpispike.h @@ -36,16 +36,14 @@ THE POSSIBILITY OF SUCH DAMAGE. #endif #if nrn_spikebuf_size > 0 -typedef struct { +struct NRNMPI_Spikebuf{ int nspike; int gid[nrn_spikebuf_size]; double spiketime[nrn_spikebuf_size]; -} NRNMPI_Spikebuf; +}; #endif -#if defined(__cplusplus) -extern "C" { -#endif +namespace coreneuron { #define icapacity_ nrnmpi_i_capacity_ #define spikeout_ nrnmpi_spikeout_ @@ -84,8 +82,6 @@ extern NRNMPI_Spikebuf* spbufin_; #endif // NRNMPI -#if defined(__cplusplus) -} -#endif +} //namespace coreneuron #endif diff --git a/coreneuron/nrnmpi/nrnmpi.c b/coreneuron/nrnmpi/nrnmpi.cpp similarity index 99% rename from coreneuron/nrnmpi/nrnmpi.c rename to coreneuron/nrnmpi/nrnmpi.cpp index 11594bebc..eeed756bb 100644 --- a/coreneuron/nrnmpi/nrnmpi.c +++ b/coreneuron/nrnmpi/nrnmpi.cpp @@ -44,6 +44,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include #endif +namespace coreneuron { int nrnmusic; MPI_Comm nrnmpi_world_comm; @@ -215,3 +216,5 @@ int nrnmpi_initialized() { #endif return flag; } + +} //namespace coreneuron diff --git a/coreneuron/nrnmpi/nrnmpi.h b/coreneuron/nrnmpi/nrnmpi.h index e6d5a1904..2771b7d5d 100644 --- a/coreneuron/nrnmpi/nrnmpi.h +++ b/coreneuron/nrnmpi/nrnmpi.h @@ -30,6 +30,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #define nrnmpi_h #include "coreneuron/nrnmpi/nrnmpiuse.h" +namespace coreneuron { /* by default nrnmpi_numprocs_world = nrnmpi_numprocs = nrnmpi_numsubworlds and nrnmpi_myid_world = nrnmpi_myid and the bulletin board and network communication do not easily coexist. ParallelContext.subworlds(nsmall) divides the world into @@ -42,17 +43,11 @@ extern int nrnmpi_myid; /* rank in subworld */ extern int nrnmpi_numprocs_bbs; /* number of subworlds */ extern int nrnmpi_myid_bbs; /* rank in nrn_bbs_comm of rank 0 of a subworld */ -#if defined(__cplusplus) -extern "C" { -#endif void nrn_abort(int errcode); void nrn_fatal_error(const char* msg); double nrn_wtime(); -#if defined(__cplusplus) -} -#endif /*c++*/ #if NRNMPI @@ -61,16 +56,9 @@ typedef struct { double spiketime; } NRNMPI_Spike; -#if defined(__cplusplus) -extern "C" { -#endif - extern int nrnmpi_use; /* NEURON does MPI init and terminate?*/ -#if defined(__cplusplus) -} -#endif /*c++*/ - +} //namespace coreneuron #include "coreneuron/nrnmpi/nrnmpidec.h" #endif /*NRNMPI*/ diff --git a/coreneuron/nrnmpi/nrnmpi_def_cinc.h b/coreneuron/nrnmpi/nrnmpi_def_cinc.h index a6cc97c3b..27a2eff6c 100644 --- a/coreneuron/nrnmpi/nrnmpi_def_cinc.h +++ b/coreneuron/nrnmpi/nrnmpi_def_cinc.h @@ -26,6 +26,7 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +namespace coreneuron { int nrnmpi_use; int nrnmpi_numprocs = 1; /* size */ int nrnmpi_myid = 0; /* rank */ @@ -51,3 +52,4 @@ int nrnmpi_ovfl_; unsigned char* nrnmpi_spikeout_fixed_; unsigned char* nrnmpi_spikein_fixed_; unsigned char* nrnmpi_spikein_fixed_ovfl_; +} //namespace coreneuron diff --git a/coreneuron/nrnmpi/nrnmpi_impl.h b/coreneuron/nrnmpi/nrnmpi_impl.h index 8cd0cafe0..881c9b4ce 100644 --- a/coreneuron/nrnmpi/nrnmpi_impl.h +++ b/coreneuron/nrnmpi/nrnmpi_impl.h @@ -32,10 +32,10 @@ THE POSSIBILITY OF SUCH DAMAGE. #if NRNMPI #include - +namespace coreneuron { extern MPI_Comm nrnmpi_world_comm; extern MPI_Comm nrnmpi_comm; - +} //namespace coreneuron #endif // NRNMPI #endif diff --git a/coreneuron/nrnmpi/nrnmpidec.h b/coreneuron/nrnmpi/nrnmpidec.h index 979360584..74f9b1eec 100644 --- a/coreneuron/nrnmpi/nrnmpidec.h +++ b/coreneuron/nrnmpi/nrnmpidec.h @@ -38,10 +38,7 @@ the prototypes be of the form "type foo(type arg, ...)" #if NRNMPI #include -#if defined(__cplusplus) -extern "C" { -#endif - +namespace coreneuron { /* from bbsmpipack.c */ typedef struct bbsmpibuf { char* buf; @@ -133,8 +130,6 @@ extern int nrnmpi_multisend_single_advance(NRNMPI_Spike* spk); extern int nrnmpi_multisend_conserve(int nsend, int nrecv); #endif -#if defined(__cplusplus) -} -#endif +} //namespace coreneuron #endif #endif diff --git a/coreneuron/nrnoc/capac.c b/coreneuron/nrnoc/capac.cpp similarity index 99% rename from coreneuron/nrnoc/capac.c rename to coreneuron/nrnoc/capac.cpp index 175384b8f..c7519f0dd 100644 --- a/coreneuron/nrnoc/capac.c +++ b/coreneuron/nrnoc/capac.cpp @@ -53,6 +53,8 @@ THE POSSIBILITY OF SUCH DAMAGE. #define _STRIDE _cntml_padded + _iml #endif +namespace coreneuron { + static const char* mechanism[] = {"0", "capacitance", "cm", 0, "i_cap", 0, 0}; void nrn_alloc_capacitance(double*, Datum*, int); void nrn_init_capacitance(NrnThread*, Memb_list*, int); @@ -177,3 +179,4 @@ void nrn_alloc_capacitance(double* data, Datum* pdata, int type) { (void)type; /* unused */ data[0] = DEF_cm; /*default capacitance/cm^2*/ } +} //namespace coreneuron diff --git a/coreneuron/nrnoc/eion.c b/coreneuron/nrnoc/eion.cpp similarity index 99% rename from coreneuron/nrnoc/eion.c rename to coreneuron/nrnoc/eion.cpp index c7cdd9c35..59ba71d9a 100644 --- a/coreneuron/nrnoc/eion.c +++ b/coreneuron/nrnoc/eion.cpp @@ -68,6 +68,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #define _PRAGMA_FOR_SEC_ORDER_CUR_ACC_LOOP_ _Pragma("") #endif +namespace coreneuron { #define nparm 5 static char* mechanism[] = {/*just a template*/ @@ -395,5 +396,5 @@ void second_order_cur(NrnThread* _nt, int secondorder) { } } } - +} //namespace coreneuron #endif diff --git a/coreneuron/nrnoc/fadvance_core.c b/coreneuron/nrnoc/fadvance_core.cpp similarity index 98% rename from coreneuron/nrnoc/fadvance_core.c rename to coreneuron/nrnoc/fadvance_core.cpp index d7b4bcce7..891b32da5 100644 --- a/coreneuron/nrnoc/fadvance_core.c +++ b/coreneuron/nrnoc/fadvance_core.cpp @@ -32,7 +32,8 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrnoc/nrnoc_decl.h" #include "coreneuron/nrniv/nrn_acc_manager.h" #include "coreneuron/coreneuron.h" -extern nrn_flush_reports(double t); // TODO remove when this file goes as cpp +#include "coreneuron/utils/reports/nrnreport.h" +namespace coreneuron { static void* nrn_fixed_step_thread(NrnThread*); static void* nrn_fixed_step_group_thread(NrnThread*); @@ -249,3 +250,4 @@ void* nrn_fixed_step_lastpart(NrnThread* nth) { nrn_deliver_events(nth); /* up to but not past texit */ return (void*)0; } +} //namespace coreneuron diff --git a/coreneuron/nrnoc/finitialize.c b/coreneuron/nrnoc/finitialize.cpp similarity index 98% rename from coreneuron/nrnoc/finitialize.c rename to coreneuron/nrnoc/finitialize.cpp index b88f3b855..c6f8b2972 100644 --- a/coreneuron/nrnoc/finitialize.c +++ b/coreneuron/nrnoc/finitialize.cpp @@ -29,7 +29,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrnconf.h" #include "coreneuron/nrnoc/multicore.h" #include "coreneuron/nrnoc/nrnoc_decl.h" - +namespace coreneuron { void nrn_finitialize(int setv, double v) { int i; NrnThread* _nt; @@ -106,3 +106,4 @@ void nrn_finitialize(int setv, double v) { nrn_spike_exchange(nrn_threads); #endif } +} //namespace coreneuron diff --git a/coreneuron/nrnoc/md1redef.h b/coreneuron/nrnoc/md1redef.h index 3f74af080..f25013140 100644 --- a/coreneuron/nrnoc/md1redef.h +++ b/coreneuron/nrnoc/md1redef.h @@ -53,8 +53,6 @@ THE POSSIBILITY OF SUCH DAMAGE. #undef weights #undef weight_index_ -#define NrnThread _NrnThread -#define Memb_list _Memb_list #define nodelist _nodelist #define nodeindices _nodeindices #define data _data diff --git a/coreneuron/nrnoc/mech_mapping.cpp b/coreneuron/nrnoc/mech_mapping.cpp index 0b2ca0daa..25757c1cc 100644 --- a/coreneuron/nrnoc/mech_mapping.cpp +++ b/coreneuron/nrnoc/mech_mapping.cpp @@ -6,6 +6,7 @@ #include #include +namespace coreneuron { typedef size_t Offset; typedef int MechId; typedef const char* VariableName; @@ -61,3 +62,5 @@ void register_all_variables_offsets(int mech_id, SerializedNames variable_names) } idx++; } + +}//namespace coreneuron diff --git a/coreneuron/nrnoc/mech_mapping.hpp b/coreneuron/nrnoc/mech_mapping.hpp index 7c2449bde..c70fe54d7 100644 --- a/coreneuron/nrnoc/mech_mapping.hpp +++ b/coreneuron/nrnoc/mech_mapping.hpp @@ -18,24 +18,19 @@ * This means the first categorie with names {name1,name2}, * the second categorie with {name3, name4}, 2 last categories are empty */ -#if defined(__cplusplus) -#define EXTERN_C extern "C" -#else -#define EXTERN_C -#endif - +namespace coreneuron { struct Memb_list; typedef const char** SerializedNames; // return pointer to value of a variable's mechanism, or nullptr if not found -EXTERN_C double* get_var_location_from_var_name(int mech_id, +extern double* get_var_location_from_var_name(int mech_id, const char* variable_name, Memb_list* ml, int local_index); // initialize mapping of variable names of mechanism, to their places in memory -EXTERN_C void register_all_variables_offsets(int mech_id, SerializedNames variable_names); +extern void register_all_variables_offsets(int mech_id, SerializedNames variable_names); -#undef EXTERN_C +} //namespace coreneuron #endif diff --git a/coreneuron/nrnoc/membfunc.h b/coreneuron/nrnoc/membfunc.h index 974483c85..c020a7f95 100644 --- a/coreneuron/nrnoc/membfunc.h +++ b/coreneuron/nrnoc/membfunc.h @@ -29,23 +29,21 @@ THE POSSIBILITY OF SUCH DAMAGE. #ifndef nrn_memb_func_h #define nrn_memb_func_h -#if defined(__cplusplus) -extern "C" { -#endif #include "coreneuron/nrnoc/nrnoc_ml.h" +namespace coreneuron { typedef Datum* (*Pfrpdat)(void); struct NrnThread; typedef void (*mod_alloc_t)(double*, Datum*, int); -typedef void (*mod_f_t)(struct NrnThread*, Memb_list*, int); +typedef void (*mod_f_t)(NrnThread*, Memb_list*, int); typedef void (*pnt_receive_t)(Point_process*, int, double); /* * Memb_func structure contains all related informations of a mechanism */ -typedef struct Memb_func { +struct Memb_func { mod_alloc_t alloc; mod_f_t current; mod_f_t jacob; @@ -61,7 +59,7 @@ typedef struct Memb_func { int is_point; void (*setdata_)(double*, Datum*); int* dparam_semantics; /* for nrncore writing. */ -} Memb_func; +}; #define VINDEX -1 #define CABLESECTION 1 @@ -79,11 +77,11 @@ typedef struct Memb_func { #define AFTER_SOLVE 3 #define BEFORE_STEP 4 #define BEFORE_AFTER_SIZE 5 /* 1 more than the previous */ -typedef struct BAMech { +struct BAMech { mod_f_t f; int type; struct BAMech* next; -} BAMech; +}; extern BAMech** bamech_; extern int nrn_ion_global_map_size; @@ -126,7 +124,7 @@ extern int point_register_mech(const char**, void* (*constructor)(), void (*destructor)(), int vectorized); -typedef void (*NetBufReceive_t)(struct NrnThread*); +typedef void (*NetBufReceive_t)(NrnThread*); extern void hoc_register_net_receive_buffering(NetBufReceive_t, int); extern int net_buf_receive_cnt_; extern int* net_buf_receive_type_; @@ -136,11 +134,11 @@ extern void hoc_register_net_send_buffering(int); extern int net_buf_send_cnt_; extern int* net_buf_send_type_; -typedef void (*nrn_watch_check_t)(struct NrnThread*, Memb_list*); +typedef void (*nrn_watch_check_t)(NrnThread*, Memb_list*); extern void hoc_register_watch_check(nrn_watch_check_t, int); extern nrn_watch_check_t* nrn_watch_check; -extern void nrn_jacob_capacitance(struct NrnThread*, Memb_list*, int); +extern void nrn_jacob_capacitance(NrnThread*, Memb_list*, int); extern void nrn_writes_conc(int, int); #if defined(_OPENACC) #pragma acc routine seq @@ -149,19 +147,19 @@ extern void nrn_wrote_conc(int, double*, int, int, double**, double, int); extern void hoc_register_prop_size(int, int, int); extern void hoc_register_dparam_semantics(int type, int, const char* name); -typedef struct { +struct DoubScal{ const char* name; double* pdoub; -} DoubScal; -typedef struct { +}; +struct DoubVec{ const char* name; double* pdoub; int index1; -} DoubVec; -typedef struct { +}; +struct VoidFunc{ const char* name; void (*func)(void); -} VoidFunc; +}; extern void hoc_register_var(DoubScal*, DoubVec*, VoidFunc*); extern void _nrn_layout_reg(int, int); @@ -178,7 +176,7 @@ typedef void (*bbcore_read_t)(double*, double*, Datum*, ThreadDatum*, - struct NrnThread*, + NrnThread*, double); extern bbcore_read_t* nrn_bbcore_read_; @@ -191,7 +189,7 @@ typedef void (*bbcore_write_t)(double*, double*, Datum*, ThreadDatum*, - struct NrnThread*, + NrnThread*, double); extern bbcore_write_t* nrn_bbcore_write_; @@ -212,8 +210,6 @@ extern void net_sem_from_gpu(int, int, int, int, int, double, double); extern void hoc_malchk(void); /* just a stub */ extern void* hoc_Emalloc(size_t); -#if defined(__cplusplus) -} -#endif +} // namespace coreneuron #endif /* nrn_memb_func_h */ diff --git a/coreneuron/nrnoc/multicore.c b/coreneuron/nrnoc/multicore.cpp similarity index 99% rename from coreneuron/nrnoc/multicore.c rename to coreneuron/nrnoc/multicore.cpp index 4a53e50cb..c159fbcc5 100644 --- a/coreneuron/nrnoc/multicore.c +++ b/coreneuron/nrnoc/multicore.cpp @@ -65,6 +65,7 @@ model structure. We want to use Node* as much as possible and defer the handling of v_structure_change as long as possible. */ +namespace coreneuron { #define CACHELINE_ALLOC(name, type, size) \ name = (type*)nrn_cacheline_alloc((void**)&name, size * sizeof(type)) @@ -481,3 +482,4 @@ void nrn_multithread_job(void* (*job)(NrnThread*)) { } #endif } +} // namespace coreneuron diff --git a/coreneuron/nrnoc/multicore.h b/coreneuron/nrnoc/multicore.h index 61edfbbce..c805255d4 100644 --- a/coreneuron/nrnoc/multicore.h +++ b/coreneuron/nrnoc/multicore.h @@ -32,14 +32,9 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrnconf.h" #include "coreneuron/nrnoc/membfunc.h" -#if defined(__cplusplus) +namespace coreneuron { class NetCon; class PreSyn; -extern "C" { -#else -typedef void NetCon; -typedef void PreSyn; -#endif /* Point_process._presyn, used only if its NET_RECEIVE sends a net_event, is @@ -50,26 +45,26 @@ extern int nrn_has_net_event_cnt_; /* how many net_event sender types are there? extern int* nrn_has_net_event_; /* the types that send a net_event */ extern int* pnttype2presyn; /* from the type, which array of pnt2presyn_ix are we talking about. */ -typedef struct NrnThreadMembList { /* patterned after CvMembList in cvodeobj.h */ - struct NrnThreadMembList* next; - struct Memb_list* ml; +struct NrnThreadMembList { /* patterned after CvMembList in cvodeobj.h */ + NrnThreadMembList* next; + Memb_list* ml; int index; int* dependencies; /* list of mechanism types that this mechanism depends on*/ int ndependencies; /* for scheduling we need to know the dependency count */ -} NrnThreadMembList; +}; -typedef struct NrnThreadBAList { - struct Memb_list* ml; /* an item in the NrnThreadMembList */ - struct BAMech* bam; - struct NrnThreadBAList* next; -} NrnThreadBAList; +struct NrnThreadBAList { + Memb_list* ml; /* an item in the NrnThreadMembList */ + BAMech* bam; + NrnThreadBAList* next; +}; /* for OpenACC, in order to avoid an error while update PreSyn, with virtual base * class, we are adding helper with flag variable which could be updated on GPU */ -typedef struct PreSynHelper { int flag_; } PreSynHelper; +struct PreSynHelper { int flag_; }; -typedef struct NrnThread { +struct NrnThread { double _t; double _dt; double cj; @@ -111,7 +106,7 @@ typedef struct NrnThread { int* _v_parent_index; int* _permute; char* _sp13mat; /* handle to general sparse matrix */ - struct Memb_list* _ecell_memb_list; /* normally nil */ + Memb_list* _ecell_memb_list; /* normally nil */ double _ctime; /* computation time in seconds (using nrnmpi_wtime) */ @@ -127,7 +122,8 @@ typedef struct NrnThread { int* _watch_types; /* NULL or 0 terminated array of integers */ void* mapping; /* section to segment mapping information */ -} NrnThread; +}; + extern void nrn_threads_create(int n, int parallel); extern int nrn_nthread; @@ -139,8 +135,6 @@ extern void nrn_threads_free(void); extern int _nrn_skip_initmodel; -#if defined(__cplusplus) -} -#endif +} //namespace coreneuron #endif diff --git a/coreneuron/nrnoc/nrnoc_aux.c b/coreneuron/nrnoc/nrnoc_aux.cpp similarity index 98% rename from coreneuron/nrnoc/nrnoc_aux.c rename to coreneuron/nrnoc/nrnoc_aux.cpp index b796830ed..d671a1b8d 100644 --- a/coreneuron/nrnoc/nrnoc_aux.c +++ b/coreneuron/nrnoc/nrnoc_aux.cpp @@ -32,6 +32,8 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrnoc/multicore.h" #include "coreneuron/nrnmpi/nrnmpidec.h" + +namespace coreneuron { int stoprun; int v_structure_change; int diam_changed; @@ -162,3 +164,4 @@ void check_bbcore_write_version(const char* version) { abort(); } } +} // namespace coreneuron diff --git a/coreneuron/nrnoc/nrnoc_decl.h b/coreneuron/nrnoc/nrnoc_decl.h index c7dcbf123..2d3939c5b 100644 --- a/coreneuron/nrnoc/nrnoc_decl.h +++ b/coreneuron/nrnoc/nrnoc_decl.h @@ -29,9 +29,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #ifndef nrnoc_decl_h #define nrnoc_decl_h -#if defined(__cplusplus) -extern "C" { -#endif +namespace coreneuron { extern int v_structure_change; extern int diam_changed; @@ -77,7 +75,5 @@ extern void nrn_fatal_error(const char* msg); extern void nrn_abort(int errcode); extern double nrn_wtime(void); -#if defined(__cplusplus) } #endif -#endif diff --git a/coreneuron/nrnoc/nrnoc_ml.h b/coreneuron/nrnoc/nrnoc_ml.h index f13c787ec..cbcfc3983 100644 --- a/coreneuron/nrnoc/nrnoc_ml.h +++ b/coreneuron/nrnoc/nrnoc_ml.h @@ -30,23 +30,23 @@ THE POSSIBILITY OF SUCH DAMAGE. #define nrnoc_ml_h #include "coreneuron/nrnconf.h" - +namespace coreneuron { #if PG_ACC_BUGS -typedef struct ThreadDatum { +struct ThreadDatum { int i; double* pval; void* _pvoid; -} ThreadDatum; +}; #else -typedef union ThreadDatum { +union ThreadDatum { double val; int i; double* pval; void* _pvoid; -} ThreadDatum; +}; #endif -typedef struct NetReceiveBuffer_t { +struct NetReceiveBuffer_t { int* _displ; /* _displ_cnt + 1 of these */ int* _nrb_index; /* _cnt of these (order of increasing _pnt_index) */ @@ -58,9 +58,9 @@ typedef struct NetReceiveBuffer_t { int _displ_cnt; /* number of unique _pnt_index */ int _size; /* capacity */ int _pnt_offset; -} NetReceiveBuffer_t; +}; -typedef struct NetSendBuffer_t { +struct NetSendBuffer_t { int* _sendtype; // net_send, net_event, net_move int* _vdata_index; int* _pnt_index; @@ -70,9 +70,9 @@ typedef struct NetSendBuffer_t { int _cnt; int _size; /* capacity */ int reallocated; /* if buffer resized/reallocated, needs to be copy to cpu */ -} NetSendBuffer_t; +}; -typedef struct Memb_list { +struct Memb_list { #if CACHEVEC != 0 /* nodeindices contains all nodes this extension is responsible for, * ordered according to the matrix. This allows to access the matrix @@ -89,6 +89,6 @@ typedef struct Memb_list { NetSendBuffer_t* _net_send_buffer; int nodecount; /* actual node count */ int _nodecount_padded; -} Memb_list; - +}; +} //namespace coreneuron #endif diff --git a/coreneuron/nrnoc/nrntimeout.c b/coreneuron/nrnoc/nrntimeout.cpp similarity index 98% rename from coreneuron/nrnoc/nrntimeout.c rename to coreneuron/nrnoc/nrntimeout.cpp index 628121854..c7d07f7e4 100644 --- a/coreneuron/nrnoc/nrntimeout.c +++ b/coreneuron/nrnoc/nrntimeout.cpp @@ -39,7 +39,7 @@ THE POSSIBILITY OF SUCH DAMAGE. setitimer will conflict with profiler. In that case, user can disable setitimer which is just safety for deadlock situations */ - +namespace coreneuron { #ifdef DISABLE_TIMEOUT void nrn_timeout(int seconds) { @@ -96,5 +96,6 @@ printf("nrn_timeout %d\n", seconds); } #endif /* DISABLE_TIMEOUT */ +} // namespace coreneuron #endif /*NRNMPI*/ diff --git a/coreneuron/nrnoc/register_mech.c b/coreneuron/nrnoc/register_mech.cpp similarity index 99% rename from coreneuron/nrnoc/register_mech.c rename to coreneuron/nrnoc/register_mech.cpp index 01ab82879..c67fb964b 100644 --- a/coreneuron/nrnoc/register_mech.c +++ b/coreneuron/nrnoc/register_mech.cpp @@ -34,7 +34,9 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrnoc/nrnoc_decl.h" #include "coreneuron/nrnmpi/nrnmpi.h" #include "coreneuron/nrnoc/mech_mapping.hpp" +#include "coreneuron/nrnoc/membfunc.h" +namespace coreneuron { int secondorder = 0; double t, dt, celsius; #if defined(PG_ACC_BUGS) @@ -511,3 +513,4 @@ void _nrn_setdata_reg(int i, void (*call)(double*, Datum*)) { memb_func[i].setdata_ = call; } +} // namespace coreneuron diff --git a/coreneuron/nrnoc/register_mech.hpp b/coreneuron/nrnoc/register_mech.hpp new file mode 100644 index 000000000..11b4ff8e1 --- /dev/null +++ b/coreneuron/nrnoc/register_mech.hpp @@ -0,0 +1,11 @@ +#ifndef register_mech_h +#define register_mech_h + +namespace coreneuron { + void hoc_reg_bbcore_read(int type, bbcore_read_t f); + void hoc_reg_bbcore_write(int type, bbcore_write_t f); + +} // namespace coreneuron + +#endif + diff --git a/coreneuron/nrnoc/solve_core.c b/coreneuron/nrnoc/solve_core.cpp similarity index 98% rename from coreneuron/nrnoc/solve_core.c rename to coreneuron/nrnoc/solve_core.cpp index 0bbf9655f..4a3c1378a 100644 --- a/coreneuron/nrnoc/solve_core.c +++ b/coreneuron/nrnoc/solve_core.cpp @@ -29,7 +29,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrnconf.h" #include "coreneuron/nrnoc/multicore.h" #include "coreneuron/nrnoc/nrnoc_decl.h" - +namespace coreneuron { int use_solve_interleave; static void triang(NrnThread*), bksub(NrnThread*); @@ -115,3 +115,4 @@ static void bksub(NrnThread* _nt) { #pragma acc wait(stream_id) // clang-format on } +} //namespace coreneuron diff --git a/coreneuron/nrnoc/treeset_core.c b/coreneuron/nrnoc/treeset_core.cpp similarity index 99% rename from coreneuron/nrnoc/treeset_core.c rename to coreneuron/nrnoc/treeset_core.cpp index 7efd5db37..e6a55a538 100644 --- a/coreneuron/nrnoc/treeset_core.c +++ b/coreneuron/nrnoc/treeset_core.cpp @@ -31,6 +31,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrnoc/nrnoc_decl.h" #include "coreneuron/nrniv/nrn_acc_manager.h" +namespace coreneuron { /* Fixed step method with threads and cache efficiency. No extracellular, sparse matrix, multisplit, or legacy features. @@ -165,3 +166,4 @@ void* setup_tree_matrix_minimal(NrnThread* _nt) { return (void*)0; } +} //namespace coreneuron diff --git a/coreneuron/nrnomp/nrnomp.c b/coreneuron/nrnomp/nrnomp.cpp similarity index 97% rename from coreneuron/nrnomp/nrnomp.c rename to coreneuron/nrnomp/nrnomp.cpp index d8ed1c88a..14aafab9d 100644 --- a/coreneuron/nrnomp/nrnomp.c +++ b/coreneuron/nrnomp/nrnomp.cpp @@ -32,7 +32,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #if defined(_OPENMP) #include #endif // _OPENMP - +namespace coreneuron { int nrnomp_get_numthreads() { #if defined(_OPENMP) return (omp_get_max_threads()); @@ -40,3 +40,4 @@ int nrnomp_get_numthreads() { return 1; #endif } +} //namespace coreneuron diff --git a/coreneuron/nrnomp/nrnomp.h b/coreneuron/nrnomp/nrnomp.h index 39d13140c..19af3d490 100644 --- a/coreneuron/nrnomp/nrnomp.h +++ b/coreneuron/nrnomp/nrnomp.h @@ -29,16 +29,12 @@ THE POSSIBILITY OF SUCH DAMAGE. #ifndef nrnomp_h #define nrnomp_h -#if defined(__cplusplus) -extern "C" { -#endif +namespace coreneuron { /// Get maximum number of OMP threads as defined by the OMP_NUM_THREAS environment variable int nrnomp_get_numthreads(); -#if defined(__cplusplus) -} -#endif /*c++*/ +} // namespace coreneuron #include "coreneuron/nrnmpi/nrnmpidec.h" diff --git a/coreneuron/scopmath_core/abort.c b/coreneuron/scopmath_core/abort.cpp similarity index 98% rename from coreneuron/scopmath_core/abort.c rename to coreneuron/scopmath_core/abort.cpp index 906583679..08cdefe9c 100644 --- a/coreneuron/scopmath_core/abort.c +++ b/coreneuron/scopmath_core/abort.cpp @@ -33,7 +33,7 @@ static char RCSid[] = "abort.c,v 1.2 1997/08/30 14:32:00 hines Exp"; #include #include #include "errcodes.h" - +namespace coreneuron { int abort_run(int code) { switch ((code >= 0) ? code : -code) { case EXCEED_ITERS: @@ -92,3 +92,4 @@ int abort_run(int code) { hoc_execerror("scopmath library error", (char*)0); return 0; } +} //namespace coreneuron diff --git a/coreneuron/scopmath_core/crout_thread.c b/coreneuron/scopmath_core/crout_thread.cpp similarity index 99% rename from coreneuron/scopmath_core/crout_thread.c rename to coreneuron/scopmath_core/crout_thread.cpp index d8ab7bff5..a55ea77d5 100644 --- a/coreneuron/scopmath_core/crout_thread.c +++ b/coreneuron/scopmath_core/crout_thread.cpp @@ -51,7 +51,7 @@ static char RCSid[] = "crout.c,v 1.2 1999/01/04 12:46:43 hines Exp"; #include #include "coreneuron/scopmath_core/errcodes.h" - +namespace coreneuron { #define ix(arg) ((arg)*_STRIDE) /* having a differnt permutation per instance may not be a good idea */ @@ -233,3 +233,4 @@ void nrn_scopmath_solve_thread(int n, } } } +} //namespace coreneuron diff --git a/coreneuron/scopmath_core/dimplic.c b/coreneuron/scopmath_core/dimplic.cpp similarity index 97% rename from coreneuron/scopmath_core/dimplic.c rename to coreneuron/scopmath_core/dimplic.cpp index 795516a63..5b0ff6801 100644 --- a/coreneuron/scopmath_core/dimplic.c +++ b/coreneuron/scopmath_core/dimplic.cpp @@ -15,7 +15,7 @@ #include "coreneuron/mech/cfile/scoplib.h" #include "coreneuron/mech/mod2c_core_thread.h" #include "_kinderiv.h" - +namespace coreneuron { int derivimplicit_thread(int n, int* slist, int* dlist, DIFUN fun, _threadargsproto_) { difun(fun); return 0; @@ -56,3 +56,5 @@ int euler_thread(int neqn, int* var, int* der, DIFUN fun, _threadargsproto_) { return 0; } + +} //namespace coreneuron diff --git a/coreneuron/scopmath_core/errcodes.h b/coreneuron/scopmath_core/errcodes.h index fa6f76e58..25f76e155 100644 --- a/coreneuron/scopmath_core/errcodes.h +++ b/coreneuron/scopmath_core/errcodes.h @@ -8,9 +8,9 @@ * errcodes.h,v 1.1.1.1 1994/10/12 17:22:18 hines Exp * ******************************************************************************/ - -extern int abort_run(int); - +namespace coreneuron { + extern int abort_run(int); +} #define ROUNDOFF 1.e-20 #define ZERO 1.e-8 #define STEP 1.e-6 diff --git a/coreneuron/scopmath_core/newton_struct.h b/coreneuron/scopmath_core/newton_struct.h index 4f157d39b..b3c4182be 100644 --- a/coreneuron/scopmath_core/newton_struct.h +++ b/coreneuron/scopmath_core/newton_struct.h @@ -3,9 +3,7 @@ #include "coreneuron/mech/mod2c_core_thread.h" -#if defined(__cplusplus) -extern "C" { -#endif +namespace coreneuron { /* avoid incessant alloc/free memory */ typedef struct NewtonSpace { @@ -53,8 +51,6 @@ extern void nrn_destroy_newtonspace(NewtonSpace* ns); void nrn_newtonspace_copyto_device(NewtonSpace* ns); -#if defined(__cplusplus) -} -#endif +} //namespace coreneuron #endif diff --git a/coreneuron/scopmath_core/newton_thread.c b/coreneuron/scopmath_core/newton_thread.cpp similarity index 99% rename from coreneuron/scopmath_core/newton_thread.c rename to coreneuron/scopmath_core/newton_thread.cpp index a82049d0c..50ae0d998 100644 --- a/coreneuron/scopmath_core/newton_thread.c +++ b/coreneuron/scopmath_core/newton_thread.cpp @@ -58,6 +58,7 @@ static char RCSid[] = "newton.c,v 1.3 1999/01/04 12:46:48 hines Exp"; #include "coreneuron/mech/mod2c_core_thread.h" #include "coreneuron/scopmath_core/errcodes.h" +namespace coreneuron { #define ix(arg) ((arg)*_STRIDE) #define s_(arg) _p[s[arg] * _STRIDE] @@ -244,3 +245,4 @@ void nrn_destroy_newtonspace(NewtonSpace* ns) { freevector(ns->rowmax); free((char*)ns); } +} //namespace coreneuron diff --git a/coreneuron/scopmath_core/sparse_thread.c b/coreneuron/scopmath_core/sparse_thread.cpp similarity index 99% rename from coreneuron/scopmath_core/sparse_thread.c rename to coreneuron/scopmath_core/sparse_thread.cpp index 628895664..03ec5ea82 100644 --- a/coreneuron/scopmath_core/sparse_thread.c +++ b/coreneuron/scopmath_core/sparse_thread.cpp @@ -90,7 +90,7 @@ extern void nrn_malloc_unlock(); varord[el->row] < varord[el->c_right->row] varord[el->col] < varord[el->r_down->col] */ - +namespace coreneuron { static int matsol(SparseObj* so, int _iml); static void subrow(SparseObj* so, Elm* pivot, Elm* rowsub, int _iml); static void bksub(SparseObj* so, int _iml); @@ -847,3 +847,4 @@ void _nrn_destroy_sparseobj_thread(SparseObj* so) { freelist(so->orderlist); Free(so); } +} //namespace coreneuron diff --git a/coreneuron/scopmath_core/ssimplic_thread.c b/coreneuron/scopmath_core/ssimplic_thread.cpp similarity index 97% rename from coreneuron/scopmath_core/ssimplic_thread.c rename to coreneuron/scopmath_core/ssimplic_thread.cpp index 555fdeccb..e8335cf0d 100644 --- a/coreneuron/scopmath_core/ssimplic_thread.c +++ b/coreneuron/scopmath_core/ssimplic_thread.cpp @@ -1,6 +1,7 @@ #include "coreneuron/mech/cfile/scoplib.h" #include "coreneuron/mech/mod2c_core_thread.h" #include "coreneuron/scopmath_core/errcodes.h" +namespace coreneuron { #define s_(arg) _p[s[arg] * _STRIDE] #pragma acc routine seq @@ -77,3 +78,4 @@ void _modl_set_dt_thread(double dt, NrnThread* nt) { double _modl_get_dt_thread(NrnThread* nt) { return nt->_dt; } +} //namespace coreneuron diff --git a/coreneuron/utils/data_layout.cpp b/coreneuron/utils/data_layout.cpp index 8926e7919..5dda18722 100644 --- a/coreneuron/utils/data_layout.cpp +++ b/coreneuron/utils/data_layout.cpp @@ -4,6 +4,7 @@ #include "coreneuron/nrnoc/nrnoc_decl.h" #include "coreneuron/nrnoc/membfunc.h" +namespace coreneuron { /* * Return the index to mechanism variable based Original input files are organized in AoS */ @@ -15,3 +16,4 @@ int get_data_index(int node_index, int variable_index, int mtype, Memb_list* ml) assert(layout == SOA_LAYOUT); return variable_index * ml->_nodecount_padded + node_index; } +} //namespace coreneuron diff --git a/coreneuron/utils/data_layout.hpp b/coreneuron/utils/data_layout.hpp index dbfabe7a3..f5a3c3993 100644 --- a/coreneuron/utils/data_layout.hpp +++ b/coreneuron/utils/data_layout.hpp @@ -3,8 +3,8 @@ #define SOA_LAYOUT 0 #define AOS_LAYOUT 1 - +namespace coreneuron { struct Memb_list; int get_data_index(int node_index, int variable_index, int mtype, Memb_list* ml); - +} // namespace coreneuron #endif diff --git a/coreneuron/utils/memory_utils.cpp b/coreneuron/utils/memory_utils.cpp index fa2ba01fd..79f6ccaa0 100644 --- a/coreneuron/utils/memory_utils.cpp +++ b/coreneuron/utils/memory_utils.cpp @@ -55,6 +55,8 @@ THE POSSIBILITY OF SUCH DAMAGE. #include #endif +namespace coreneuron { + double nrn_mallinfo(void) { // -ve mem usage for non-supported platforms double mbs = -1.0; @@ -118,3 +120,4 @@ void report_mem_usage(const char* message, bool all_ranks) { } fflush(stdout); } +} //namespace coreneuron diff --git a/coreneuron/utils/memory_utils.h b/coreneuron/utils/memory_utils.h index aa5637d86..3e003f3b9 100644 --- a/coreneuron/utils/memory_utils.h +++ b/coreneuron/utils/memory_utils.h @@ -37,6 +37,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #ifndef NRN_MEMORY_UTILS #define NRN_MEMORY_UTILS +namespace coreneuron { /** @brief Reports current memory usage of the simulator to stdout * * Current implementation is based on mallinfo. This routine prints @@ -52,5 +53,5 @@ void report_mem_usage(const char* message, bool all_ranks = false); * @return memory usage in KBs */ double nrn_mallinfo(void); - +} #endif /* ifndef NRN_MEMORY_UTILS */ diff --git a/coreneuron/utils/randoms/nrnran123.c b/coreneuron/utils/randoms/nrnran123.cpp similarity index 99% rename from coreneuron/utils/randoms/nrnran123.c rename to coreneuron/utils/randoms/nrnran123.cpp index 5e413de16..78a493e88 100644 --- a/coreneuron/utils/randoms/nrnran123.c +++ b/coreneuron/utils/randoms/nrnran123.cpp @@ -32,7 +32,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/utils/randoms/nrnran123.h" #include "coreneuron/utils/randoms/Random123/philox.h" #include "coreneuron/nrniv/nrnmutdec.h" - +namespace coreneuron { static const double SHIFT32 = 1.0 / 4294967297.0; /* 1/(2^32 + 1) */ static philox4x32_key_t k = {{0}}; @@ -164,3 +164,4 @@ double nrnran123_uint2dbl(uint32_t u) { /* min 2.3283064e-10 to max (1 - 2.3283064e-10) */ return ((double)u + 1.0) * SHIFT32; } +} //namespace coreneuron diff --git a/coreneuron/utils/randoms/nrnran123.cu b/coreneuron/utils/randoms/nrnran123.cu index 4576f74b6..3962229b0 100644 --- a/coreneuron/utils/randoms/nrnran123.cu +++ b/coreneuron/utils/randoms/nrnran123.cu @@ -30,7 +30,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include #include #include "coreneuron/utils/randoms/nrnran123.h" - +namespace coreneuron { /* global data structure per process */ __device__ static const double SHIFT32 = 1.0 / 4294967297.0; /* 1/(2^32 + 1) */ __device__ static philox4x32_key_t k = {{0}}; @@ -164,3 +164,4 @@ void nrnran123_deletestream(nrnran123_State* s) { cudaFree(s); } +} //namespace coreneuron diff --git a/coreneuron/utils/randoms/nrnran123.h b/coreneuron/utils/randoms/nrnran123.h index 1d450eab9..52a916f38 100644 --- a/coreneuron/utils/randoms/nrnran123.h +++ b/coreneuron/utils/randoms/nrnran123.h @@ -81,9 +81,7 @@ of the full distribution available from #define nrnran123_getids3 cu_nrnran123_getids3 #endif -#if defined(__cplusplus) -extern "C" { -#endif +namespace coreneuron { typedef struct nrnran123_State { philox4x32_ctr_t c; @@ -156,8 +154,6 @@ extern DEVICE double nrnran123_gauss(nrnran123_State*); /* mean 0.0, std 1.0 */ extern DEVICE nrnran123_array4x32 nrnran123_iran(uint32_t seq, uint32_t id1, uint32_t id2); extern DEVICE double nrnran123_uint2dbl(uint32_t); -#if defined(__cplusplus) -} -#endif +} //namespace coreneuron #endif diff --git a/coreneuron/utils/reports/nrnreport.cpp b/coreneuron/utils/reports/nrnreport.cpp index 53dc4c95e..0170bb517 100644 --- a/coreneuron/utils/reports/nrnreport.cpp +++ b/coreneuron/utils/reports/nrnreport.cpp @@ -43,6 +43,8 @@ THE POSSIBILITY OF SUCH DAMAGE. #include #include +namespace coreneuron { + #ifdef ENABLE_REPORTING class ReportEvent; @@ -354,7 +356,7 @@ static int num_min_delay_to_buffer = 500; /// number of min-delays completed since last flush static int num_min_delays_completed = 0; -extern "C" void nrn_flush_reports(double t) { +void nrn_flush_reports(double t) { #ifdef ENABLE_REPORTING // flush before buffer is full if (num_min_delays_completed >= (num_min_delay_to_buffer - 2)) { @@ -440,3 +442,4 @@ void finalize_report() { reports.clear(); #endif } +} diff --git a/coreneuron/utils/reports/nrnreport.h b/coreneuron/utils/reports/nrnreport.h index c1ef92b2d..dd79496cc 100644 --- a/coreneuron/utils/reports/nrnreport.h +++ b/coreneuron/utils/reports/nrnreport.h @@ -42,13 +42,7 @@ #define MAX_REPORT_NAME_LEN 256 #define MAX_REPORT_PATH_LEN 512 -#if defined(__cplusplus) -#define EXTERN_C extern "C" -#else -#define EXTERN_C -#endif - - +namespace coreneuron { // name of the variable in mod file that is used to indicate which synapse // is enabled or disable for reporting #define SELECTED_VAR_MOD_NAME "selected_for_report" @@ -58,7 +52,7 @@ enum ReportType { SomaReport, CompartmentReport, SynapseReport }; -typedef struct { +struct ReportConfiguration{ char name[MAX_REPORT_NAME_LEN]; // name of the report char output_path[MAX_REPORT_PATH_LEN]; // full path of the report char target_name[MAX_REPORT_NAME_LEN]; // target of the report @@ -74,7 +68,7 @@ typedef struct { double stop; // stop time of report int num_gids; // total number of gids std::set target; // list of gids for this report -} ReportConfiguration; +}; void setup_report_engine(double dt_report, double mindelay); void register_report(double dt, double tstop, double delay, ReportConfiguration& config); @@ -82,6 +76,6 @@ std::vector create_report_configurations(const char* filena const char* output_dir); void setup_report_engine(double dt_report, double mindelay); void finalize_report(); -EXTERN_C void nrn_flush_reports(double t); - +void nrn_flush_reports(double t); +} //namespace coreneuron #endif //_H_NRN_REPORT_ diff --git a/coreneuron/utils/reports/report_configuration_parser.cpp b/coreneuron/utils/reports/report_configuration_parser.cpp index 075742e34..33bf5243c 100644 --- a/coreneuron/utils/reports/report_configuration_parser.cpp +++ b/coreneuron/utils/reports/report_configuration_parser.cpp @@ -38,6 +38,8 @@ #define MAX_LINE_LENGTH 4096 +namespace coreneuron { + /* * Split filter string ("mech.var_name") into mech_id and var_name */ @@ -115,3 +117,4 @@ std::vector create_report_configurations(const char* conf_f fclose(fp); return reports; } +} //namespace coreneuron diff --git a/external/mod2c b/external/mod2c index c9763db3b..9e2d0b071 160000 --- a/external/mod2c +++ b/external/mod2c @@ -1 +1 @@ -Subproject commit c9763db3b38e9db4c42e1c728476860d949c9c6b +Subproject commit 9e2d0b0715e0cf9c684c10d067d89e758dfd8c14 diff --git a/tests/unit/cmdline_interface/test_cmdline_interface.cpp b/tests/unit/cmdline_interface/test_cmdline_interface.cpp index 1fc501c92..43763bc9c 100644 --- a/tests/unit/cmdline_interface/test_cmdline_interface.cpp +++ b/tests/unit/cmdline_interface/test_cmdline_interface.cpp @@ -32,7 +32,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include #include "nrniv/nrnoptarg.h" #include - +using namespace coreneuron; BOOST_AUTO_TEST_CASE(cmdline_interface) { const char* argv[] = { diff --git a/tests/unit/interleave_info/check_constructors.cpp b/tests/unit/interleave_info/check_constructors.cpp index 8efadf14b..7e72bff32 100644 --- a/tests/unit/interleave_info/check_constructors.cpp +++ b/tests/unit/interleave_info/check_constructors.cpp @@ -31,7 +31,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include #include "nrniv/cellorder.h" - +using namespace coreneuron; BOOST_AUTO_TEST_CASE(interleave_info_test) { size_t nwarp = 4; size_t nstride = 6; diff --git a/tests/unit/omp/test_omp.cpp b/tests/unit/omp/test_omp.cpp index 1574b8f51..f093f98e5 100644 --- a/tests/unit/omp/test_omp.cpp +++ b/tests/unit/omp/test_omp.cpp @@ -46,7 +46,7 @@ BOOST_AUTO_TEST_CASE(omp_standardusecase) { #if defined(_OPENMP) omp_set_num_threads(NUMTHREAD); - BOOST_CHECK(nrnomp_get_numthreads()==NUMTHREAD); + BOOST_CHECK(coreneuron::nrnomp_get_numthreads()==NUMTHREAD); #endif } diff --git a/tests/unit/queueing/test_queueing.cpp b/tests/unit/queueing/test_queueing.cpp index 51a3611ab..9bb64701d 100644 --- a/tests/unit/queueing/test_queueing.cpp +++ b/tests/unit/queueing/test_queueing.cpp @@ -66,7 +66,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrniv/tqueue.h" namespace bfs = ::boost::filesystem; - +using namespace coreneuron; //UNIT TESTS BOOST_AUTO_TEST_CASE(priority_queue_nq_dq){ TQueue tq = TQueue(); From a18f77e9cf8b9990577ca2e39f32d2b4d5ce6f09 Mon Sep 17 00:00:00 2001 From: Pramod Kumbhar Date: Tue, 27 Mar 2018 19:14:49 +0200 Subject: [PATCH 02/22] Update mod2c to new commit --- external/mod2c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/external/mod2c b/external/mod2c index 9e2d0b071..d39fa0ef4 160000 --- a/external/mod2c +++ b/external/mod2c @@ -1 +1 @@ -Subproject commit 9e2d0b0715e0cf9c684c10d067d89e758dfd8c14 +Subproject commit d39fa0ef4f1c64990193ce5af861f99e01f8e8eb From d129dbbfee77db54cc590637ddb5b8207db816af Mon Sep 17 00:00:00 2001 From: fouriaux Date: Wed, 28 Mar 2018 14:09:54 +0200 Subject: [PATCH 03/22] fix ivocvect vector compatibility and declarations --- coreneuron/nrniv/ivocvect.cpp | 20 +++++++++++++++++--- coreneuron/nrniv/ivocvect.h | 22 ++++++++-------------- coreneuron/nrniv/netcvode.cpp | 11 ----------- coreneuron/nrniv/nrn_setup.cpp | 4 ++-- coreneuron/nrnoc/membfunc.h | 6 ++++++ 5 files changed, 33 insertions(+), 30 deletions(-) diff --git a/coreneuron/nrniv/ivocvect.cpp b/coreneuron/nrniv/ivocvect.cpp index dab8371ce..8be27ca3b 100644 --- a/coreneuron/nrniv/ivocvect.cpp +++ b/coreneuron/nrniv/ivocvect.cpp @@ -27,9 +27,8 @@ THE POSSIBILITY OF SUCH DAMAGE. */ #include "coreneuron/nrniv/ivocvect.h" - -extern "C" { -IvocVect* vector_new1(int n) { +namespace coreneuron { +IvocVect* vector_new(int n) { return new IvocVect(n); } int vector_capacity(IvocVect* v) { @@ -38,4 +37,19 @@ int vector_capacity(IvocVect* v) { double* vector_vec(IvocVect* v) { return v->data(); } + +/* + * Retro-compatibility implementations + */ +void* vector_new1(int n) { + return (void*) (new IvocVect(n)); } + +int vector_capacity(void* v) { + return ((IvocVect*)v)->size(); +} +double* vector_vec(void* v) { + return ((IvocVect*)v)->data(); +} + +} //namespace coreneuron diff --git a/coreneuron/nrniv/ivocvect.h b/coreneuron/nrniv/ivocvect.h index bb10fd826..093c18129 100644 --- a/coreneuron/nrniv/ivocvect.h +++ b/coreneuron/nrniv/ivocvect.h @@ -29,11 +29,10 @@ THE POSSIBILITY OF SUCH DAMAGE. #ifndef ivoc_vector_h #define ivoc_vector_h -#if defined(__cplusplus) #include #include "coreneuron/nrniv/nrnmutdec.h" - +namespace coreneuron { template class fixed_vector { size_t n_; @@ -85,20 +84,15 @@ class fixed_vector { typedef fixed_vector IvocVect; -extern "C" { - -#else - -typedef void IvocVect; - -#endif /* !defined(__cplusplus) */ - -extern IvocVect* vector_new1(int n); +extern IvocVect* vector_new(int n); extern int vector_capacity(IvocVect* v); extern double* vector_vec(IvocVect* v); -#if defined(__cplusplus) -} -#endif +// retro-compatibility API +extern void* vector_new1(int n); +extern int vector_capacity(void* v); +extern double* vector_vec(void* v); + +} //namespace coreneuron #endif diff --git a/coreneuron/nrniv/netcvode.cpp b/coreneuron/nrniv/netcvode.cpp index dd269a4b6..41f410cb3 100644 --- a/coreneuron/nrniv/netcvode.cpp +++ b/coreneuron/nrniv/netcvode.cpp @@ -65,17 +65,6 @@ void mk_netcvode() { } } -//TODO following declarations dont appears in any include files -extern short* nrn_artcell_qindex_; -extern bool nrn_use_localgid_; -extern void nrn2ncs_outputevent(int netcon_output_index, double firetime); -void net_send(void**, int, Point_process*, double, double); -void net_event(Point_process* pnt, double time); -void net_move(void**, Point_process*, double); -void net_sem_from_gpu(int sendtype, int i_vdata, int, int ith, int ipnt, double, double); -void artcell_net_send(void**, int, Point_process*, double, double); -void artcell_net_move(void**, Point_process*, double); - #ifdef DEBUG // temporary static int nrn_errno_check(int type) { diff --git a/coreneuron/nrniv/nrn_setup.cpp b/coreneuron/nrniv/nrn_setup.cpp index e25368d3a..e02fa4d9e 100644 --- a/coreneuron/nrniv/nrn_setup.cpp +++ b/coreneuron/nrniv/nrn_setup.cpp @@ -1751,9 +1751,9 @@ for (int i=0; i < nt.end; ++i) { #if CHKPNTDEBUG ntc.vecplay_ix[i] = ix; #endif - IvocVect* yvec = vector_new1(sz); + IvocVect* yvec = vector_new(sz); F.read_array(vector_vec(yvec), sz); - IvocVect* tvec = vector_new1(sz); + IvocVect* tvec = vector_new(sz); F.read_array(vector_vec(tvec), sz); ix = nrn_param_layout(ix, mtype, ml); if (ml->_permute) { diff --git a/coreneuron/nrnoc/membfunc.h b/coreneuron/nrnoc/membfunc.h index c020a7f95..4c2865284 100644 --- a/coreneuron/nrnoc/membfunc.h +++ b/coreneuron/nrnoc/membfunc.h @@ -204,6 +204,12 @@ extern void net_event(Point_process*, double); extern void net_send(void**, int, Point_process*, double, double); extern void net_move(void**, Point_process*, double); extern void artcell_net_send(void**, int, Point_process*, double, double); +extern void artcell_net_move(void**, Point_process*, double); +extern void nrn2ncs_outputevent(int netcon_output_index, double firetime); +extern short* nrn_artcell_qindex_; +extern bool nrn_use_localgid_; +extern void net_sem_from_gpu(int sendtype, int i_vdata, int, int ith, int ipnt, double, double); + // _OPENACC and/or NET_RECEIVE_BUFFERING extern void net_sem_from_gpu(int, int, int, int, int, double, double); From 32c4b1ba3b7ca7a581be02e82849219303255e73 Mon Sep 17 00:00:00 2001 From: fouriaux Date: Thu, 29 Mar 2018 12:08:25 +0200 Subject: [PATCH 04/22] fixing core_read and core_write to be out of coreneuron namespace fixing VERBATIM blocks --- coreneuron/mech/modfile/pattern.mod | 9 ++++----- coreneuron/nrniv/nrniv_decl.h | 2 ++ external/mod2c | 2 +- 3 files changed, 7 insertions(+), 6 deletions(-) diff --git a/coreneuron/mech/modfile/pattern.mod b/coreneuron/mech/modfile/pattern.mod index a4e78c557..dbb73edc3 100644 --- a/coreneuron/mech/modfile/pattern.mod +++ b/coreneuron/mech/modfile/pattern.mod @@ -32,8 +32,6 @@ NET_RECEIVE (w) {LOCAL nst VERBATIM -extern void nrn_fake_fire(int gid, double spiketime, int fake_out); - typedef struct { int size; double* tvec; @@ -57,6 +55,7 @@ Info* mkinfo(_threadargsproto_) { return info; } /* for CoreNEURON checkpoint save and restore */ +namespace coreneuron { int checkpoint_save_patternstim(_threadargsproto_) { INFOCAST; Info* info = *ip; return info->index; @@ -66,7 +65,7 @@ void checkpoint_restore_patternstim(int _index, double _te, _threadargsproto_) { info->index = _index; artcell_net_send(_tqitem, -1, (Point_process*)_nt->_vdata[_ppvar[1*_STRIDE]], _te, 1.0); } - +} //namespace coreneuron ENDVERBATIM FUNCTION initps() { @@ -109,7 +108,7 @@ ENDVERBATIM VERBATIM static void bbcore_write(double* x, int* d, int* xx, int *offset, _threadargsproto_){} static void bbcore_read(double* x, int* d, int* xx, int* offset, _threadargsproto_){} - +namespace coreneuron { void pattern_stim_setup_helper(int size, double* tv, int* gv, _threadargsproto_) { INFOCAST; Info* info = mkinfo(_threadargs_); @@ -118,6 +117,6 @@ void pattern_stim_setup_helper(int size, double* tv, int* gv, _threadargsproto_) info->tvec = tv; info->gidvec = gv; } - +} // namespace coreneuron ENDVERBATIM diff --git a/coreneuron/nrniv/nrniv_decl.h b/coreneuron/nrniv/nrniv_decl.h index 3e88b3de2..3c8936a53 100644 --- a/coreneuron/nrniv/nrniv_decl.h +++ b/coreneuron/nrniv/nrniv_decl.h @@ -73,6 +73,8 @@ extern void ncs2nrn_integrate(double tstop); extern void handle_forward_skip(double forwardskip, int prcellgid); extern int nrn_set_timeout(int); +extern void nrn_fake_fire(int gid, double spiketime, int fake_out); + extern void netpar_tid_gid2ps(int tid, int gid, PreSyn** ps, InputPreSyn** psi); extern double set_mindelay(double maxdelay); diff --git a/external/mod2c b/external/mod2c index d39fa0ef4..18b2a7a6b 160000 --- a/external/mod2c +++ b/external/mod2c @@ -1 +1 @@ -Subproject commit d39fa0ef4f1c64990193ce5af861f99e01f8e8eb +Subproject commit 18b2a7a6b79b21ae51caf8efd5a08674ef8330e2 From e80852cf441a4df3933091684bb06d5cf779c60a Mon Sep 17 00:00:00 2001 From: fouriaux Date: Thu, 29 Mar 2018 16:00:59 +0200 Subject: [PATCH 05/22] add missing prototype --- coreneuron/nrnoc/membfunc.h | 2 +- coreneuron/nrnoc/register_mech.cpp | 2 +- coreneuron/nrnoc/register_mech.hpp | 5 +++-- 3 files changed, 5 insertions(+), 4 deletions(-) diff --git a/coreneuron/nrnoc/membfunc.h b/coreneuron/nrnoc/membfunc.h index 4c2865284..11d3f8ac4 100644 --- a/coreneuron/nrnoc/membfunc.h +++ b/coreneuron/nrnoc/membfunc.h @@ -55,7 +55,7 @@ struct Memb_func { int thread_size_; /* how many Datum needed in Memb_list if vectorized */ void (*thread_mem_init_)(ThreadDatum*); /* after Memb_list._thread is allocated */ void (*thread_cleanup_)(ThreadDatum*); /* before Memb_list._thread is freed */ - void (*thread_table_check_)(int, int, double*, Datum*, ThreadDatum*, void*, int); + void (*thread_table_check_)(int, int, double*, Datum*, ThreadDatum*, NrnThread*, int); int is_point; void (*setdata_)(double*, Datum*); int* dparam_semantics; /* for nrncore writing. */ diff --git a/coreneuron/nrnoc/register_mech.cpp b/coreneuron/nrnoc/register_mech.cpp index c67fb964b..75e1ed7ce 100644 --- a/coreneuron/nrnoc/register_mech.cpp +++ b/coreneuron/nrnoc/register_mech.cpp @@ -500,7 +500,7 @@ void _nrn_thread_reg1(int i, void (*f)(ThreadDatum*)) { memb_func[i].thread_mem_init_ = f; } -void _nrn_thread_table_reg(int i, void (*f)(int, int, double*, Datum*, ThreadDatum*, void*, int)) { +void _nrn_thread_table_reg(int i, void (*f)(int, int, double*, Datum*, ThreadDatum*, NrnThread*, int)) { if (i == -1) return; diff --git a/coreneuron/nrnoc/register_mech.hpp b/coreneuron/nrnoc/register_mech.hpp index 11b4ff8e1..a516828bc 100644 --- a/coreneuron/nrnoc/register_mech.hpp +++ b/coreneuron/nrnoc/register_mech.hpp @@ -2,8 +2,9 @@ #define register_mech_h namespace coreneuron { - void hoc_reg_bbcore_read(int type, bbcore_read_t f); - void hoc_reg_bbcore_write(int type, bbcore_write_t f); + extern void hoc_reg_bbcore_read(int type, bbcore_read_t f); + extern void hoc_reg_bbcore_write(int type, bbcore_write_t f); + extern void _nrn_thread_table_reg(int i, void (*f)(int, int, double*, Datum*, ThreadDatum*, NrnThread*, int)); } // namespace coreneuron From 9a9aa18d32e170bd6998087b17f1d914ee139c32 Mon Sep 17 00:00:00 2001 From: fouriaux Date: Thu, 29 Mar 2018 16:11:10 +0200 Subject: [PATCH 06/22] update mod2c --- external/mod2c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/external/mod2c b/external/mod2c index 18b2a7a6b..0dbea73fd 160000 --- a/external/mod2c +++ b/external/mod2c @@ -1 +1 @@ -Subproject commit 18b2a7a6b79b21ae51caf8efd5a08674ef8330e2 +Subproject commit 0dbea73fd9c6e6fe81367d665cbb0c14619390f1 From 7afb97d28171a01b7cd7da1f227f9ea415deaf7a Mon Sep 17 00:00:00 2001 From: fouriaux Date: Tue, 3 Apr 2018 09:02:43 +0200 Subject: [PATCH 07/22] update mod2c link --- external/mod2c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/external/mod2c b/external/mod2c index 0dbea73fd..1f8ab8112 160000 --- a/external/mod2c +++ b/external/mod2c @@ -1 +1 @@ -Subproject commit 0dbea73fd9c6e6fe81367d665cbb0c14619390f1 +Subproject commit 1f8ab81123e914de3a3bfa70dc343d82c48f9bcb From f6a80aaf603f42960c49e0923fda0e767b953c28 Mon Sep 17 00:00:00 2001 From: fouriaux Date: Tue, 3 Apr 2018 13:23:14 +0200 Subject: [PATCH 08/22] update submodule --- external/mod2c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/external/mod2c b/external/mod2c index 1f8ab8112..6d621b8e5 160000 --- a/external/mod2c +++ b/external/mod2c @@ -1 +1 @@ -Subproject commit 1f8ab81123e914de3a3bfa70dc343d82c48f9bcb +Subproject commit 6d621b8e5944c8c8b4bf265d4433d058dfece7f0 From a812e742366a017618e4030f6929b067bf18b442 Mon Sep 17 00:00:00 2001 From: fouriaux Date: Thu, 12 Apr 2018 14:32:22 +0200 Subject: [PATCH 09/22] fix public API of coreneuron to explose core_psolve --- apps/coreneuron.cpp | 6 +-- coreneuron/CMakeLists.txt | 1 + coreneuron/nrniv/coreneuron_main.cpp | 33 ---------------- coreneuron/nrniv/main1.cpp | 57 +++++++++++++++------------- 4 files changed, 33 insertions(+), 64 deletions(-) delete mode 100644 coreneuron/nrniv/coreneuron_main.cpp diff --git a/apps/coreneuron.cpp b/apps/coreneuron.cpp index 776e75b21..2b4a1cd76 100644 --- a/apps/coreneuron.cpp +++ b/apps/coreneuron.cpp @@ -26,13 +26,11 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -namespace coreneuron { -extern int main1(int argc, char** argv, char** env); -} +#include extern "C" {extern void modl_reg(void);} int main(int argc, char** argv, char** env) { - return coreneuron::main1(argc, argv, env); + return core_psolve(argc, argv, env); } /// Declare an empty function if Neurodamus mechanisms are not used, otherwise register them in mechs/cfile/mod_func.c diff --git a/coreneuron/CMakeLists.txt b/coreneuron/CMakeLists.txt index 2c5bd218d..2581293e8 100644 --- a/coreneuron/CMakeLists.txt +++ b/coreneuron/CMakeLists.txt @@ -285,6 +285,7 @@ set_target_properties(coreneuron PROPERTIES install(TARGETS coreneuron LIBRARY DESTINATION ${LIB_INSTALL_DIR} ARCHIVE DESTINATION ${LIB_INSTALL_DIR} ) + install(FILES "engine.h" DESTINATION include/coreneuron) if(ENABLE_DEV_FILES_INSTALLATION) install(DIRECTORY . diff --git a/coreneuron/nrniv/coreneuron_main.cpp b/coreneuron/nrniv/coreneuron_main.cpp deleted file mode 100644 index 7149f53cf..000000000 --- a/coreneuron/nrniv/coreneuron_main.cpp +++ /dev/null @@ -1,33 +0,0 @@ -/* -Copyright (c) 2016, Blue Brain Project -All rights reserved. - -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: -1. Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. -2. Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. -3. Neither the name of the copyright holder nor the names of its contributors - may be used to endorse or promote products derived from this software - without specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -THE POSSIBILITY OF SUCH DAMAGE. -*/ -namespace coreneuron { - extern int main1(int argc, char** argv, char** env); -} -int main(int argc, char** argv, char** env) { - return coreneuron::main1(argc, argv, env); -} diff --git a/coreneuron/nrniv/main1.cpp b/coreneuron/nrniv/main1.cpp index 1ced2dfd0..250d2fa3c 100644 --- a/coreneuron/nrniv/main1.cpp +++ b/coreneuron/nrniv/main1.cpp @@ -34,6 +34,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include #include +#include "coreneuron/engine.h" #include "coreneuron/utils/randoms/nrnran123.h" #include "coreneuron/nrnconf.h" #include "coreneuron/nrnoc/multicore.h" @@ -66,7 +67,6 @@ int nrn_feenableexcept() { } #endif namespace coreneuron { -int main1(int argc, char* argv[], char** env); void call_prcellstate_for_prcellgid(int prcellgid, int compute_gpu, int is_init); void nrn_init_and_load_data(int argc, char* argv[], @@ -241,7 +241,35 @@ void call_prcellstate_for_prcellgid(int prcellgid, int compute_gpu, int is_init) } } -int main1(int argc, char** argv, char** env) { + +/* perform forwardskip and call prcellstate for prcellgid */ +void handle_forward_skip(double forwardskip, int prcellgid) { + double savedt = dt; + double savet = t; + + dt = forwardskip * 0.1; + t = -1e9; + + for (int step = 0; step < 10; ++step) { + nrn_fixed_step_minimal(); + } + + if (prcellgid >= 0) { + prcellstate(prcellgid, "fs"); + } + + dt = savedt; + t = savet; + dt2thread(-1.); +} + +const char* nrn_version(int) { + return "version id unimplemented"; +} +} //namespace coreneuron + +using namespace coreneuron; +extern "C" int core_psolve(int argc, char** argv, char** env) { (void)env; /* unused */ #if NRNMPI @@ -363,28 +391,3 @@ int main1(int argc, char** argv, char** env) { return 0; } -/* perform forwardskip and call prcellstate for prcellgid */ -void handle_forward_skip(double forwardskip, int prcellgid) { - double savedt = dt; - double savet = t; - - dt = forwardskip * 0.1; - t = -1e9; - - for (int step = 0; step < 10; ++step) { - nrn_fixed_step_minimal(); - } - - if (prcellgid >= 0) { - prcellstate(prcellgid, "fs"); - } - - dt = savedt; - t = savet; - dt2thread(-1.); -} - -const char* nrn_version(int) { - return "version id unimplemented"; -} -} //namespace coreneuron From aabed5dca3e430800bb4e64bf9917c000f728c0f Mon Sep 17 00:00:00 2001 From: fouriaux Date: Thu, 12 Apr 2018 14:40:16 +0200 Subject: [PATCH 10/22] add pulbic header --- coreneuron/engine.h | 4 ++++ 1 file changed, 4 insertions(+) create mode 100644 coreneuron/engine.h diff --git a/coreneuron/engine.h b/coreneuron/engine.h new file mode 100644 index 000000000..d481129ed --- /dev/null +++ b/coreneuron/engine.h @@ -0,0 +1,4 @@ +#pragma once + +extern "C" int core_psolve (int argc, char** argv, char** env); + From a7d0c9bad6f9935c41d01534a39e04a8f2276c6d Mon Sep 17 00:00:00 2001 From: Pramod Kumbhar Date: Thu, 12 Apr 2018 16:02:23 +0200 Subject: [PATCH 11/22] kinderiv.h has prototype declaration for euler methods --- coreneuron/kinderiv.py | 3 +++ external/mod2c | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/coreneuron/kinderiv.py b/coreneuron/kinderiv.py index 74c1eef65..937e380b6 100644 --- a/coreneuron/kinderiv.py +++ b/coreneuron/kinderiv.py @@ -58,6 +58,9 @@ fout.write('#pragma acc routine seq\n') fout.write('extern int %s%s(void*, double*, _threadargsproto_);\n' % (item[0], item[1])) +for item in euler: + fout.write('extern int %s%s(_threadargsproto_);\n' % (item[0], item[1])) + fout.write("\n/* callback indices */\n") derivoffset = 1 kinoffset = 1 diff --git a/external/mod2c b/external/mod2c index 6d621b8e5..558db2c9e 160000 --- a/external/mod2c +++ b/external/mod2c @@ -1 +1 @@ -Subproject commit 6d621b8e5944c8c8b4bf265d4433d058dfece7f0 +Subproject commit 558db2c9e2f662d6a29d78bcecedea58724caab9 From 859a6a9a091004e0f8b48468def549e7d50d1f37 Mon Sep 17 00:00:00 2001 From: fouriaux Date: Thu, 12 Apr 2018 17:48:05 +0200 Subject: [PATCH 12/22] public header accessible from C, clean up unused arguments --- apps/coreneuron.cpp | 4 ++-- coreneuron/engine.h | 12 ++++++++++-- coreneuron/nrniv/main1.cpp | 3 +-- 3 files changed, 13 insertions(+), 6 deletions(-) diff --git a/apps/coreneuron.cpp b/apps/coreneuron.cpp index 2b4a1cd76..6c310f70c 100644 --- a/apps/coreneuron.cpp +++ b/apps/coreneuron.cpp @@ -29,8 +29,8 @@ THE POSSIBILITY OF SUCH DAMAGE. #include extern "C" {extern void modl_reg(void);} -int main(int argc, char** argv, char** env) { - return core_psolve(argc, argv, env); +int main(int argc, char** argv) { + return psolve_core(argc, argv); } /// Declare an empty function if Neurodamus mechanisms are not used, otherwise register them in mechs/cfile/mod_func.c diff --git a/coreneuron/engine.h b/coreneuron/engine.h index d481129ed..580d19313 100644 --- a/coreneuron/engine.h +++ b/coreneuron/engine.h @@ -1,4 +1,12 @@ -#pragma once +#ifndef CORENEURON_ENGINE_H +#define CORENEURON_ENGINE_H -extern "C" int core_psolve (int argc, char** argv, char** env); +#ifdef __cplusplus +extern "C" { +#endif + extern int psolve_core (int argc, char** argv); +#ifdef __cplusplus + } +#endif +#endif diff --git a/coreneuron/nrniv/main1.cpp b/coreneuron/nrniv/main1.cpp index 250d2fa3c..d1acef50c 100644 --- a/coreneuron/nrniv/main1.cpp +++ b/coreneuron/nrniv/main1.cpp @@ -269,8 +269,7 @@ const char* nrn_version(int) { } //namespace coreneuron using namespace coreneuron; -extern "C" int core_psolve(int argc, char** argv, char** env) { - (void)env; /* unused */ +extern "C" int psolve_core(int argc, char** argv) { #if NRNMPI nrnmpi_init(1, &argc, &argv); From 0e17acd37d1a523f70f7637336610158d7995a47 Mon Sep 17 00:00:00 2001 From: Pramod Kumbhar Date: Thu, 12 Apr 2018 21:59:09 +0200 Subject: [PATCH 13/22] Changes to integrate with neurodamus: psolve_core renamed and added --skip-mpi-finalize command line option --- apps/coreneuron.cpp | 2 +- coreneuron/engine.h | 2 +- coreneuron/nrniv/main1.cpp | 7 +++++-- coreneuron/nrniv/nrnoptarg.cpp | 1 + 4 files changed, 8 insertions(+), 4 deletions(-) diff --git a/apps/coreneuron.cpp b/apps/coreneuron.cpp index 6c310f70c..1026cfccf 100644 --- a/apps/coreneuron.cpp +++ b/apps/coreneuron.cpp @@ -30,7 +30,7 @@ THE POSSIBILITY OF SUCH DAMAGE. extern "C" {extern void modl_reg(void);} int main(int argc, char** argv) { - return psolve_core(argc, argv); + return solve_core(argc, argv); } /// Declare an empty function if Neurodamus mechanisms are not used, otherwise register them in mechs/cfile/mod_func.c diff --git a/coreneuron/engine.h b/coreneuron/engine.h index 580d19313..d39c3cbf5 100644 --- a/coreneuron/engine.h +++ b/coreneuron/engine.h @@ -4,7 +4,7 @@ #ifdef __cplusplus extern "C" { #endif - extern int psolve_core (int argc, char** argv); + extern int solve_core (int argc, char** argv); #ifdef __cplusplus } #endif diff --git a/coreneuron/nrniv/main1.cpp b/coreneuron/nrniv/main1.cpp index d1acef50c..a5bc66d7f 100644 --- a/coreneuron/nrniv/main1.cpp +++ b/coreneuron/nrniv/main1.cpp @@ -269,7 +269,7 @@ const char* nrn_version(int) { } //namespace coreneuron using namespace coreneuron; -extern "C" int psolve_core(int argc, char** argv) { +extern "C" int solve_core(int argc, char** argv) { #if NRNMPI nrnmpi_init(1, &argc, &argv); @@ -306,6 +306,7 @@ extern "C" int psolve_core(int argc, char** argv) { nrnmpi_barrier(); #endif bool compute_gpu = nrnopt_get_flag("-gpu"); + bool skip_mpi_finalize = nrnopt_get_flag("--skip-mpi-finalize"); // clang-format off #pragma acc data copyin(celsius, secondorder) if (compute_gpu) @@ -382,7 +383,9 @@ extern "C" int psolve_core(int argc, char** argv) { // mpi finalize #if NRNMPI - nrnmpi_finalize(); + if (!skip_mpi_finalize) { + nrnmpi_finalize(); + } #endif finalize_data_on_device(); diff --git a/coreneuron/nrniv/nrnoptarg.cpp b/coreneuron/nrniv/nrnoptarg.cpp index 519b5c18f..2fd846187 100644 --- a/coreneuron/nrniv/nrnoptarg.cpp +++ b/coreneuron/nrniv/nrnoptarg.cpp @@ -95,6 +95,7 @@ static param_flag param_flag_args[] = { {"--show", "Print args."}, {"--multisend", "Use Multisend spike exchange instead of Allgather."}, {"--binqueue", "Use bin queue."}, + {"--skip-mpi-finalize", "Do not call mpi finalize."}, {NULL, NULL}}; static param_str param_str_args[] = { From 95798d879dfc009fe846f5bef410343e032040e6 Mon Sep 17 00:00:00 2001 From: Pramod Kumbhar Date: Thu, 19 Apr 2018 10:43:54 +0200 Subject: [PATCH 14/22] mod2c updated --- external/mod2c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/external/mod2c b/external/mod2c index 558db2c9e..765c62a75 160000 --- a/external/mod2c +++ b/external/mod2c @@ -1 +1 @@ -Subproject commit 558db2c9e2f662d6a29d78bcecedea58724caab9 +Subproject commit 765c62a755614abb11c3477fa472a45ee599af9c From a7d827b052c14216bf61837f3511740d9134d4d5 Mon Sep 17 00:00:00 2001 From: fouriaux Date: Fri, 20 Apr 2018 15:29:06 +0200 Subject: [PATCH 15/22] W.I.P for fixup openACC version --- coreneuron/CMakeLists.txt | 8 ++++---- coreneuron/coreneuron.h | 2 +- coreneuron/nrnconf.h | 2 ++ coreneuron/nrniv/main1.cpp | 5 +++++ coreneuron/nrnoc/eion.cpp | 2 -- coreneuron/nrnoc/fadvance_core.cpp | 2 +- coreneuron/nrnoc/membfunc.h | 4 ++-- coreneuron/nrnoc/multicore.h | 1 + coreneuron/scopmath_core/newton_thread.cpp | 2 +- coreneuron/utils/randoms/nrnran123.cpp | 2 +- 10 files changed, 18 insertions(+), 12 deletions(-) diff --git a/coreneuron/CMakeLists.txt b/coreneuron/CMakeLists.txt index 29934fc1d..3c608f33d 100644 --- a/coreneuron/CMakeLists.txt +++ b/coreneuron/CMakeLists.txt @@ -236,10 +236,10 @@ set(GENERATED_MECH_C_FILES ${MOD_FUNC_C} ${MOD_FUNC_PTRS_C} ${MOD2C_STDMECH_OUTP # artificial cells must be on cpu, defaul nrnran123.c is for cpu, nrn_setup.cpp uses nrnran123 for only memory calculation purpose which should use cpu version of nrnran123 set(NOACC_MECH_C_FILES - ${CMAKE_CURRENT_BINARY_DIR}/netstim.c - ${CMAKE_CURRENT_BINARY_DIR}/netstim_inhpoisson.c - ${CMAKE_CURRENT_BINARY_DIR}/pattern.c - ${CMAKE_CURRENT_SOURCE_DIR}/utils/randoms/nrnran123.c + ${CMAKE_CURRENT_BINARY_DIR}/netstim.cpp + ${CMAKE_CURRENT_BINARY_DIR}/netstim_inhpoisson.cpp + ${CMAKE_CURRENT_BINARY_DIR}/pattern.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/utils/randoms/nrnran123.cpp ${CMAKE_CURRENT_SOURCE_DIR}/nrniv/nrn_setup.cpp ${CMAKE_CURRENT_SOURCE_DIR}/nrniv/global_vars.cpp) diff --git a/coreneuron/coreneuron.h b/coreneuron/coreneuron.h index 12b8ee136..3a6c3c60a 100644 --- a/coreneuron/coreneuron.h +++ b/coreneuron/coreneuron.h @@ -39,10 +39,10 @@ THE POSSIBILITY OF SUCH DAMAGE. #include #include +#include "coreneuron/utils/randoms/nrnran123.h" //Random Number Generator #include "coreneuron/scopmath_core/newton_struct.h" //Newton Struct #include "coreneuron/nrnoc/membdef.h" //static definitions #include "coreneuron/nrnoc/nrnoc_ml.h" //Memb_list and mechs info -#include "coreneuron/utils/randoms/nrnran123.h" //Random Number Generator #include "coreneuron/nrniv/memory.h" //Memory alignments and padding diff --git a/coreneuron/nrnconf.h b/coreneuron/nrnconf.h index 0fa9ecd6a..9ad1a9bae 100644 --- a/coreneuron/nrnconf.h +++ b/coreneuron/nrnconf.h @@ -59,6 +59,8 @@ typedef char Symbol; extern double celsius; +#pragma acc declare create(celsius) + extern double t, dt; extern int rev_dt; extern int secondorder; diff --git a/coreneuron/nrniv/main1.cpp b/coreneuron/nrniv/main1.cpp index a5bc66d7f..6de504db0 100644 --- a/coreneuron/nrniv/main1.cpp +++ b/coreneuron/nrniv/main1.cpp @@ -57,6 +57,11 @@ THE POSSIBILITY OF SUCH DAMAGE. #include #include +namespace coreneuron { +#pragma acc declare create (nrn_threads) +extern NrnThread* nrn_threads; +} + #if 0 #include #define NRN_FEEXCEPT (FE_DIVBYZERO | FE_INVALID | FE_OVERFLOW) diff --git a/coreneuron/nrnoc/eion.cpp b/coreneuron/nrnoc/eion.cpp index 59ba71d9a..8861b48f4 100644 --- a/coreneuron/nrnoc/eion.cpp +++ b/coreneuron/nrnoc/eion.cpp @@ -181,7 +181,6 @@ the USEION statement of any model using this ion\n", #define FARADAY 96485.309 #define ktf (1000. * 8.3134 * (celsius + 273.15) / FARADAY) -#pragma acc routine seq double nrn_nernst(double ci, double co, double z, double celsius) { /*printf("nrn_nernst %g %g %g\n", ci, co, z);*/ if (z == 0) { @@ -196,7 +195,6 @@ double nrn_nernst(double ci, double co, double z, double celsius) { } } -#pragma acc routine seq void nrn_wrote_conc(int type, double* p1, int p2, diff --git a/coreneuron/nrnoc/fadvance_core.cpp b/coreneuron/nrnoc/fadvance_core.cpp index 891b32da5..f050f455c 100644 --- a/coreneuron/nrnoc/fadvance_core.cpp +++ b/coreneuron/nrnoc/fadvance_core.cpp @@ -26,12 +26,12 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +#include "coreneuron/coreneuron.h" #include "coreneuron/nrnconf.h" #include "coreneuron/nrnoc/multicore.h" #include "coreneuron/nrnmpi/nrnmpi.h" #include "coreneuron/nrnoc/nrnoc_decl.h" #include "coreneuron/nrniv/nrn_acc_manager.h" -#include "coreneuron/coreneuron.h" #include "coreneuron/utils/reports/nrnreport.h" namespace coreneuron { static void* nrn_fixed_step_thread(NrnThread*); diff --git a/coreneuron/nrnoc/membfunc.h b/coreneuron/nrnoc/membfunc.h index 11d3f8ac4..0a874d77f 100644 --- a/coreneuron/nrnoc/membfunc.h +++ b/coreneuron/nrnoc/membfunc.h @@ -140,10 +140,10 @@ extern nrn_watch_check_t* nrn_watch_check; extern void nrn_jacob_capacitance(NrnThread*, Memb_list*, int); extern void nrn_writes_conc(int, int); -#if defined(_OPENACC) #pragma acc routine seq -#endif extern void nrn_wrote_conc(int, double*, int, int, double**, double, int); +#pragma acc routine seq +double nrn_nernst(double ci, double co, double z, double celsius); extern void hoc_register_prop_size(int, int, int); extern void hoc_register_dparam_semantics(int type, int, const char* name); diff --git a/coreneuron/nrnoc/multicore.h b/coreneuron/nrnoc/multicore.h index c805255d4..04cc387a1 100644 --- a/coreneuron/nrnoc/multicore.h +++ b/coreneuron/nrnoc/multicore.h @@ -128,6 +128,7 @@ struct NrnThread { extern void nrn_threads_create(int n, int parallel); extern int nrn_nthread; extern NrnThread* nrn_threads; +#pragma acc declare present (nrn_threads) extern void nrn_multithread_job(void* (*)(NrnThread*)); extern void nrn_thread_table_check(void); diff --git a/coreneuron/scopmath_core/newton_thread.cpp b/coreneuron/scopmath_core/newton_thread.cpp index 50ae0d998..058265c6c 100644 --- a/coreneuron/scopmath_core/newton_thread.cpp +++ b/coreneuron/scopmath_core/newton_thread.cpp @@ -62,7 +62,7 @@ namespace coreneuron { #define ix(arg) ((arg)*_STRIDE) #define s_(arg) _p[s[arg] * _STRIDE] -#pragma acc routine seq +//#pragma acc routine seq int nrn_newton_thread(NewtonSpace* ns, int n, int* s, diff --git a/coreneuron/utils/randoms/nrnran123.cpp b/coreneuron/utils/randoms/nrnran123.cpp index dcc756e0c..757578f8d 100644 --- a/coreneuron/utils/randoms/nrnran123.cpp +++ b/coreneuron/utils/randoms/nrnran123.cpp @@ -28,8 +28,8 @@ THE POSSIBILITY OF SUCH DAMAGE. #include #include -#include "coreneuron/nrnconf.h" #include "coreneuron/utils/randoms/nrnran123.h" +#include "coreneuron/nrnconf.h" #include "coreneuron/utils/randoms/Random123/philox.h" #include "coreneuron/nrniv/nrnmutdec.h" namespace coreneuron { From ca893d6bbd9b92a4d48417a741598d3017f21f41 Mon Sep 17 00:00:00 2001 From: Pramod S Kumbhar Date: Sat, 21 Apr 2018 11:01:00 +0200 Subject: [PATCH 16/22] OpenACC pragma annotation was missing for kernels using euler --- coreneuron/kinderiv.py | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/coreneuron/kinderiv.py b/coreneuron/kinderiv.py index e51fa6ea9..19eb0dfce 100644 --- a/coreneuron/kinderiv.py +++ b/coreneuron/kinderiv.py @@ -57,6 +57,10 @@ fout.write('#pragma acc routine seq\n') fout.write('extern int %s%s(void*, double*, _threadargsproto_);\n' % (item[0], item[1])) +for item in euler: + fout.write('#pragma acc routine seq\n') + fout.write('extern int %s%s(_threadargsproto_);\n' % (item[0], item[1])) + fout.write("\n/* callback indices */\n") derivoffset = 1 kinoffset = 1 From 992000f9a78be1292d634fd1101766ace0e6881b Mon Sep 17 00:00:00 2001 From: Pramod Kumbhar Date: Sat, 21 Apr 2018 16:33:12 +0200 Subject: [PATCH 17/22] cudaMemset wrong pointer fix --- coreneuron/utils/randoms/nrnran123.cu | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/coreneuron/utils/randoms/nrnran123.cu b/coreneuron/utils/randoms/nrnran123.cu index 7700e7e42..ed97d8a32 100644 --- a/coreneuron/utils/randoms/nrnran123.cu +++ b/coreneuron/utils/randoms/nrnran123.cu @@ -149,7 +149,7 @@ nrnran123_State* nrnran123_newstream3(uint32_t id1, uint32_t id2, uint32_t id3) nrnran123_State* s; cudaMalloc((void**)&s, sizeof(nrnran123_State)); - cudaMemset((void**)&s, 0, sizeof(nrnran123_State)); + cudaMemset((void*)s, 0, sizeof(nrnran123_State)); nrnran123_setup_cuda_newstream<<<1, 1>>>(s, id1, id2, id3); cudaDeviceSynchronize(); From 9a572b76af6f705f3d80a59694ea99d559f8dac9 Mon Sep 17 00:00:00 2001 From: Pramod Kumbhar Date: Sat, 21 Apr 2018 16:46:44 +0200 Subject: [PATCH 18/22] User provided flags should take precedence --- CMakeLists.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index f5f112e77..58607cf9a 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -206,8 +206,8 @@ if(ENABLE_OPENACC) if (ENABLE_OPENACC_INFO) set(ACC_FLAGS "${ACC_FLAGS} -Minfo=acc") endif() - set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${ACC_FLAGS}") - set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${ACC_FLAGS}") + set(CMAKE_C_FLAGS "${ACC_FLAGS} ${CMAKE_C_FLAGS}") + set(CMAKE_CXX_FLAGS "${ACC_FLAGS} ${CMAKE_CXX_FLAGS}") else() message(WARNING "OpenACC implementation is only supported and tested using only PGI") message(WARNING "Add required compiler flags to enabled OpenACC") From 18692d91d2e01d2247656b0b58572f4ba414bf7d Mon Sep 17 00:00:00 2001 From: Pramod Kumbhar Date: Sat, 21 Apr 2018 19:15:08 +0200 Subject: [PATCH 19/22] Removed unnecessary acc declare annotations: actual errors are coming from inlinin (functions are not getting inlined with cpp) --- coreneuron/nrnconf.h | 1 - coreneuron/nrniv/main1.cpp | 4 ---- coreneuron/nrnoc/multicore.h | 1 - coreneuron/scopmath_core/newton_thread.cpp | 1 - external/mod2c | 2 +- 5 files changed, 1 insertion(+), 8 deletions(-) diff --git a/coreneuron/nrnconf.h b/coreneuron/nrnconf.h index 9ad1a9bae..e5477422f 100644 --- a/coreneuron/nrnconf.h +++ b/coreneuron/nrnconf.h @@ -59,7 +59,6 @@ typedef char Symbol; extern double celsius; -#pragma acc declare create(celsius) extern double t, dt; extern int rev_dt; diff --git a/coreneuron/nrniv/main1.cpp b/coreneuron/nrniv/main1.cpp index 6de504db0..f0ec1929b 100644 --- a/coreneuron/nrniv/main1.cpp +++ b/coreneuron/nrniv/main1.cpp @@ -57,10 +57,6 @@ THE POSSIBILITY OF SUCH DAMAGE. #include #include -namespace coreneuron { -#pragma acc declare create (nrn_threads) -extern NrnThread* nrn_threads; -} #if 0 #include diff --git a/coreneuron/nrnoc/multicore.h b/coreneuron/nrnoc/multicore.h index 04cc387a1..c805255d4 100644 --- a/coreneuron/nrnoc/multicore.h +++ b/coreneuron/nrnoc/multicore.h @@ -128,7 +128,6 @@ struct NrnThread { extern void nrn_threads_create(int n, int parallel); extern int nrn_nthread; extern NrnThread* nrn_threads; -#pragma acc declare present (nrn_threads) extern void nrn_multithread_job(void* (*)(NrnThread*)); extern void nrn_thread_table_check(void); diff --git a/coreneuron/scopmath_core/newton_thread.cpp b/coreneuron/scopmath_core/newton_thread.cpp index 058265c6c..53b74540c 100644 --- a/coreneuron/scopmath_core/newton_thread.cpp +++ b/coreneuron/scopmath_core/newton_thread.cpp @@ -62,7 +62,6 @@ namespace coreneuron { #define ix(arg) ((arg)*_STRIDE) #define s_(arg) _p[s[arg] * _STRIDE] -//#pragma acc routine seq int nrn_newton_thread(NewtonSpace* ns, int n, int* s, diff --git a/external/mod2c b/external/mod2c index 765c62a75..4a54feb00 160000 --- a/external/mod2c +++ b/external/mod2c @@ -1 +1 @@ -Subproject commit 765c62a755614abb11c3477fa472a45ee599af9c +Subproject commit 4a54feb00a3d3e9dc5ceba43d743aa7b65ed78ab From 503ff8d7a01cd5ce46043823141c4cd9bbb7bdf3 Mon Sep 17 00:00:00 2001 From: Pramod Kumbhar Date: Sat, 28 Apr 2018 16:54:46 +0200 Subject: [PATCH 20/22] Fix issue while compiling with -DENABLE_MPI=OFF The namespaces were not correctly nested. --- coreneuron/nrniv/multisend.cpp | 2 +- coreneuron/nrniv/netpar.cpp | 10 +++++----- coreneuron/nrnmpi/mpispike.h | 6 +++--- coreneuron/nrnmpi/nrnmpi.cpp | 2 +- coreneuron/nrnmpi/nrnmpi.h | 3 ++- 5 files changed, 12 insertions(+), 11 deletions(-) diff --git a/coreneuron/nrniv/multisend.cpp b/coreneuron/nrniv/multisend.cpp index 9569d1288..15e0a7ba0 100644 --- a/coreneuron/nrniv/multisend.cpp +++ b/coreneuron/nrniv/multisend.cpp @@ -465,5 +465,5 @@ void nrn_multisend_setup() { } #endif } -} // namespace coreneuron #endif // NRN_MULTISEND +} // namespace coreneuron diff --git a/coreneuron/nrniv/netpar.cpp b/coreneuron/nrniv/netpar.cpp index 10c9eda44..af1de94e9 100644 --- a/coreneuron/nrniv/netpar.cpp +++ b/coreneuron/nrniv/netpar.cpp @@ -42,6 +42,9 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrniv/ivocvect.h" #include "coreneuron/nrniv/multisend.h" #include "coreneuron/nrniv/nrn_assert.h" +#if NRNMPI +#include "coreneuron/nrnmpi/mpispike.h" +#endif namespace coreneuron { @@ -52,12 +55,8 @@ static double t_exchange_; static double dt1_; // 1/dt void nrn_spike_exchange_init(); -} //namespace coreneuron -#if NRNMPI -#include "coreneuron/nrnmpi/mpispike.h" - -namespace coreneuron { +#if NRNMPI void nrn_timeout(int); void nrn_spike_exchange(NrnThread*); @@ -85,6 +84,7 @@ static bool use_compress_; static int spfixout_capacity_; static int idxout_; static void nrn_spike_exchange_compressed(NrnThread*); + #endif // NRNMPI static int active_; diff --git a/coreneuron/nrnmpi/mpispike.h b/coreneuron/nrnmpi/mpispike.h index b6a24300d..4610a104a 100644 --- a/coreneuron/nrnmpi/mpispike.h +++ b/coreneuron/nrnmpi/mpispike.h @@ -35,6 +35,8 @@ THE POSSIBILITY OF SUCH DAMAGE. #define nrn_spikebuf_size 0 #endif +namespace coreneuron { + #if nrn_spikebuf_size > 0 struct NRNMPI_Spikebuf{ int nspike; @@ -43,7 +45,6 @@ struct NRNMPI_Spikebuf{ }; #endif -namespace coreneuron { #define icapacity_ nrnmpi_i_capacity_ #define spikeout_ nrnmpi_spikeout_ @@ -80,8 +81,7 @@ extern NRNMPI_Spikebuf* spbufout_; extern NRNMPI_Spikebuf* spbufin_; #endif -#endif // NRNMPI - } //namespace coreneuron +#endif // NRNMPI #endif diff --git a/coreneuron/nrnmpi/nrnmpi.cpp b/coreneuron/nrnmpi/nrnmpi.cpp index eeed756bb..a9bf40720 100644 --- a/coreneuron/nrnmpi/nrnmpi.cpp +++ b/coreneuron/nrnmpi/nrnmpi.cpp @@ -36,6 +36,7 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrnoc/nrnpthread.h" #include "coreneuron/nrnomp/nrnomp.h" +namespace coreneuron { #if NRNMPI #include @@ -44,7 +45,6 @@ THE POSSIBILITY OF SUCH DAMAGE. #include #endif -namespace coreneuron { int nrnmusic; MPI_Comm nrnmpi_world_comm; diff --git a/coreneuron/nrnmpi/nrnmpi.h b/coreneuron/nrnmpi/nrnmpi.h index 2771b7d5d..c184fddda 100644 --- a/coreneuron/nrnmpi/nrnmpi.h +++ b/coreneuron/nrnmpi/nrnmpi.h @@ -43,14 +43,15 @@ extern int nrnmpi_myid; /* rank in subworld */ extern int nrnmpi_numprocs_bbs; /* number of subworlds */ extern int nrnmpi_myid_bbs; /* rank in nrn_bbs_comm of rank 0 of a subworld */ - void nrn_abort(int errcode); void nrn_fatal_error(const char* msg); double nrn_wtime(); +} //namespace coreneuron #if NRNMPI +namespace coreneuron { typedef struct { int gid; double spiketime; From 66f0a4f27979c697985c633fb24aa1b86ce1423b Mon Sep 17 00:00:00 2001 From: fouriaux Date: Tue, 8 May 2018 15:35:16 +0200 Subject: [PATCH 21/22] fix mpi build --- coreneuron/nrnmpi/nrnmpi.cpp | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/coreneuron/nrnmpi/nrnmpi.cpp b/coreneuron/nrnmpi/nrnmpi.cpp index a9bf40720..2f8ef5447 100644 --- a/coreneuron/nrnmpi/nrnmpi.cpp +++ b/coreneuron/nrnmpi/nrnmpi.cpp @@ -36,15 +36,12 @@ THE POSSIBILITY OF SUCH DAMAGE. #include "coreneuron/nrnoc/nrnpthread.h" #include "coreneuron/nrnomp/nrnomp.h" -namespace coreneuron { #if NRNMPI #include - -#define USE_HPM 0 -#if USE_HPM -#include #endif +namespace coreneuron { +#if NRNMPI int nrnmusic; MPI_Comm nrnmpi_world_comm; From 1796a8f2591c4da13cac97faaa7fc285d4a1f201 Mon Sep 17 00:00:00 2001 From: Pramod Kumbhar Date: Tue, 8 May 2018 16:28:12 +0200 Subject: [PATCH 22/22] track mod2c master --- external/mod2c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/external/mod2c b/external/mod2c index 4a54feb00..4ba558edc 160000 --- a/external/mod2c +++ b/external/mod2c @@ -1 +1 @@ -Subproject commit 4a54feb00a3d3e9dc5ceba43d743aa7b65ed78ab +Subproject commit 4ba558edc0ecd855a2e883ea24da75240f21e333