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@CMU-SAFARI

SAFARI Research Group at ETH Zurich and Carnegie Mellon University

Site for source code and tools distribution from SAFARI Research Group at ETH Zurich and Carnegie Mellon University.

Pinned

  1. A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, WIOx, HBMx, and various academic proposals. Described in the…

    C++ 250 130

  2. PrIM (Processing-In-Memory benchmarks) is the first benchmark suite for a real-world processing-in-memory (PIM) architecture. PrIM is developed to evaluate, analyze, and characterize the first publ…

    C 18 8

  3. DAMOV Public

    DAMOV is a benchmark suite and a methodical framework targeting the study of data movement bottlenecks in modern applications. It is intended to study new architectures, such as near-data processin…

    C++ 12 1

Repositories

  • Pythia

    A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning.

    C++ 0 1 0 0 Updated Sep 22, 2021
  • 0 0 0 0 Updated Sep 2, 2021
  • MIG-7-PHY-DDR3-Controller

    A DDR3 Controller that uses the Xilinx MIG-7 PHY to interface with DDR3 devices.

    Verilog 1 1 0 0 Updated Aug 22, 2021
  • Pythia-HDL

    Implementation of Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning in Chisel HDL.

    Scala 0 MIT 0 0 0 Updated Jul 31, 2021
  • EINSim

    DRAM error-correction code (ECC) simulator incorporating statistical error properties and DRAM design characteristics for inferring pre-correction error characteristics using only the post-correction errors. Described in the 2019 DSN paper by Patel et al.: https://people.inf.ethz.ch/omutlu/pub/understanding-and-modeling-in-DRAM-ECC_dsn19.pdf.

    C++ 5 MIT 0 0 0 Updated Jul 29, 2021
  • DAMOV

    DAMOV is a benchmark suite and a methodical framework targeting the study of data movement bottlenecks in modern applications. It is intended to study new architectures, such as near-data processing. Described by Oliveira et al. (preliminary version at https://arxiv.org/pdf/2105.03725.pdf)

    C++ 12 1 1 0 Updated Jul 13, 2021
  • MetaSys

    Metasys is the first open-source FPGA-based infrastructure with a prototype in a RISC-V core, to enable the rapid implementation and evaluation of a wide range of cross-layer software/hardware cooperative techniques techniques in real hardware. Described in our pre-print: https://arxiv.org/abs/2105.08123

    0 1 0 0 Updated Jul 9, 2021
  • NATSA

    NATSA is the first near-data-processing accelerator for time series analysis based on the Matrix Profile (SCRIMP) algorithm. NATSA exploits modern 3D-stacked High Bandwidth Memory (HBM) to enable efficient and fast matrix profile computation near memory. Described in ICCD 2020 by Fernandez et al. https://people.inf.ethz.ch/omutlu/pub/NATSA_time-…

    C++ 4 1 0 0 Updated Jun 28, 2021
  • COVIDHunter

    COVIDHunter 🦠🚧: An accurate and flexible COVID-19 outbreak simulation model that forecasts the strength of future mitigation measures and the numbers of cases, hospitalizations, and deaths for a given day, while considering the potential effect of environmental conditions. Described by Alser et al. (preliminary version at https://arxiv.org/abs/2…

    Swift 5 MIT 1 0 0 Updated Jun 27, 2021
  • prim-benchmarks

    PrIM (Processing-In-Memory benchmarks) is the first benchmark suite for a real-world processing-in-memory (PIM) architecture. PrIM is developed to evaluate, analyze, and characterize the first publicly-available real-world PIM architecture, the UPMEM PIM architecture. Described by Gómez-Luna et al. (preliminary version at https://arxiv.org/abs/2…

    C 18 MIT 8 0 0 Updated Jun 16, 2021

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