From b0993368cd9e13b24539a8d58635784e6770c4e6 Mon Sep 17 00:00:00 2001 From: Rob Taylor Date: Fri, 25 Jul 2025 17:07:12 +0100 Subject: [PATCH 1/8] Use chipflow-lib interface-type signatures --- mcu_soc/design/design.py | 35 +++++++++++------------------------ minimal/design/design.py | 11 +++++------ minimal/design/sim/main.cc | 5 +++-- 3 files changed, 19 insertions(+), 32 deletions(-) diff --git a/mcu_soc/design/design.py b/mcu_soc/design/design.py index 91fcdf9..41268ab 100644 --- a/mcu_soc/design/design.py +++ b/mcu_soc/design/design.py @@ -11,34 +11,21 @@ from chipflow_digital_ip.base import SoCID from chipflow_digital_ip.memory import QSPIFlash from amaranth_soc.wishbone.sram import WishboneSRAM -from chipflow_digital_ip.io import GPIOPeripheral -from chipflow_digital_ip.io import UARTPeripheral -from chipflow_digital_ip.io import SPISignature, SPIPeripheral -from chipflow_digital_ip.io import I2CSignature, I2CPeripheral - -from amaranth_cv32e40p.cv32e40p import CV32E40P, DebugModule -from chipflow_lib.platforms import InputIOSignature, OutputIOSignature +from chipflow_digital_ip.io import GPIOPeripheral, UARTPeripheral, SPIPeripheral, I2CPeripheral +from chipflow_digital_ip.processors import CV32E40P, OBIDebugModule +from chipflow_lib.platforms import GPIOSignature, UARTSignature, SPISignature, I2CSignature, QSPIFlashSignature, JTAGSignature from .ips.pwm import PWMPins, PWMPeripheral # from .ips.pdm import PDMPeripheral -__all__ = ["JTAGSignature", "MySoC"] - -JTAGSignature = wiring.Signature({ - "trst": Out(InputIOSignature(1)), - "tck": Out(InputIOSignature(1)), - "tms": Out(InputIOSignature(1)), - "tdi": Out(InputIOSignature(1)), - "tdo": Out(OutputIOSignature(1)), -}) - +__all__ = ["MySoC"] class MySoC(wiring.Component): def __init__(self): # Top level interfaces interfaces = { - "flash": Out(QSPIFlash.Signature()), - "cpu_jtag": Out(JTAGSignature) + "flash": Out(QSPIFlashSignature()), + "cpu_jtag": Out(JTAGSignature()) } self.user_spi_count = 3 @@ -51,10 +38,10 @@ def __init__(self): self.gpio_width = 8 for i in range(self.user_spi_count): - interfaces[f"user_spi_{i}"] = Out(SPISignature) + interfaces[f"user_spi_{i}"] = Out(SPISignature()) for i in range(self.i2c_count): - interfaces[f"i2c_{i}"] = Out(I2CSignature) + interfaces[f"i2c_{i}"] = Out(I2CSignature()) for i in range(self.motor_count): interfaces[f"motor_pwm{i}"] = Out(PWMPins.Signature()) @@ -63,10 +50,10 @@ def __init__(self): # interfaces[f"pdm_ao_{i}"] = Out(PDMPins.Signature()) for i in range(self.uart_count): - interfaces[f"uart_{i}"] = Out(UARTPeripheral.Signature()) + interfaces[f"uart_{i}"] = Out(UARTSignature()) for i in range(self.gpio_banks): - interfaces[f"gpio_{i}"] = Out(GPIOPeripheral.Signature(pin_count=self.gpio_width)) + interfaces[f"gpio_{i}"] = Out(GPIOSignature(pin_count=self.gpio_width)) super().__init__(interfaces) @@ -126,7 +113,7 @@ def elaborate(self, platform): m.submodules.cpu = cpu # Debug - debug = DebugModule() + debug = OBIDebugModule() wb_arbiter.add(debug.initiator) wb_decoder.add(debug.target, name="debug", addr=self.debug_base) m.d.comb += cpu.debug_req.eq(debug.debug_req) diff --git a/minimal/design/design.py b/minimal/design/design.py index 6df247f..71f7c13 100644 --- a/minimal/design/design.py +++ b/minimal/design/design.py @@ -15,8 +15,7 @@ from minerva.core import Minerva -from chipflow_lib.platforms import InputIOSignature, OutputIOSignature, BidirIOSignature, Sky130DriveMode -# from .ips.pdm import PDMPeripheral +from chipflow_lib.platforms import Sky130DriveMode, GPIOSignature, UARTSignature, QSPIFlashSignature __all__ = ["MySoC"] @@ -26,10 +25,10 @@ def __init__(self): # Top level interfaces super().__init__({ - "flash": Out(QSPIFlash.Signature()), - "uart_0": Out(UARTPeripheral.Signature()), - "gpio_0": Out(GPIOPeripheral.Signature(pin_count=8)), - "gpio_open_drain": Out(GPIOPeripheral.Signature(pin_count=4, sky130_drive_mode=Sky130DriveMode.OPEN_DRAIN_STRONG_UP)) + "flash": Out(QSPIFlashSignature()), + "uart_0": Out(UARTSignature()), + "gpio_0": Out(GPIOSignature(pin_count=8)), + "gpio_open_drain": Out(GPIOSignature(pin_count=4, sky130_drive_mode=Sky130DriveMode.OPEN_DRAIN_STRONG_UP)) }) # Memory regions: diff --git a/minimal/design/sim/main.cc b/minimal/design/sim/main.cc index 2a87003..dc9719f 100644 --- a/minimal/design/sim/main.cc +++ b/minimal/design/sim/main.cc @@ -14,13 +14,14 @@ using namespace cxxrtl_design; int main(int argc, char **argv) { p_sim__top top; - spiflash_model flash("flash", top.p_io_24_soc__flash__clk_24_o, top.p_io_24_soc__flash__csn_24_o, - top.p_io_24_soc__flash__d_24_o, top.p_io_24_soc__flash__d_24_oe, top.p_io_24_soc__flash__d_24_i); + spiflash_model flash("flash", top.p_io_24_soc__flash__clk_24_o, top.p_io_24_soc__flash__csn_24_o, top.p_io_24_soc__flash__d_24_o, top.p_io_24_soc__flash__d_24_oe, top.p_io_24_soc__flash__d_24_i); uart_model uart_0("uart_0", top.p_io_24_soc__uart__0__tx_24_o, top.p_io_24_soc__uart__0__rx_24_i); + gpio_model gpio_0("gpio_0", top.p_io_24_soc__gpio__0__gpio_24_o, top.p_io_24_soc__gpio__0__gpio_24_oe, top.p_io_24_soc__gpio__0__gpio_24_i); + cxxrtl::agent agent(cxxrtl::spool("spool.bin"), top); if (getenv("DEBUG")) // can also be done when a condition is violated, etc std::cerr << "Waiting for debugger on " << agent.start_debugging() << std::endl; From 44e20c40a0071ef1635f131a13264c78ca95266b Mon Sep 17 00:00:00 2001 From: Rob Taylor Date: Sun, 27 Jul 2025 15:15:42 +0100 Subject: [PATCH 2/8] update mcu_soc events_reference.json for peripheral names to match design --- mcu_soc/design/design.py | 2 +- mcu_soc/design/sim/main.cc | 12 ++++++------ mcu_soc/design/tests/events_reference.json | 18 +++++++++--------- 3 files changed, 16 insertions(+), 16 deletions(-) diff --git a/mcu_soc/design/design.py b/mcu_soc/design/design.py index 41268ab..2cba0c6 100644 --- a/mcu_soc/design/design.py +++ b/mcu_soc/design/design.py @@ -237,7 +237,7 @@ def elaborate(self, platform): #sw.add_periph("gpio", "BTN_GPIO", self.csr_btn_gpio_base) sw.generate("build/software/generated") - + #spiflash.load("build/software/generated") return m diff --git a/mcu_soc/design/sim/main.cc b/mcu_soc/design/sim/main.cc index efd7c81..f06c7ed 100644 --- a/mcu_soc/design/sim/main.cc +++ b/mcu_soc/design/sim/main.cc @@ -23,9 +23,9 @@ int main(int argc, char **argv) { gpio_model gpio_0("gpio_0", top.p_io_24_soc__gpio__0__gpio_24_o, top.p_io_24_soc__gpio__0__gpio_24_oe, top.p_io_24_soc__gpio__0__gpio_24_i); gpio_model gpio_1("gpio_1", top.p_io_24_soc__gpio__1__gpio_24_o, top.p_io_24_soc__gpio__1__gpio_24_oe, top.p_io_24_soc__gpio__1__gpio_24_i); - spi_model spi_0("spi_0", top.p_io_24_soc__user__spi__0__sck_24_o, top.p_io_24_soc__user__spi__0__csn_24_o, top.p_io_24_soc__user__spi__0__copi_24_o, top.p_io_24_soc__user__spi__0__cipo_24_i); - spi_model spi_1("spi_1", top.p_io_24_soc__user__spi__1__sck_24_o, top.p_io_24_soc__user__spi__1__csn_24_o, top.p_io_24_soc__user__spi__1__copi_24_o, top.p_io_24_soc__user__spi__1__cipo_24_i); - spi_model spi_2("spi_2", top.p_io_24_soc__user__spi__2__sck_24_o, top.p_io_24_soc__user__spi__2__csn_24_o, top.p_io_24_soc__user__spi__2__copi_24_o, top.p_io_24_soc__user__spi__2__cipo_24_i); + spi_model user_spi_0("user_spi_0", top.p_io_24_soc__user__spi__0__sck_24_o, top.p_io_24_soc__user__spi__0__csn_24_o, top.p_io_24_soc__user__spi__0__copi_24_o, top.p_io_24_soc__user__spi__0__cipo_24_i); + spi_model user_spi_1("user_spi_1", top.p_io_24_soc__user__spi__1__sck_24_o, top.p_io_24_soc__user__spi__1__csn_24_o, top.p_io_24_soc__user__spi__1__copi_24_o, top.p_io_24_soc__user__spi__1__cipo_24_i); + spi_model user_spi_2("user_spi_2", top.p_io_24_soc__user__spi__2__sck_24_o, top.p_io_24_soc__user__spi__2__csn_24_o, top.p_io_24_soc__user__spi__2__copi_24_o, top.p_io_24_soc__user__spi__2__cipo_24_i); i2c_model i2c_0("i2c_0", top.p_io_24_soc__i2c__0__sda_24_oe, top.p_io_24_soc__i2c__0__sda_24_i, top.p_io_24_soc__i2c__0__scl_24_oe, top.p_io_24_soc__i2c__0__scl_24_i); i2c_model i2c_1("i2c_1", top.p_io_24_soc__i2c__1__sda_24_oe, top.p_io_24_soc__i2c__1__sda_24_i, top.p_io_24_soc__i2c__1__scl_24_oe, top.p_io_24_soc__i2c__1__scl_24_i); @@ -48,9 +48,9 @@ int main(int argc, char **argv) { gpio_0.step(timestamp); gpio_1.step(timestamp); - spi_0.step(timestamp); - spi_1.step(timestamp); - spi_2.step(timestamp); + user_spi_0.step(timestamp); + user_spi_1.step(timestamp); + user_spi_2.step(timestamp); i2c_0.step(timestamp); i2c_1.step(timestamp); diff --git a/mcu_soc/design/tests/events_reference.json b/mcu_soc/design/tests/events_reference.json index 49986ad..ee1ddf4 100644 --- a/mcu_soc/design/tests/events_reference.json +++ b/mcu_soc/design/tests/events_reference.json @@ -1,8 +1,8 @@ { "events": [ -{ "timestamp": 0, "peripheral": "spi_0", "event": "deselect", "payload": "" }, -{ "timestamp": 0, "peripheral": "spi_1", "event": "deselect", "payload": "" }, -{ "timestamp": 0, "peripheral": "spi_2", "event": "deselect", "payload": "" }, +{ "timestamp": 0, "peripheral": "user_spi_0", "event": "deselect", "payload": "" }, +{ "timestamp": 0, "peripheral": "user_spi_1", "event": "deselect", "payload": "" }, +{ "timestamp": 0, "peripheral": "user_spi_2", "event": "deselect", "payload": "" }, { "timestamp": 58290, "peripheral": "uart_0", "event": "tx", "payload": 240 }, { "timestamp": 75894, "peripheral": "uart_0", "event": "tx", "payload": 159 }, { "timestamp": 93498, "peripheral": "uart_0", "event": "tx", "payload": 144 }, @@ -120,9 +120,9 @@ { "timestamp": 3751546, "peripheral": "uart_0", "event": "tx", "payload": 73 }, { "timestamp": 3759502, "peripheral": "uart_0", "event": "tx", "payload": 58 }, { "timestamp": 3767458, "peripheral": "uart_0", "event": "tx", "payload": 32 }, -{ "timestamp": 3772632, "peripheral": "spi_0", "event": "select", "payload": "" }, -{ "timestamp": 3774292, "peripheral": "spi_0", "event": "data", "payload": 90 }, -{ "timestamp": 3778120, "peripheral": "spi_0", "event": "deselect", "payload": "" }, +{ "timestamp": 3772632, "peripheral": "user_spi_0", "event": "select", "payload": "" }, +{ "timestamp": 3774292, "peripheral": "user_spi_0", "event": "data", "payload": 90 }, +{ "timestamp": 3778120, "peripheral": "user_spi_0", "event": "deselect", "payload": "" }, { "timestamp": 3792610, "peripheral": "uart_0", "event": "tx", "payload": 48 }, { "timestamp": 3802482, "peripheral": "uart_0", "event": "tx", "payload": 48 }, { "timestamp": 3812354, "peripheral": "uart_0", "event": "tx", "payload": 48 }, @@ -132,9 +132,9 @@ { "timestamp": 3851842, "peripheral": "uart_0", "event": "tx", "payload": 54 }, { "timestamp": 3861714, "peripheral": "uart_0", "event": "tx", "payload": 51 }, { "timestamp": 3873714, "peripheral": "uart_0", "event": "tx", "payload": 32 }, -{ "timestamp": 3875772, "peripheral": "spi_0", "event": "select", "payload": "" }, -{ "timestamp": 3877588, "peripheral": "spi_0", "event": "data", "payload": 1193046 }, -{ "timestamp": 3881260, "peripheral": "spi_0", "event": "deselect", "payload": "" }, +{ "timestamp": 3875772, "peripheral": "user_spi_0", "event": "select", "payload": "" }, +{ "timestamp": 3877588, "peripheral": "user_spi_0", "event": "data", "payload": 1193046 }, +{ "timestamp": 3881260, "peripheral": "user_spi_0", "event": "deselect", "payload": "" }, { "timestamp": 3895750, "peripheral": "uart_0", "event": "tx", "payload": 48 }, { "timestamp": 3905622, "peripheral": "uart_0", "event": "tx", "payload": 48 }, { "timestamp": 3915494, "peripheral": "uart_0", "event": "tx", "payload": 48 }, From bb19413d6f9bf422d680d81d3f93b28b38a0d403 Mon Sep 17 00:00:00 2001 From: Rob Taylor Date: Mon, 28 Jul 2025 15:00:50 +0100 Subject: [PATCH 3/8] Update mcu_soc tests to match design's names --- mcu_soc/design/tests/input.json | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/mcu_soc/design/tests/input.json b/mcu_soc/design/tests/input.json index 7902572..711cb77 100644 --- a/mcu_soc/design/tests/input.json +++ b/mcu_soc/design/tests/input.json @@ -9,14 +9,14 @@ { "type": "wait", "peripheral": "uart_0", "event": "tx", "payload": 35}, { "type": "action", "peripheral": "uart_1", "event": "tx", "payload": 42}, - { "type": "action", "peripheral": "spi_0", "event": "set_data", "payload": 99}, + { "type": "action", "peripheral": "user_spi_0", "event": "set_data", "payload": 99}, - { "type": "wait", "peripheral": "spi_0", "event": "select", "payload": ""}, - { "type": "wait", "peripheral": "spi_0", "event": "data", "payload": 90 }, - { "type": "wait", "peripheral": "spi_0", "event": "deselect", "payload": ""}, + { "type": "wait", "peripheral": "user_spi_0", "event": "select", "payload": ""}, + { "type": "wait", "peripheral": "user_spi_0", "event": "data", "payload": 90 }, + { "type": "wait", "peripheral": "user_spi_0", "event": "deselect", "payload": ""}, - { "type": "action", "peripheral": "spi_0", "event": "set_width", "payload": 21}, - { "type": "action", "peripheral": "spi_0", "event": "set_data", "payload": 773615}, + { "type": "action", "peripheral": "user_spi_0", "event": "set_width", "payload": 21}, + { "type": "action", "peripheral": "user_spi_0", "event": "set_data", "payload": 773615}, { "type": "wait", "peripheral": "i2c_0", "event": "start", "payload": "" }, { "type": "wait", "peripheral": "i2c_0", "event": "address", "payload": 160 }, From 027de807138b73a05a250be0ee0d2a7eef738ef2 Mon Sep 17 00:00:00 2001 From: Rob Taylor Date: Tue, 29 Jul 2025 00:35:01 +0100 Subject: [PATCH 4/8] Attach generated software to flash for simulation --- minimal/design/design.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/minimal/design/design.py b/minimal/design/design.py index 71f7c13..d4b2f36 100644 --- a/minimal/design/design.py +++ b/minimal/design/design.py @@ -15,7 +15,7 @@ from minerva.core import Minerva -from chipflow_lib.platforms import Sky130DriveMode, GPIOSignature, UARTSignature, QSPIFlashSignature +from chipflow_lib.platforms import Sky130DriveMode, GPIOSignature, UARTSignature, QSPIFlashSignature, attach_simulation_data __all__ = ["MySoC"] @@ -135,7 +135,7 @@ def elaborate(self, platform): sw.add_periph("soc_id", "SOC_ID", self.csr_soc_id_base) sw.generate("build/software/generated") - + attach_simulation_data(self.flash, file_name="build/software/software.bin", offset=self.bios_start) return m From 086a8ce5249a9486a67baffb6d85fa2209977c38 Mon Sep 17 00:00:00 2001 From: Rob Taylor Date: Thu, 31 Jul 2025 23:51:44 +0100 Subject: [PATCH 5/8] Fix mcu_soc to use attached_simulation_data --- mcu_soc/design/design.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/mcu_soc/design/design.py b/mcu_soc/design/design.py index 2cba0c6..068bc0e 100644 --- a/mcu_soc/design/design.py +++ b/mcu_soc/design/design.py @@ -13,7 +13,7 @@ from amaranth_soc.wishbone.sram import WishboneSRAM from chipflow_digital_ip.io import GPIOPeripheral, UARTPeripheral, SPIPeripheral, I2CPeripheral from chipflow_digital_ip.processors import CV32E40P, OBIDebugModule -from chipflow_lib.platforms import GPIOSignature, UARTSignature, SPISignature, I2CSignature, QSPIFlashSignature, JTAGSignature +from chipflow_lib.platforms import GPIOSignature, UARTSignature, SPISignature, I2CSignature, QSPIFlashSignature, JTAGSignature, attach_simulation_data from .ips.pwm import PWMPins, PWMPeripheral # from .ips.pdm import PDMPeripheral @@ -237,7 +237,7 @@ def elaborate(self, platform): #sw.add_periph("gpio", "BTN_GPIO", self.csr_btn_gpio_base) sw.generate("build/software/generated") - #spiflash.load("build/software/generated") + attach_simulation_data(self.flash, file_name="build/software/software.bin", offset=self.bios_start) return m From 97804f47527eadc9c0d617fd6c2bc97a89c4627b Mon Sep 17 00:00:00 2001 From: Rob Taylor Date: Wed, 30 Jul 2025 15:47:55 +0100 Subject: [PATCH 6/8] Remove amaranth-cv32e40p dependency - now included in chipflow-digital-ip --- mcu_soc/design/design.py | 8 + pdm.lock | 493 +++++++++++++++++++++------------------ pyproject.toml | 3 +- 3 files changed, 278 insertions(+), 226 deletions(-) diff --git a/mcu_soc/design/design.py b/mcu_soc/design/design.py index 068bc0e..aaed6ef 100644 --- a/mcu_soc/design/design.py +++ b/mcu_soc/design/design.py @@ -1,3 +1,5 @@ +from pprint import pformat + from chipflow_lib.platforms.sim import SimPlatform from chipflow_lib.software.soft_gen import SoftwareGenerator @@ -135,6 +137,7 @@ def elaborate(self, platform): csr_decoder.add(spiflash.csr_bus, name="spiflash", addr=self.csr_spiflash_base - self.csr_base) m.submodules.spiflash = spiflash + print(f"spiflash = {spiflash}") connect(m, flipped(self.flash), spiflash.pins) sw.add_periph("spiflash", "SPIFLASH", self.csr_spiflash_base) @@ -238,6 +241,11 @@ def elaborate(self, platform): sw.generate("build/software/generated") attach_simulation_data(self.flash, file_name="build/software/software.bin", offset=self.bios_start) + + print(f"CSR resources :\n{pformat(list(csr_decoder.bus.memory_map.all_resources()), indent=2)}") + print(f"CSR memory map:\n{pformat(csr_decoder.bus.memory_map._namespace._assignments, indent=2)}") + print(f"CSR decoder subs:\n{pformat(csr_decoder._subs, indent=2)}") + print(f"Wishbone memory map:\n{pformat(wb_decoder.bus.memory_map._namespace._assignments, indent=2)}") return m diff --git a/pdm.lock b/pdm.lock index c9d142c..4e864e0 100644 --- a/pdm.lock +++ b/pdm.lock @@ -5,14 +5,14 @@ groups = ["default", "dev"] strategy = ["inherit_metadata"] lock_version = "4.5.0" -content_hash = "sha256:887aa5304d939ae84e8b279f3e97da1d1c04407e2cbb66fd162be4a6b4a67d47" +content_hash = "sha256:81e0771ac7178098a81de9b642b132c31a12ea6ecc4519a87a0dc3625d7b4721" [[metadata.targets]] requires_python = ">=3.11" [[package]] name = "amaranth" -version = "0.5.6" +version = "0.5.7" requires_python = "~=3.8" summary = "Amaranth hardware definition language" groups = ["default"] @@ -23,8 +23,8 @@ dependencies = [ "pyvcd<0.5,>=0.2.2", ] files = [ - {file = "amaranth-0.5.6-py3-none-any.whl", hash = "sha256:88c64d8849769c576eaecd7add5869765e921b0573658fc7562edf2b350a6476"}, - {file = "amaranth-0.5.6.tar.gz", hash = "sha256:e6439af40248d76f9f9d761769edb7fd4bcf4bdd120fbc48bad20c72e349d97b"}, + {file = "amaranth-0.5.7-py3-none-any.whl", hash = "sha256:e32654a8d4ba9cdbd28dc9fe0c3ffc94bd281f7effe5532af9069e7b8110db18"}, + {file = "amaranth-0.5.7.tar.gz", hash = "sha256:31ea9065a9e9b7ec29e733780f398c0245d8e6044169dc84109c552caccc5e60"}, ] [[package]] @@ -39,18 +39,6 @@ dependencies = [ "amaranth<0.7,>=0.5", ] -[[package]] -name = "amaranth-cv32e40p" -version = "0.0.0" -requires_python = "<4.0,>=3.8" -git = "https://github.com/ChipFlow/amaranth-cv32e40p" -revision = "d6662e76bbb13785cd3afc6644c884a92354fe99" -summary = "CV32E40P and Amaranth Integration" -groups = ["default"] -dependencies = [ - "amaranth>=0.5", -] - [[package]] name = "amaranth-soc" version = "0.1a1.dev24" @@ -77,32 +65,32 @@ dependencies = [ [[package]] name = "amaranth-yosys" -version = "0.50.0.0.post113" +version = "0.50.0.0.post114" requires_python = "~=3.8" summary = "Specialized WebAssembly build of Yosys used by Amaranth HDL" groups = ["default"] dependencies = [ "importlib-resources>=1.4; python_version < \"3.9\"", - "wasmtime<35,>=1", + "wasmtime<36,>=1", ] files = [ - {file = "amaranth_yosys-0.50.0.0.post113-py3-none-any.whl", hash = "sha256:b294c3ad637da758aef0ad58962d3e8b249862461a1650890ac1f76b54d44caf"}, + {file = "amaranth_yosys-0.50.0.0.post114-py3-none-any.whl", hash = "sha256:824473dc36d76ac90294a0304ae7636cef8b9dcad1945980cc5e5efa3ab2f070"}, ] [[package]] name = "amaranth" -version = "0.5.6" +version = "0.5.7" extras = ["builtin-yosys"] requires_python = "~=3.8" summary = "Amaranth hardware definition language" groups = ["default"] dependencies = [ "amaranth-yosys>=0.40", - "amaranth==0.5.6", + "amaranth==0.5.7", ] files = [ - {file = "amaranth-0.5.6-py3-none-any.whl", hash = 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git+https://github.com/ChipFlow/amaranth-cv32e40p", + "amaranth[builtin-yosys]>=0.5.4,<0.6", "chipflow-digital-ip @ git+https://github.com/ChipFlow/chipflow-digital-ip", "minerva @ git+https://github.com/minerva-cpu/minerva", "chipflow-lib @ git+https://github.com/ChipFlow/chipflow-lib.git", From be2a4dc03814e9d56a340de250e7dd7074b794d2 Mon Sep 17 00:00:00 2001 From: Rob Taylor Date: Wed, 10 Sep 2025 14:40:13 +0100 Subject: [PATCH 7/8] delete old simulator code --- mcu_soc/design/sim/main.cc | 85 -------------------------------------- minimal/design/sim/main.cc | 68 ------------------------------ 2 files changed, 153 deletions(-) delete mode 100644 mcu_soc/design/sim/main.cc delete mode 100644 minimal/design/sim/main.cc diff --git a/mcu_soc/design/sim/main.cc b/mcu_soc/design/sim/main.cc deleted file mode 100644 index f06c7ed..0000000 --- a/mcu_soc/design/sim/main.cc +++ /dev/null @@ -1,85 +0,0 @@ -#undef NDEBUG - -#include -#include -#include "sim_soc.h" -#include "models.h" - -#include -#include - -using namespace cxxrtl::time_literals; -using namespace cxxrtl_design; - -int main(int argc, char **argv) { - p_sim__top top; - - spiflash_model flash("flash", top.p_io_24_soc__flash__clk_24_o, top.p_io_24_soc__flash__csn_24_o, - top.p_io_24_soc__flash__d_24_o, top.p_io_24_soc__flash__d_24_oe, top.p_io_24_soc__flash__d_24_i); - - uart_model uart_0("uart_0", top.p_io_24_soc__uart__0__tx_24_o, top.p_io_24_soc__uart__0__rx_24_i); - uart_model uart_1("uart_1", top.p_io_24_soc__uart__1__tx_24_o, top.p_io_24_soc__uart__1__rx_24_i); - - gpio_model gpio_0("gpio_0", top.p_io_24_soc__gpio__0__gpio_24_o, top.p_io_24_soc__gpio__0__gpio_24_oe, top.p_io_24_soc__gpio__0__gpio_24_i); - gpio_model gpio_1("gpio_1", top.p_io_24_soc__gpio__1__gpio_24_o, top.p_io_24_soc__gpio__1__gpio_24_oe, top.p_io_24_soc__gpio__1__gpio_24_i); - - spi_model user_spi_0("user_spi_0", top.p_io_24_soc__user__spi__0__sck_24_o, top.p_io_24_soc__user__spi__0__csn_24_o, top.p_io_24_soc__user__spi__0__copi_24_o, top.p_io_24_soc__user__spi__0__cipo_24_i); - spi_model user_spi_1("user_spi_1", top.p_io_24_soc__user__spi__1__sck_24_o, top.p_io_24_soc__user__spi__1__csn_24_o, top.p_io_24_soc__user__spi__1__copi_24_o, top.p_io_24_soc__user__spi__1__cipo_24_i); - spi_model user_spi_2("user_spi_2", top.p_io_24_soc__user__spi__2__sck_24_o, top.p_io_24_soc__user__spi__2__csn_24_o, top.p_io_24_soc__user__spi__2__copi_24_o, top.p_io_24_soc__user__spi__2__cipo_24_i); - - i2c_model i2c_0("i2c_0", top.p_io_24_soc__i2c__0__sda_24_oe, top.p_io_24_soc__i2c__0__sda_24_i, top.p_io_24_soc__i2c__0__scl_24_oe, top.p_io_24_soc__i2c__0__scl_24_i); - i2c_model i2c_1("i2c_1", top.p_io_24_soc__i2c__1__sda_24_oe, top.p_io_24_soc__i2c__1__sda_24_i, top.p_io_24_soc__i2c__1__scl_24_oe, top.p_io_24_soc__i2c__1__scl_24_i); - - cxxrtl::agent agent(cxxrtl::spool("spool.bin"), top); - if (getenv("DEBUG")) // can also be done when a condition is violated, etc - std::cerr << "Waiting for debugger on " << agent.start_debugging() << std::endl; - - open_event_log(BUILD_DIR "/sim/events.json"); - open_input_commands(PROJECT_ROOT "/design/tests/input.json"); - - unsigned timestamp = 0; - auto tick = [&]() { - // agent.print(stringf("timestamp %d\n", timestamp), CXXRTL_LOCATION); - - flash.step(timestamp); - uart_0.step(timestamp); - uart_1.step(timestamp); - - gpio_0.step(timestamp); - gpio_1.step(timestamp); - - user_spi_0.step(timestamp); - user_spi_1.step(timestamp); - user_spi_2.step(timestamp); - - i2c_0.step(timestamp); - i2c_1.step(timestamp); - - top.p_io_24_clk_24_i.set(false); - agent.step(); - agent.advance(1_us); - ++timestamp; - - top.p_io_24_clk_24_i.set(true); - agent.step(); - agent.advance(1_us); - ++timestamp; - - // if (timestamp == 10) - // agent.breakpoint(CXXRTL_LOCATION); - }; - - flash.load_data(BUILD_DIR "/software/software.bin", 0x00100000U); - agent.step(); - agent.advance(1_us); - - top.p_io_24_rst__n_24_i.set(false); - tick(); - - top.p_io_24_rst__n_24_i.set(true); - for (int i = 0; i < 3000000; i++) - tick(); - - close_event_log(); - return 0; -} diff --git a/minimal/design/sim/main.cc b/minimal/design/sim/main.cc deleted file mode 100644 index dc9719f..0000000 --- a/minimal/design/sim/main.cc +++ /dev/null @@ -1,68 +0,0 @@ -#undef NDEBUG - -#include -#include -#include "sim_soc.h" -#include "models.h" - -#include -#include - -using namespace cxxrtl::time_literals; -using namespace cxxrtl_design; - -int main(int argc, char **argv) { - p_sim__top top; - - spiflash_model flash("flash", top.p_io_24_soc__flash__clk_24_o, top.p_io_24_soc__flash__csn_24_o, top.p_io_24_soc__flash__d_24_o, top.p_io_24_soc__flash__d_24_oe, top.p_io_24_soc__flash__d_24_i); - - uart_model uart_0("uart_0", top.p_io_24_soc__uart__0__tx_24_o, top.p_io_24_soc__uart__0__rx_24_i); - - - gpio_model gpio_0("gpio_0", top.p_io_24_soc__gpio__0__gpio_24_o, top.p_io_24_soc__gpio__0__gpio_24_oe, top.p_io_24_soc__gpio__0__gpio_24_i); - - - cxxrtl::agent agent(cxxrtl::spool("spool.bin"), top); - if (getenv("DEBUG")) // can also be done when a condition is violated, etc - std::cerr << "Waiting for debugger on " << agent.start_debugging() << std::endl; - - open_event_log(BUILD_DIR "/sim/events.json"); - open_input_commands(PROJECT_ROOT "/design/tests/input.json"); - - unsigned timestamp = 0; - auto tick = [&]() { - // agent.print(stringf("timestamp %d\n", timestamp), CXXRTL_LOCATION); - - flash.step(timestamp); - uart_0.step(timestamp); - - gpio_0.step(timestamp); - - top.p_io_24_clk_24_i.set(false); - agent.step(); - agent.advance(1_us); - ++timestamp; - - top.p_io_24_clk_24_i.set(true); - agent.step(); - agent.advance(1_us); - ++timestamp; - - // if (timestamp == 10) - // agent.breakpoint(CXXRTL_LOCATION); - }; - - flash.load_data(BUILD_DIR "/software/software.bin", 0x00100000U); - agent.step(); - agent.advance(1_us); - - top.p_io_24_rst__n_24_i.set(false); - tick(); - - top.p_io_24_rst__n_24_i.set(true); - for (int i = 0; i < 3000000; i++) - tick(); - - close_event_log(); - return 0; -} From 5aa01080830a36d2c98569fea6d09e0b458b0100 Mon Sep 17 00:00:00 2001 From: Rob Taylor Date: Wed, 10 Sep 2025 14:45:16 +0100 Subject: [PATCH 8/8] Make gitignore a bit more useful --- .gitignore | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/.gitignore b/.gitignore index 56d5696..fc6682a 100644 --- a/.gitignore +++ b/.gitignore @@ -2,12 +2,17 @@ __pycache__/ *.egg-info /dist +.coverage # pdm /.pdm-plugins /.pdm-python /.pdm-build /.venv +/.env* +/.env.* +/overrides.txt + # pytest /.pytest_cache @@ -25,4 +30,4 @@ __pycache__/ *.gtkw # misc -log \ No newline at end of file +log