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Example using DDR2 memory and MIG IP on the Nexys 4 DDR / Nexys A7 FPGA Trainer
Machine configuration files for my OpenPnP based Pick and Place machine
Open Source SMT Pick and Place Hardware and Software
Reference implementation of the Raisin64 on a Nexys 4 DDR board
Fork of binutils-gdb for the Raisin64
Source and build tree for the Raisin64 project documentation
RISC Architecture with In-order Superscalar INterlocked-pipeline - 64 Bits
Pipelined VGA text/character generator controller in Verilog
OpenOCD port for the Raisin64
Easy-to-use JTAG TAP and Debug Controller core written in Verilog
HPLG filter for output devices
Quokka 6502 Microprocessor Trainer
Example for COSC class demos
Python based incremental file backup using large archives for minimal cost AWS Glacier storage
TCP socket bootloader for the ESP32 over WPA2-Enterprise networks
Custom 50Mhz QAM/PSK ham radio for my rover project