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x86: Ignore trap bits on single step exceptions

commit 6c0aca2 upstream.

When a single step exception fires, the trap bits, used to
signal hardware breakpoints, are in a random state.

These trap bits might be set if another exception will follow,
like a breakpoint in the next instruction, or a watchpoint in the
previous one. Or there can be any junk there.

So if we handle these trap bits during the single step exception,
we are going to handle an exception twice, or we are going to
handle junk.

Just ignore them in this case.

This fixes

Reported-by: Michael Stefaniuc <>
Signed-off-by: Frederic Weisbecker <>
Cc: Rafael J. Wysocki <>
Cc: Maciej Rutecki <>
Cc: Alexandre Julliard <>
Cc: Jason Wessel <>
Signed-off-by: Greg Kroah-Hartman <>
Signed-off-by: Andi Kleen <>
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commit 1442b66f3af5b6ecfb7d70f21c5d062f7c108e0b 1 parent a28c2bb
@fweisbec fweisbec authored Andi Kleen committed
Showing with 4 additions and 0 deletions.
  1. +4 −0 arch/x86/kernel/hw_breakpoint.c
4 arch/x86/kernel/hw_breakpoint.c
@@ -421,6 +421,10 @@ static int __kprobes hw_breakpoint_handler(struct die_args *args)
dr6_p = (unsigned long *)ERR_PTR(args->err);
dr6 = *dr6_p;
+ /* If it's a single step, TRAP bits are random */
+ if (dr6 & DR_STEP)
+ return NOTIFY_DONE;
/* Do an early return if no trap bits are set in DR6 */
if ((dr6 & DR_TRAP_BITS) == 0)
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