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- fixed compile errors introduces by last commit

- added I2C sniffer (WIP)
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smdprutser committed May 8, 2018
1 parent 67fce21 commit f28a978ef615fc84dc425a791ba3668dbae6491d
Showing with 129 additions and 10 deletions.
  1. +8 −2 source/HWI2C.c
  2. +6 −6 source/HWSPI.c
  3. +110 −2 source/sniffer.c
  4. +5 −0 source/sniffer.h
View
@@ -7,6 +7,7 @@
#include "HWI2C.h"
#include "cdcacm.h"
#include "UI.h"
#include "sniffer.h"
static uint8_t speed;
@@ -164,11 +165,16 @@ void HWI2C_macro(uint32_t macro)
switch(macro)
{
case 0: cdcprintf(" 1. I2C Address search\r\n");
// cdcprintf(" 2. I2C sniffer\r\n";
cdcprintf(" 2. I2C sniffer\r\n");
break;
case 1: I2Csearch();
break;
case 2: cdcprintf("Macro not available");
case 2: cdcprintf("press any key to exit\r\n");
HWI2C_cleanup();
sniffI2C();
HWI2C_setup_exc();
break;
break;
default: cdcprintf("Macro not defined");
modeConfig.error=1;
View
@@ -112,12 +112,12 @@ void HWSPI_macro(uint32_t macro)
switch(macro)
{
case 0: cdcprintf("Available macros\r\n");
cdcprintf(" 1. EXTI SPI sniffer\r\n";
cdcprintf(" 2. HW SPI sniffer\r\n";
cdcprintf(" 11. cpol=0\r\n";
cdcprintf(" 12. cpol=1\r\n";
cdcprintf(" 13. cpha=0\r\n";
cdcprintf(" 14. cpha=1\r\n";
cdcprintf(" 1. EXTI SPI sniffer (duplex)\r\n");
cdcprintf(" 2. HW SPI sniffer (MISO ony)\r\n");
cdcprintf(" 11. cpol=0\r\n");
cdcprintf(" 12. cpol=1\r\n");
cdcprintf(" 13. cpha=0\r\n");
cdcprintf(" 14. cpha=1\r\n");
break;
case 1: cdcprintf("Sniff settings cpol=%d, cpha=%d, csidle=%d\r\n", (cpol>>1), cpha, csidle);
cdcprintf("press any key to exit\r\n");
View
@@ -8,13 +8,44 @@
#include "UI.h"
#include "sniffer.h"
static volatile uint8_t armed;
static volatile uint8_t armed, state;
static volatile uint8_t csidle;
static uint8_t miso, mosi, clock;
static uint8_t miso, mosi, clock, data;
enum {
WAITFORSTART,
GET8BITS,
GETACK,
};
void (*sniffisr)(void);
void sniffI2C(void)
{
exti_set_trigger(EXTI13, EXTI_TRIGGER_RISING);
exti_set_trigger(EXTI15, EXTI_TRIGGER_BOTH);
data=0;
clock=0;
state=WAITFORSTART;
sniffisr=exti15_10_isr_i2c;
exti_select_source(EXTI13, GPIOB);
exti_select_source(EXTI15, GPIOB);
exti_enable_request(EXTI13);
exti_enable_request(EXTI15);
// nvic_set_priority(NVIC_EXTI15_10_IRQ, 0);
nvic_enable_irq(NVIC_EXTI15_10_IRQ);
cdcgetc();
nvic_disable_irq(NVIC_EXTI15_10_IRQ);
exti_disable_request(EXTI13);
exti_disable_request(EXTI15);
}
void sniffSPI(uint8_t cpol, uint8_t cpha, uint8_t cs)
{
if(cpol==0)
@@ -47,6 +78,8 @@ void sniffSPI(uint8_t cpol, uint8_t cpha, uint8_t cs)
mosi=0;
armed=0;
sniffisr=exti15_10_isr_spi;
exti_select_source(EXTI12, GPIOB);
exti_select_source(EXTI13, GPIOB);
exti_enable_request(EXTI12);
@@ -64,6 +97,12 @@ void sniffSPI(uint8_t cpol, uint8_t cpha, uint8_t cs)
//
void exti15_10_isr(void)
{
sniffisr();
}
// SPi isr
void exti15_10_isr_spi(void)
{
if(exti_get_flag_status(EXTI10)) // not used
{
@@ -126,3 +165,72 @@ void exti15_10_isr(void)
exti_reset_request(EXTI15);
}
}
// i2c isr
void exti15_10_isr_i2c(void)
{
if(exti_get_flag_status(EXTI10)) // not used
{
exti_reset_request(EXTI10);
}
if(exti_get_flag_status(EXTI11)) // not used
{
exti_reset_request(EXTI11);
}
if(exti_get_flag_status(EXTI12)) // CS
{
exti_reset_request(EXTI12);
}
if(exti_get_flag_status(EXTI13)) // CLOCK/SCL
{
switch(state)
{
case GETACK:
if(gpio_get(GPIOB, GPIO15)) cdcputc('.');
else cdcputc('A');
state=GET8BITS;
break;
case GET8BITS:
data<<=1;
if(gpio_get(GPIOB, GPIO15)) data|=1;
clock++;
if(clock==8)
{
state=GETACK;
clock=0;
cdcprintf("0x%02X", data);
}
default:
break;
}
exti_reset_request(EXTI13);
}
if(exti_get_flag_status(EXTI14)) // MISO/-
{
exti_reset_request(EXTI14);
}
if(exti_get_flag_status(EXTI15)) // MOSI/SDA
{
if((state!=GETACK)) //&&(clock==1)) // (!((state==GETACK)||(clock!=0)))
{
if(gpio_get(GPIOB, GPIO13))
{
if(gpio_get(GPIOB, GPIO15))
{
cdcputc(']');
state=WAITFORSTART;
clock=0;
}
else
{
cdcputc('[');
state=GET8BITS;
clock=0;
}
}
}
exti_reset_request(EXTI15);
}
}
View
@@ -1,3 +1,8 @@
void sniffSPI(uint8_t cpol, uint8_t cpha, uint8_t cs);
void sniffI2C(void);
void exti15_10_isr_i2c(void);
void exti15_10_isr_spi(void);

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