{"payload":{"header_redesign_enabled":false,"results":[{"id":"688072951","archived":false,"color":"#adb2cb","followers":0,"has_funding_file":false,"hl_name":"DericAugusto/ISN2023_DigitalSystems","hl_trunc_description":"Material from the course of Design of Digital Systems at ENSEM - Université de Lorraine.","language":"VHDL","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":688072951,"name":"ISN2023_DigitalSystems","owner_id":49929543,"owner_login":"DericAugusto","updated_at":"2023-09-17T10:52:11.295Z","has_issues":true}},"sponsorable":false,"topics":["boolean-algebra","quartus","boolean-logic","vhdl-code","fpga-programming","combinatorial-logic","dynamic-modeling"],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":63,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253ADericAugusto%252FISN2023_DigitalSystems%2B%2Blanguage%253AVHDL","metadata":null,"csrf_tokens":{"/DericAugusto/ISN2023_DigitalSystems/star":{"post":"KnkOYuSwyEXLTP6EcRwPgD-T_yN1PpTbZhdsv-bnVqcllxatVTF_sMMgxPSuFyWWvcVtgXP5416ubFzRxaiwAA"},"/DericAugusto/ISN2023_DigitalSystems/unstar":{"post":"wBERo3GeHGififhogVU__Yz7-DLLHJhR1S569-KDwfCQgt9nVzHsWl97UTkean64nQF9hhFnfAIKhvADOwNifw"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"VdaEGyZKaSYxAussD0T65e7SgCal7uo-xWVEQ4TsZoI0QKCT2a5wNc1tJElMqvPM1QfBCVxqo1hedm-U550pTQ"}}},"title":"Repository search results"}