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bce: Use MSI, if device supports it

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commit 83ce3dce88993f2547ec33750d49c2bd0166643f 1 parent 92d0a0f
authored December 27, 2011
55  sys/dev/netif/bce/if_bce.c
@@ -472,6 +472,8 @@ static uint32_t	bce_rx_bds = 128;		/* bcm: 6 */
472 472
 static uint32_t	bce_rx_ticks_int = 125;		/* bcm: 18 */
473 473
 static uint32_t	bce_rx_ticks = 125;		/* bcm: 18 */
474 474
 
  475
+static int	bce_msi_enable = 1;
  476
+
475 477
 TUNABLE_INT("hw.bce.tx_bds_int", &bce_tx_bds_int);
476 478
 TUNABLE_INT("hw.bce.tx_bds", &bce_tx_bds);
477 479
 TUNABLE_INT("hw.bce.tx_ticks_int", &bce_tx_ticks_int);
@@ -480,6 +482,7 @@ TUNABLE_INT("hw.bce.rx_bds_int", &bce_rx_bds_int);
480 482
 TUNABLE_INT("hw.bce.rx_bds", &bce_rx_bds);
481 483
 TUNABLE_INT("hw.bce.rx_ticks_int", &bce_rx_ticks_int);
482 484
 TUNABLE_INT("hw.bce.rx_ticks", &bce_rx_ticks);
  485
+TUNABLE_INT("hw.bce.msi.enable", &bce_msi_enable);
483 486
 
484 487
 /****************************************************************************/
485 488
 /* DragonFly device dispatch table.                                         */
@@ -663,11 +666,10 @@ bce_attach(device_t dev)
663 666
 	struct bce_softc *sc = device_get_softc(dev);
664 667
 	struct ifnet *ifp = &sc->arpcom.ac_if;
665 668
 	uint32_t val;
666  
-	int rid, rc = 0;
  669
+	u_int irq_flags;
  670
+	int rid, rc = 0, msi_enable;
667 671
 	int i, j;
668  
-#ifdef notyet
669  
-	int count;
670  
-#endif
  672
+	char env[64];
671 673
 
672 674
 	sc->bce_dev = dev;
673 675
 	if_initname(ifp, device_get_name(dev), device_get_unit(dev));
@@ -688,16 +690,32 @@ bce_attach(device_t dev)
688 690
 	sc->bce_bhandle = rman_get_bushandle(sc->bce_res_mem);
689 691
 
690 692
 	/* Allocate PCI IRQ resources. */
691  
-#ifdef notyet
692  
-	count = pci_msi_count(dev);
693  
-	if (count == 1 && pci_alloc_msi(dev, &count) == 0) {
694  
-		rid = 1;
695  
-		sc->bce_flags |= BCE_USING_MSI_FLAG;
696  
-	} else
697  
-#endif
698  
-	rid = 0;
699  
-	sc->bce_res_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
700  
-						 RF_SHAREABLE | RF_ACTIVE);
  693
+	msi_enable = bce_msi_enable;
  694
+	ksnprintf(env, sizeof(env), "hw.%s.msi.enable",
  695
+	    device_get_nameunit(dev));
  696
+	kgetenv_int(env, &msi_enable);
  697
+
  698
+	sc->bce_irq_rid = 0;
  699
+	sc->bce_irq_type = BCE_IRQ_TYPE_LEGACY;
  700
+	irq_flags = RF_SHAREABLE | RF_ACTIVE;
  701
+
  702
+	if (msi_enable) {
  703
+		int cpu = -1;
  704
+
  705
+		ksnprintf(env, sizeof(env), "hw.%s.msi.cpu",
  706
+		    device_get_nameunit(dev));
  707
+		kgetenv_int(env, &cpu);
  708
+		if (cpu >= ncpus)
  709
+			cpu = ncpus - 1;
  710
+
  711
+		if (pci_alloc_msi(dev, &sc->bce_irq_rid, 1, cpu) == 0) {
  712
+			irq_flags &= ~RF_SHAREABLE;
  713
+			sc->bce_irq_type = BCE_IRQ_TYPE_MSI;
  714
+		}
  715
+	}
  716
+
  717
+	sc->bce_res_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
  718
+	    &sc->bce_irq_rid, irq_flags);
701 719
 	if (sc->bce_res_irq == NULL) {
702 720
 		device_printf(dev, "PCI map interrupt failed\n");
703 721
 		rc = ENXIO;
@@ -1025,15 +1043,12 @@ bce_detach(device_t dev)
1025 1043
 	bus_generic_detach(dev);
1026 1044
 
1027 1045
 	if (sc->bce_res_irq != NULL) {
1028  
-		bus_release_resource(dev, SYS_RES_IRQ,
1029  
-			sc->bce_flags & BCE_USING_MSI_FLAG ? 1 : 0,
1030  
-			sc->bce_res_irq);
  1046
+		bus_release_resource(dev, SYS_RES_IRQ, sc->bce_irq_rid,
  1047
+		    sc->bce_res_irq);
1031 1048
 	}
1032 1049
 
1033  
-#ifdef notyet
1034  
-	if (sc->bce_flags & BCE_USING_MSI_FLAG)
  1050
+	if (sc->bce_irq_type == BCE_IRQ_TYPE_MSI)
1035 1051
 		pci_release_msi(dev);
1036  
-#endif
1037 1052
 
1038 1053
 	if (sc->bce_res_mem != NULL) {
1039 1054
 		bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(0),
6  sys/dev/netif/bce/if_bcereg.h
@@ -5858,6 +5858,8 @@ struct bce_softc {
5858 5858
 	bus_space_handle_t	bce_bhandle;	/* Device bus handle */
5859 5859
 	struct resource		*bce_res_irq;	/* IRQ Resource Handle */
5860 5860
 	void			*bce_intrhand;	/* Interrupt handler */
  5861
+	int			bce_irq_type;
  5862
+	int			bce_irq_rid;
5861 5863
 
5862 5864
 	/* ASIC Chip ID. */
5863 5865
 	uint32_t		bce_chipid;
@@ -5868,7 +5870,6 @@ struct bce_softc {
5868 5870
 #define BCE_PCI_32BIT_FLAG 	0x00000002
5869 5871
 #define BCE_NO_WOL_FLAG		0x00000008
5870 5872
 #define BCE_USING_DAC_FLAG	0x00000010
5871  
-#define BCE_USING_MSI_FLAG 	0x00000020
5872 5873
 #define BCE_MFW_ENABLE_FLAG	0x00000040	/* Management F/W is enabled */
5873 5874
 #define BCE_PCIE_FLAG		0x00000200
5874 5875
 
@@ -6126,4 +6127,7 @@ struct bce_softc {
6126 6127
 #define BCE_COALMASK_RX_TICKS_INT	0x40
6127 6128
 #define BCE_COALMASK_RX_TICKS		0x80
6128 6129
 
  6130
+#define BCE_IRQ_TYPE_LEGACY		0
  6131
+#define BCE_IRQ_TYPE_MSI		1
  6132
+
6129 6133
 #endif /* #ifndef _BCE_H_DEFINED */

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