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In process of merging in current master changes into MX1_MX2 branch. …

…Fubarino Mini compiles at this point.
  • Loading branch information...
commit 8cf1a38573fdc344dd03f278fe7e18447fdf8c76 1 parent 24953aa
@EmbeddedMan authored
View
44 hardware/pic32/boards.txt
@@ -82,7 +82,7 @@ uno_pic32.board=_BOARD_UNO_
uno_pic32.board.define=
#uno_pic32.compiler.define=
uno_pic32.ccflags=ffff
-uno_pic32.ldscript=chipKIT-application-32MX320F128L.ld
+uno_pic32.ldscript=chipKIT-application-32MX320F128.ld
# end of new items
# Use a high -Gnum for devices that have less than 64K of data memory
@@ -117,7 +117,7 @@ mega_pic32.platform=pic32
mega_pic32.board=_BOARD_MEGA_
mega_pic32.board.define=
mega_pic32.ccflags=ffff
-mega_pic32.ldscript=chipKIT-application-32MX795F512L.ld
+mega_pic32.ldscript=chipKIT-application-32MX795F512.ld
# end of new items
mega_pic32.upload.protocol=stk500v2
@@ -146,7 +146,7 @@ mega_usb_pic32.platform=pic32
mega_usb_pic32.board=_BOARD_MEGA_USB_
mega_usb_pic32.board.define=-D_USE_USB_FOR_SERIAL_
mega_usb_pic32.ccflags=ffff
-mega_usb_pic32.ldscript=chipKIT-application-32MX795F512L.ld
+mega_usb_pic32.ldscript=chipKIT-application-32MX795F512.ld
# end of new items
mega_usb_pic32.upload.protocol=stk500v2
@@ -175,7 +175,7 @@ chipkit_uc32.platform=pic32
chipkit_uc32.board=_BOARD_UC32_
chipkit_uc32.board.define=
chipkit_uc32.ccflags=ffff
-chipkit_uc32.ldscript=chipKIT-application-32MX340F512H.ld
+chipkit_uc32.ldscript=chipKIT-application-32MX340F512.ld
# end of new items
# Use a high -Gnum for devices that have less than 64K of data memory
@@ -210,7 +210,7 @@ cerebot_mx3ck_512.platform=pic32
cerebot_mx3ck_512.board=_BOARD_CEREBOT_MX3CK_512_
cerebot_mx3ck_512.board.define=
cerebot_mx3ck_512.ccflags=ffff
-cerebot_mx3ck_512.ldscript=chipKIT-application-32MX340F512H.ld
+cerebot_mx3ck_512.ldscript=chipKIT-application-32MX340F512.ld
# end of new items
# Use a high -Gnum for devices that have less than 64K of data memory
@@ -245,7 +245,7 @@ cerebot_mx3ck.platform=pic32
cerebot_mx3ck.board=_BOARD_CEREBOT_MX3CK_
cerebot_mx3ck.board.define=
cerebot_mx3ck.ccflags=ffff
-cerebot_mx3ck.ldscript=chipKIT-application-32MX320F128L.ld
+cerebot_mx3ck.ldscript=chipKIT-application-32MX320F128.ld
# end of new items
# Use a high -Gnum for devices that have less than 64K of data memory
@@ -280,7 +280,7 @@ cerebot_mx4ck.platform=pic32
cerebot_mx4ck.board=_BOARD_CEREBOT_MX4CK_
cerebot_mx4ck.board.define=
cerebot_mx4ck.ccflags=ffff
-cerebot_mx4ck.ldscript=chipKIT-application-32MX460F512L.ld
+cerebot_mx4ck.ldscript=chipKIT-application-32MX460F512.ld
# end of new items
cerebot_mx4ck.upload.protocol=stk500v2
@@ -309,7 +309,7 @@ cerebot_mx7ck.platform=pic32
cerebot_mx7ck.board=_BOARD_CEREBOT_MX7CK_
cerebot_mx7ck.board.define=
cerebot_mx7ck.ccflags=ffff
-cerebot_mx7ck.ldscript=chipKIT-application-32MX795F512L.ld
+cerebot_mx7ck.ldscript=chipKIT-application-32MX795F512.ld
# end of new items
cerebot_mx7ck.upload.protocol=stk500v2
@@ -371,7 +371,7 @@ cerebot32mx4.platform=pic32
cerebot32mx4.board=_BOARD_CEREBOT_32MX4_
cerebot32mx4.board.define=
cerebot32mx4.ccflags=ffff
-cerebot32mx4.ldscript=chipKIT-application-32MX460F512L.ld
+cerebot32mx4.ldscript=chipKIT-application-32MX460F512.ld
# end of new items
cerebot32mx4.upload.protocol=stk500v2
@@ -400,7 +400,7 @@ cerebot32mx7.platform=pic32
cerebot32mx7.board=_BOARD_CEREBOT_32MX7_
cerebot32mx7.board.define=
cerebot32mx7.ccflags=ffff
-cerebot32mx7.ldscript=chipKIT-application-32MX795F512L.ld
+cerebot32mx7.ldscript=chipKIT-application-32MX795F512.ld
# end of new items
cerebot32mx7.upload.protocol=stk500v2
@@ -429,7 +429,7 @@ mc_pic32_starterkit.platform=pic32
mc_pic32_starterkit.board=_BOARD_PIC32_STARTER_KIT_
mc_pic32_starterkit.board.define=
mc_pic32_starterkit.ccflags=ffff
-mc_pic32_starterkit.ldscript=chipKIT-application-32MX320F128L.ld
+mc_pic32_starterkit.ldscript=chipKIT-application-32MX320F128.ld
# end of new items
mc_pic32_starterkit.upload.protocol=stk500v2
@@ -458,7 +458,7 @@ mc_pic32_ethernet_starterkit.platform=pic32
mc_pic32_ethernet_starterkit.board=_BOARD_PIC32_ETHERNET_STARTER_KIT_
mc_pic32_ethernet_starterkit.board.define=-D_USE_USB_FOR_SERIAL_
mc_pic32_ethernet_starterkit.ccflags=ffff
-mc_pic32_ethernet_starterkit.ldscript=chipKIT-application-32MX795F512L.ld
+mc_pic32_ethernet_starterkit.ldscript=chipKIT-application-32MX795F512.ld
# end of new items
mc_pic32_ethernet_starterkit.upload.protocol=stk500v2
@@ -487,7 +487,7 @@ mc_pic32_usb_starterkit.platform=pic32
mc_pic32_usb_starterkit.board=_BOARD_PIC32_USB_STARTER_KIT_
mc_pic32_usb_starterkit.board.define=-D_USE_USB_FOR_SERIAL_
mc_pic32_usb_starterkit.ccflags=ffff
-mc_pic32_usb_starterkit.ldscript=chipKIT-application-32MX795F512L.ld
+mc_pic32_usb_starterkit.ldscript=chipKIT-application-32MX795F512.ld
# end of new items
mc_pic32_usb_starterkit.upload.protocol=stk500v2
@@ -516,7 +516,7 @@ mc_pic32_explorer16.platform=pic32
mc_pic32_explorer16.board=_BOARD_PIC32_EXPLORER16_
mc_pic32_explorer16.board.define=
mc_pic32_explorer16.ccflags=ffff
-mc_pic32_explorer16.ldscript=chipKIT-application-32MX320F128L.ld
+mc_pic32_explorer16.ldscript=chipKIT-application-32MX320F128.ld
# end of new items
mc_pic32_explorer16.upload.protocol=stk500v2
@@ -545,7 +545,7 @@ mikroe_multimedia.platform=pic32
mikroe_multimedia.board=_BOARD_MIKROE_MULTIMEDIA_
mikroe_multimedia.board.define=-D_USE_USB_FOR_SERIAL_
mikroe_multimedia.ccflags=ffff
-mikroe_multimedia.ldscript=chipKIT-application-32MX460F512L.ld
+mikroe_multimedia.ldscript=chipKIT-application-32MX460F512.ld
# end of new items
mikroe_multimedia.upload.protocol=stk500v2
@@ -574,7 +574,7 @@ mikroe_mikromedia.platform=pic32
mikroe_mikromedia.board=_BOARD_MIKROE_MIKROMEDIA_
mikroe_mikromedia.board.define=-D_USE_USB_FOR_SERIAL_
mikroe_mikromedia.ccflags=ffff
-mikroe_mikromedia.ldscript=chipKIT-application-32MX460F512L.ld
+mikroe_mikromedia.ldscript=chipKIT-application-32MX460F512.ld
# end of new items
mikroe_mikromedia.upload.protocol=stk500v2
@@ -603,7 +603,7 @@ ubw32_mx460.platform=pic32
ubw32_mx460.board=_BOARD_UBW32_MX460_
ubw32_mx460.board.define=-D_USE_USB_FOR_SERIAL_
ubw32_mx460.ccflags=ffff
-ubw32_mx460.ldscript=chipKIT-application-32MX460F512L.ld
+ubw32_mx460.ldscript=chipKIT-application-32MX460F512.ld
# end of new items
ubw32_mx460.upload.protocol=stk500v2
@@ -632,7 +632,7 @@ ubw32_mx795.platform=pic32
ubw32_mx795.board=_BOARD_UBW32_MX795_
ubw32_mx795.board.define=-D_USE_USB_FOR_SERIAL_
ubw32_mx795.ccflags=ffff
-ubw32_mx795.ldscript=chipKIT-application-32MX795F512L.ld
+ubw32_mx795.ldscript=chipKIT-application-32MX795F512.ld
# end of new items
ubw32_mx795.upload.protocol=stk500v2
@@ -661,7 +661,7 @@ cui32.platform=pic32
cui32.board=_BOARD_CUI32_
cui32.board.define=-D_USE_USB_FOR_SERIAL_
cui32.ccflags=ffff
-cui32.ldscript=chipKIT-application-32MX440F512H.ld
+cui32.ldscript=chipKIT-application-32MX440F512.ld
# end of new items
cui32.upload.protocol=stk500v2
@@ -690,7 +690,7 @@ CUI32stem.platform=pic32
CUI32stem.board=_BOARD_CUI32_
CUI32stem.board.define=-D_USE_USB_FOR_SERIAL_
CUI32stem.ccflags=ffff
-CUI32stem.ldscript=chipKIT-application-32MX795F512L.ld
+CUI32stem.ldscript=chipKIT-application-32MX795F512.ld
# end of new items
CUI32stem.upload.protocol=stk500v2
@@ -720,7 +720,7 @@ fubarino_sd.platform=pic32
fubarino_sd.board=_BOARD_FUBARINO_SD_
fubarino_sd.board.define=-D_USE_USB_FOR_SERIAL_
fubarino_sd.ccflags=ffff
-fubarino_sd.ldscript=chipKIT-application-32MX440F256H.ld
+fubarino_sd.ldscript=chipKIT-application-32MX440F256.ld
# end of new items
fubarino_sd.upload.protocol=stk500v2
@@ -748,7 +748,7 @@ fubarino_mini.platform=pic32
fubarino_mini.board=_BOARD_FUBARINO_MINI_
fubarino_mini.board.define=-D_USE_USB_FOR_SERIAL_
fubarino_mini.ccflags=-Map="map.map"
-fubarino_mini.ldscript=chipKIT-application-32MX250F128D.ld
+fubarino_mini.ldscript=chipKIT-application-32MX250F128.ld
# end of new items
# Use a high -Gnum for devices that have less than 64K of data memory
View
134 hardware/pic32/cores/pic32/chipKIT-application-32MX120F032.ld
@@ -0,0 +1,134 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x6000
+ kseg0_eeprom_mem : ORIGIN = 0x9D006000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC00490, LENGTH = 0
+ config3 : ORIGIN = 0xBFC00BF0, LENGTH = 0x4
+ config2 : ORIGIN = 0xBFC00BF4, LENGTH = 0x4
+ config1 : ORIGIN = 0xBFC00BF8, LENGTH = 0x4
+ config0 : ORIGIN = 0xBFC00BFC, LENGTH = 0x4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x2000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC00BF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+_JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+/*INCLUDE "chipKIT-application-COMMON.ld"*/
View
135 hardware/pic32/cores/pic32/chipKIT-application-32MX250F128.ld
@@ -0,0 +1,135 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x1D000
+ kseg0_eeprom_mem : ORIGIN = 0x9D01E000, LENGTH = 0x1000
+ kseg0_splitflash_mem : ORIGIN = 0x9D01F000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00200, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC00490, LENGTH = 0
+ config3 : ORIGIN = 0xBFC00BF0, LENGTH = 0x4
+ config2 : ORIGIN = 0xBFC00BF4, LENGTH = 0x4
+ config1 : ORIGIN = 0xBFC00BF8, LENGTH = 0x4
+ config0 : ORIGIN = 0xBFC00BFC, LENGTH = 0x4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x8000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC00BF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+_JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+/*INCLUDE "chipKIT-application-COMMON.ld"*/
View
134 hardware/pic32/cores/pic32/chipKIT-application-32MX320F128.ld
@@ -0,0 +1,134 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x1E000
+ kseg0_eeprom_mem : ORIGIN = 0x9D01F000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC02000, LENGTH = 0
+ config3 : ORIGIN = 0xBFC02FF0, LENGTH = 4
+ config2 : ORIGIN = 0xBFC02FF4, LENGTH = 4
+ config1 : ORIGIN = 0xBFC02FF8, LENGTH = 4
+ config0 : ORIGIN = 0xBFC02FFC, LENGTH = 4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x4000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC02FF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+_JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+/*INCLUDE "chipKIT-application-COMMON.ld"*/
View
134 hardware/pic32/cores/pic32/chipKIT-application-32MX340F512.ld
@@ -0,0 +1,134 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x7E000
+ kseg0_eeprom_mem : ORIGIN = 0x9D07F000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC02000, LENGTH = 0
+ config3 : ORIGIN = 0xBFC02FF0, LENGTH = 4
+ config2 : ORIGIN = 0xBFC02FF4, LENGTH = 4
+ config1 : ORIGIN = 0xBFC02FF8, LENGTH = 4
+ config0 : ORIGIN = 0xBFC02FFC, LENGTH = 4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x8000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC02FF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+_JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+/*INCLUDE "chipKIT-application-COMMON.ld"*/
View
134 hardware/pic32/cores/pic32/chipKIT-application-32MX360F512.ld
@@ -0,0 +1,134 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x7E000
+ kseg0_eeprom_mem : ORIGIN = 0x9D07F000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC02000, LENGTH = 0
+ config3 : ORIGIN = 0xBFC02FF0, LENGTH = 4
+ config2 : ORIGIN = 0xBFC02FF4, LENGTH = 4
+ config1 : ORIGIN = 0xBFC02FF8, LENGTH = 4
+ config0 : ORIGIN = 0xBFC02FFC, LENGTH = 4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x8000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC02FF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+_JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+/*INCLUDE "chipKIT-application-COMMON.ld"*/
View
134 hardware/pic32/cores/pic32/chipKIT-application-32MX440F128.ld
@@ -0,0 +1,134 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x1E000
+ kseg0_eeprom_mem : ORIGIN = 0x9D01F000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC02000, LENGTH = 0
+ config3 : ORIGIN = 0xBFC02FF0, LENGTH = 4
+ config2 : ORIGIN = 0xBFC02FF4, LENGTH = 4
+ config1 : ORIGIN = 0xBFC02FF8, LENGTH = 4
+ config0 : ORIGIN = 0xBFC02FFC, LENGTH = 4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x8000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC02FF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+_JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+/*INCLUDE "chipKIT-application-COMMON.ld"*/
View
134 hardware/pic32/cores/pic32/chipKIT-application-32MX440F256.ld
@@ -0,0 +1,134 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x3E000
+ kseg0_eeprom_mem : ORIGIN = 0x9D03F000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC02000, LENGTH = 0
+ config3 : ORIGIN = 0xBFC02FF0, LENGTH = 4
+ config2 : ORIGIN = 0xBFC02FF4, LENGTH = 4
+ config1 : ORIGIN = 0xBFC02FF8, LENGTH = 4
+ config0 : ORIGIN = 0xBFC02FFC, LENGTH = 4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x8000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC02FF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+_JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+/*INCLUDE "chipKIT-application-COMMON.ld"*/
View
134 hardware/pic32/cores/pic32/chipKIT-application-32MX440F512.ld
@@ -0,0 +1,134 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x7E000
+ kseg0_eeprom_mem : ORIGIN = 0x9D07F000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC02000, LENGTH = 0
+ config3 : ORIGIN = 0xBFC02FF0, LENGTH = 4
+ config2 : ORIGIN = 0xBFC02FF4, LENGTH = 4
+ config1 : ORIGIN = 0xBFC02FF8, LENGTH = 4
+ config0 : ORIGIN = 0xBFC02FFC, LENGTH = 4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x8000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC02FF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+_JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+/*INCLUDE "chipKIT-application-COMMON.ld"*/
View
134 hardware/pic32/cores/pic32/chipKIT-application-32MX460F512.ld
@@ -0,0 +1,134 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x7E000
+ kseg0_eeprom_mem : ORIGIN = 0x9D07F000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC02000, LENGTH = 0
+ config3 : ORIGIN = 0xBFC02FF0, LENGTH = 4
+ config2 : ORIGIN = 0xBFC02FF4, LENGTH = 4
+ config1 : ORIGIN = 0xBFC02FF8, LENGTH = 4
+ config0 : ORIGIN = 0xBFC02FFC, LENGTH = 4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x8000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC02FF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+_JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+/*INCLUDE "chipKIT-application-COMMON.ld"*/
View
135 hardware/pic32/cores/pic32/chipKIT-application-32MX795F512.ld
@@ -0,0 +1,135 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(pic32mx)
+ENTRY(_reset)
+/*
+ * Provide for a minimum stack and heap size
+ * - _min_stack_size - represents the minimum space that must be made
+ * available for the stack. Can be overridden from
+ * the command line using the linker's --defsym option.
+ * - _min_heap_size - represents the minimum space that must be made
+ * available for the heap. Can be overridden from
+ * the command line using the linker's --defsym option.
+ */
+EXTERN (_min_stack_size _min_heap_size)
+PROVIDE(_min_stack_size = 0x800) ;
+PROVIDE(_min_heap_size = 0x800) ;
+
+/*************************************************************************
+ * Processor-specific object file. Contains SFR definitions.
+ *************************************************************************/
+INPUT("processor.o")
+
+/*************************************************************************
+ * Memory Regions
+ *
+ * Memory regions without attributes cannot be used for orphaned sections.
+ * Only sections specifically assigned to these regions can be allocated
+ * into these regions.
+ *************************************************************************/
+MEMORY
+{
+ exception_mem : ORIGIN = 0x9D000000, LENGTH = 0x1000
+ kseg0_program_mem (rx) : ORIGIN = 0x9D001000, LENGTH = 0x7E000
+ kseg0_eeprom_mem : ORIGIN = 0x9D07F000, LENGTH = 0x1000
+ kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0
+ kseg1_boot_mem : ORIGIN = 0xBFC00000, LENGTH = 0
+ debug_exec_mem : ORIGIN = 0xBFC02000, LENGTH = 0
+ config3 : ORIGIN = 0xBFC02FF0, LENGTH = 4
+ config2 : ORIGIN = 0xBFC02FF4, LENGTH = 4
+ config1 : ORIGIN = 0xBFC02FF8, LENGTH = 4
+ config0 : ORIGIN = 0xBFC02FFC, LENGTH = 4
+ kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x20000
+ sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
+ configsfrs : ORIGIN = 0xBFC02FF0, LENGTH = 0x10
+}
+
+/*************************************************************************
+ * Memory Address Equates
+ *************************************************************************/
+_ebase_address = ORIGIN(exception_mem);
+_IMAGE_PTR_TABLE = _ebase_address + 0x0F8;
+_IMAGE_HEADER_ADDR = _ebase_address + 0x0FC;
+_GEN_EXCPT_ADDR = _ebase_address + 0x180;
+_RESET_ADDR = ORIGIN(kseg0_program_mem);
+_EEPROM_ADDR = ORIGIN(kseg0_eeprom_mem);
+_BEV_EXCPT_ADDR = 0xBFC00380;
+_DBG_EXCPT_ADDR = 0xBFC00480;
+_DBG_CODE_ADDR = ORIGIN(debug_exec_mem);
+
+/*************************************************************************
+ * Bootloader program directives.
+ *
+ * _IMAGE_TYPE
+ *
+ * image type:
+ */
+
+_imageReserved = 0x00000000 ;
+_imageMPIDE = 0x00000001 ; /* This is a normal MPIDE sketch */
+_imageBootFlashBootloader = 0x00000002 ; /* This is a boot flash bootloader */
+_imageProgramFlashBootloader = 0x00000004 ; /* This is a program flash bootloader */
+_imageSplitFlashBootloader = 0x00000008 ; /* This has bootloader code in both boot and program flash */
+
+ /*
+ * Instructions for the bootloader
+ */
+
+_imageFullFlashEraseLess4KEEProm = 0x00010000 ; /* The original bootloader method of erasing all of program flash except the last 4K reserved for eeprom */
+_imageJustInTimeFlashErase = 0x00020000 ; /* Only flash pages written too needed by the sketch is erased */
+_imageLinkerSpecifiedFlashErase = 0x00040000 ; /* The linker defines the flash range to erase */
+_imageFullFlashErase = 0x00080000 ; /* All of flash is erased */
+_imageExecutionJumpAddress = 0x01000000 ; /* the bootloader will jump to the execution jump address immediately after programming */
+_imageExecutionJumpToFirstInFlash = 0x02000000 ; /* the bootloader will jump to the first sketch loaded in flash ignoring the execution jump address immediately after programming */
+
+/*
+ * _IMAGE_FLASH_SIZE
+ *
+ * Typically _imageJustInTimeFlashErase is selected to just erase the pages
+ * of flash that code is written too; thus leaving all other flash pages untouched.
+ *
+ * If _imageLinkerSpecifiedFlashErase set, then the range
+ * starting from _ebase_address for _IMAGE_FLASH_SIZE bytes are erased.
+ *
+ * If _imageFullFlashErase is specified, than the whole flash
+ * as known by the bootloader will be erased. This will erase eeprom as well
+ *
+ * if _imageFullFlashEraseLess4KEEProm is set, all of flash less the last 4K is
+ * erased, this is the old default. This bit could be set to make a program flash bootloader
+ * erasing everything but the old flash. If NOTHING is set, this will be the default as this is the old behavior.
+ *
+ * _JUMP_ADDR
+ *
+ * This is the address that the bootloader will jump to start execution
+ * of the sketch. This is almost always _RESET_ADDR.
+ *
+ * However, you can specify an alternate entry execution point for example
+ * if you have alternate starup code that, say, shared
+ * the runtime with other sketches or needed some kind of specific handling
+ *
+ * Immediately after programming (avrdude upload) the bootloader will typically
+ * jump to the just loaded sketch, no matter where it was loaded in flash.
+ * _imageExecutionJumpToFirstInFlash will tell the bootloader to jump to the first
+ * sketch in flash even if the just loaded one is not at the beginning of flash.
+ * This is useful when programming sketches in slots of flash and then always
+ * jumping to the program-flash loader (vector sketch) as if the board was just reset.
+ * This bit does not effect jumping to a sketch already in flash after reset.
+ * As of today, after reset, the first program in flash will always be jumped to.
+ *
+ *************************************************************************/
+ _IMAGE_TYPE = _imageMPIDE | _imageJustInTimeFlashErase | _imageExecutionJumpAddress;
+ _IMAGE_FLASH_SIZE = LENGTH(exception_mem) + LENGTH(kseg0_program_mem);
+ _JUMP_ADDR = _RESET_ADDR;
+
+SECTIONS
+{
+ /* Boot Sections */
+ .reset _RESET_ADDR :
+ {
+ KEEP(*(.reset))
+ } > kseg0_program_mem
+}
+
+/* From here out every linker script is the same, so just include it */
+/*INCLUDE "chipKIT-application-COMMON.ld"*/
+
View
8 hardware/pic32/cores/pic32/chipKIT-application-COMMON.ld
@@ -552,9 +552,13 @@ SECTIONS
. = ALIGN(4) ;
_persist_end = .;
} >kseg1_data_mem
- ASSERT( SIZEOF(.dbg_data) + SIZEOF(.persist) + SIZEOF(.ram_exchange_data) <= 0x600, "Bootloader does not preserve debug, RAM Header, or persistent data beyond the first 1.5K")
- .data :
+ ASSERT( _persist_end <= ORIGIN(kseg1_data_mem) + 0x600, "Bootloader does not preserve debug, RAM Header, or persistent data beyond the first 1.5K")
+
+ /* If this is a bootloader, than skip around the protected memory and don't place anything there */
+ _protected_end = ((_IMAGE_TYPE & (_imageSplitFlashBootloader | _imageProgramFlashBootloader | _imageBootFlashBootloader)) != 0) ? (ORIGIN(kseg1_data_mem) + 0x600) : . ;
+
+ .data _protected_end :
{
_data_begin = . ;
*(.data .data.* .gnu.linkonce.d.*)
View
2  hardware/pic32/variants/fubarino_sd_v11/Board_Data.c
@@ -392,8 +392,6 @@ const uint8_t analog_pin_to_channel_PGM[] = {
void _board_init(void) {
//* Turn Secondary oscillator off
- //* this is only needed on the mega board because the mega uses secondary
- // ocsilator pins as general I/O
unsigned int dma_status;
unsigned int int_status;
View
50 hardware/pic32/variants/fubarino_sd_v11/Board_Defs.h
@@ -117,17 +117,17 @@
/* Timer Pin Declarations */
/* ------------------------------------------------------------ */
-#define PIN_OC1 5
-#define PIN_OC2 8
-#define PIN_OC3 9
-#define PIN_OC4 10
-#define PIN_OC5 11
-
-#define PIN_IC1 1
-#define PIN_IC2 2
-#define PIN_IC3 3
-#define PIN_IC4 4
-#define PIN_IC5 11
+#define PIN_OC1 4
+#define PIN_OC2 7
+#define PIN_OC3 8
+#define PIN_OC4 9
+#define PIN_OC5 10
+
+#define PIN_IC1 0
+#define PIN_IC2 1
+#define PIN_IC3 2
+#define PIN_IC4 3
+#define PIN_IC5 10
//#define PIN_TCK1 46 (TCK would be what?)
//#define PIN_TCK2 not available on the chip
@@ -153,16 +153,14 @@
** the default SPI port as it's pin numbers stay constant on all
** devices.
*/
-/// TODO: For Fubarino, do we need these?
-const static uint8_t SS = 105; // PIC32 SS2
-const static uint8_t MOSI = 104; // PIC32 SDO2
-const static uint8_t MISO = 103; // PIC32 SDI2
-const static uint8_t SCK = 102; // PIC32 SCK2
+const static uint8_t SS = 27; // PIC32 SS2
+const static uint8_t MOSI = 26; // PIC32 SDO2
+const static uint8_t MISO = 25; // PIC32 SDI2
+const static uint8_t SCK = 24; // PIC32 SCK2
/* The Digilent DSPI library uses these ports.
*/
-/// TODO: For Fubarino, do we need these?
-#define PIN_DSPI0_SS 105
+#define PIN_DSPI0_SS 27
/* ------------------------------------------------------------ */
/* Analog Pins */
@@ -194,14 +192,14 @@ const static uint8_t SCK = 102; // PIC32 SCK2
/* These define the pin numbers for the various change notice
** pins.
*/
-#define PIN_CN0 7
-#define PIN_CN1 6
-#define PIN_CN2 33
-#define PIN_CN3 32
-#define PIN_CN4 31
-#define PIN_CN5 30
-#define PIN_CN6 29
-#define PIN_CN7 28
+#define PIN_CN0 6
+#define PIN_CN1 5
+#define PIN_CN2 34
+#define PIN_CN3 33
+#define PIN_CN4 32
+#define PIN_CN5 31
+#define PIN_CN6 30
+#define PIN_CN7 29
#define PIN_CN8 24
#define PIN_CN9 25
#define PIN_CN10 26
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