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IR: Optimize runtime of optimization passes #670

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merged 24 commits into from Jan 22, 2021
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@skmp skmp commented Jan 19, 2021

Overview

This does some easy optimizations to the runtime of our optimization passes. In general, there are no big algorithmic changes, this focuses on improving the data structures. RA is substantially changed.

Details

  • Reworked RA::CalculateNodeInterference to almost O(N) from O(N!)
  • Simplified and optimized data structures & initialization in RA
  • Reworked RCLSE::FindMemberInfo to be O(1) from O(N)
  • Merged DSE passes. Makes them ~ 2.8x as fast.
  • Replaced some std::maps with std::unordred_maps. This was benchmarked, as it's not always a net-win.
  • DSE directly looks for OP_JUMP/OP_CONDJUMP instead of looping
  • Removed the concept of Virtual Registers from RA
  • Optimized RA allocation from O(Regs * Interferences * Nodes) to O(Interferences * Nodes)
  • Optimized RA to stop allocating after first spill
  • Optimized RA to do compaction after spilling, as the input comes pre-compacted
  • Optimized IR Compaction to do fewer lookups, and to only memset for debug builds
  • Validated that IR output is exactly the same as before in all of Bytemark

Data

clang prompt takes 2.3s before this, and 0.90s after (with -n 4000 -m)

@skmp skmp changed the title RA: rework ConstrainedRAPass::CalculateNodeInterference IR: Optimize runtime of optimization passes Jan 19, 2021
@skmp skmp marked this pull request as ready for review January 19, 2021 17:50
@skmp skmp marked this pull request as draft January 19, 2021 20:52
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skmp commented Jan 19, 2021

Found a major bug in the RA changes, converting to draft

@skmp skmp marked this pull request as ready for review January 21, 2021 11:23
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skmp commented Jan 21, 2021

Added some more optimizations, removed a few bugs that crept in, and validated IR output is the same as before. This is ready for review now @Sonicadvance1

bool OptimizeSRA;
uint32_t SpillPointId;

#define INFO_MAKE(id, Class) ((id) | (Class << 24))
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A bitfield struct might make more sense than these macros?

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I initially had a bitfield struct, but for some reason I don't recall I switched over to the macros. I'll investigate the struct again tomorrow, and switch over if there's no blocker


constexpr uint64_t INVALID_REGCLASS = (((uint64_t)INVALID_CLASS) << 32) | (INVALID_REG);

template<unsigned _Size = 6, typename T = uint32_t>
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Could do with a comment explaining why we have a bucketlist and how the constants have been chosen.

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Good point. Will get to it tomorrow

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Added the comment and removed default size of 6 (it's explicitly set in all instances anyway)

auto& BlockInfo = InfoMap[BlockNode];

//// GPR ////
// We can't track through these
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We probably could if we added a restriction that OP_STORECONTEXTINDEXED was only valid for x87, which is the only place we use it.

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It's also used for the segment registers afaik. @Sonicadvance1 thoughts?

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Hmm, we might.

Either way, as long as we can prove it's only used for for a limited set of registers we can avoid this optimisation killer.

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It's only used for 32bit and LDT/GDT loading of segment register data. Very minor.

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Created follow up #677

@Sonicadvance1 Sonicadvance1 merged commit d4ffea5 into main Jan 22, 2021
@Sonicadvance1 Sonicadvance1 deleted the skmp/faster-ra branch January 22, 2021 12:54
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3 participants