Skip to content
master
Switch branches/tags
Code

Latest commit

 

Git stats

Files

Permalink
Failed to load latest commit information.
Type
Name
Latest commit message
Commit time
 
 
 
 
 
 
 
 
sdk
 
 
src
 
 
 
 

ADPLL-Design-for-Transciever-System

In this github project page, image files are our results that we achieved so far. In Matlab Codes Only SRRC and Transmitter files are include that .m files. In VHDL Codes the rest of the branches are available. We have difficult time to use the system but we will understand the way of project management works in github. We hope these instructions are clear for reader.In any problem contact us with the mail that shared in Wiki part.

References Links: http://pallen.ece.gatech.edu/Academic/ECE_6440/Summer_2003/L070-DPLL(2UP).pdf http://pallen.ece.gatech.edu/Academic/ECE_6440/Summer_2003/L080-ADPLL(2UP).pdf http://www.ti.com/lit/an/swra029/swra029.pdf http://www.cppsim.com/PLL_Lectures/digital_pll_cicc_tutorial_perrott.pdf https://www.gaussianwaves.com/2019/02/implementing-a-matched-filter-system-with-srrc-filtering/ http://read.pudn.com/downloads103/ebook/421711/pll_5ed.pdf

Our youtube link : https://www.youtube.com/channel/UC6kQXaJL9kH9UVBqINl_JVQ Our youtube video link : https://www.youtube.com/watch?v=5deC7e1d99U Our project link : https://projects.digilentinc.com/13aktk/adpll-design-for-transceiver-2158d6

This project created by Seda Esen & Berkay Ergün & Hasan Toskar If you have a question please connect with us on vhdlcankaya@gmail.com