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Finish Kicad Schematics #11

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@ImanthonyYe ImanthonyYe commented Oct 1, 2025 •
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To Finish Schematics based on POC results.

@ImanthonyYe ImanthonyYe requested a review from amstan October 1, 2025 03:48
@ImanthonyYe
kicad: added clocks, vregs, and other power routings
93a304b 
2025/09/01

1. Follow Demo board design and datasheet
        - Change L1, L2 to 600R/0.5A
2. 5V -> 3.3V LDO
	- Add U7, C23, C24
3. Getting power from host by 5.1k RD on CC.
	- Add R30 5.1k on CC1 of USB-C Receptacle
4. A method for being provider or receiver of 5V of Target device Provider path: 12k Rp for 5V@1.5A
	- Add SW1
	- Remove R5 on VCONN
	- Add R5 12k on SW
	- Change R4 to 5.1K."
5. Prioritizing Host 5V as default
	- Add D1, Q1, R31
6. Add power switch for 5V path output
	- Add U9, C31, C32
7. External Clock for FT4232
	- Add C27, C28, Y1
8. EC_VREF (3.3v) LDO
	- Add U8, C25, C26
9. Channel C and D don't have GPIO function.
	- "Move AP_UART_VREF_FORCE_3.3 to GPIO_L2 (but maybe we don't need it)"
10. LDO for SPI 3.3V and 1.8V
	- Add U11, C29, C30
11. Prevent activating SPI 3.3V and 1.8V at the same time.
	- Add U10(XOR), U12(AND), U13(AND)
@ImanthonyYe ImanthonyYe force-pushed the pr-schematics_first_draft branch from d3dcb77 to 93a304b Compare October 1, 2025 03:52
@ImanthonyYe ImanthonyYe changed the title Uploading the first draft of schematics Finish Kicad Schematics Oct 1, 2025
@ImanthonyYe ImanthonyYe force-pushed the pr-schematics_first_draft branch from 23414a6 to 3721319 Compare October 7, 2025 09:08
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amstan commented Oct 8, 2025 •
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Simplify Design and Correct Errors

  • You should change this first line of the commit message, there should be a "kicad:" prefix at least to not confuse it with the rest of the debugger files (like programming scripts and documentation, such)
  1. Add U11, C29, C30 for SPI power.
  2. Add U8, C25, C26 for EC_VREF
  3. Add EEPROM U9, R5, R31

  • You added this to the second commit message, but you already made these changes in the first commit (as the first commit message already describes), it's incorrect to say this was done in the second commit.

  • I would remove the voltage list comment near FTDI_RX_AP_TX_UNSHIFTED, that kind of information should go in the README.md PR instead.

  • Same for SPI voltage references near U2

  • Resistors for the LEDs need updating, they're all 330 ohms right now, that will lead us having different brightness for every led color.

    • we decided to leave this for later because it doesn't matter when building the first board, we can keep playing with values.
  1. Add R33, R34, R35, R36 on USB+/- for banshee

  • R25 and R26 as stuffing options are cool, but remember that U4 is still connected to the SBU pins of the DUT connector. We need another couple of resistors to disconnect U4.

  • Todo about checking SPI MISO/MOSI swizzling/orientation needs resolving

  • Todo about JTAG pin connections needs resolving. Both for JECDB and JPD connectors are probably not connected correctly for JTAG.

@ImanthonyYe
kicad: Simplify Design and Correct Errors
23f454e 
2025/10/07

1. Add R33, R34, R35, R36 on USB+/- for banshee
2. Remove Q1, R31, D1
3. Add R29, Change U5 from 4 bit level shifter to OD buffer.
4. Remove netname AP_UART_VREF_FORCE_3.3 due to no need anymore.
5. Remove SW1, change R4 to 5.1K on CC and tie to GND, R32 to VCONN and tie to GND.
6. Change R27 to 1k from 100ohm
7. Remove U10(XOR), U12(AND), U13(AND)
@ImanthonyYe ImanthonyYe force-pushed the pr-schematics_first_draft branch from 3721319 to 23f454e Compare October 8, 2025 01:52
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amstan commented Oct 8, 2025

  1. Change R27 to 1k from 100ohm

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amstan commented Oct 8, 2025 •
edited by ImanthonyYe
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Sorry for adding more, i forgot about this one.

Related to:

Add R33, R34, R35, R36 on USB+/- for banshee

  • we should be clear what's NC and what's populated by default. Right now I see they're both populated and that will lead to sadness and things not working.
    • Bonus points if we add a section to the light/Readme.md explaining how to use these stuffing options.

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ImanthonyYe commented Oct 8, 2025

Sorry for adding more, i forgot about this one.

Related to:

Add R33, R34, R35, R36 on USB+/- for banshee

  • we should be clear what's NC and what's populated by default. Right now I see they're both populated and that will lead to sadness and things not working.

    • Bonus points if we add a section to the light/Readme.md explaining how to use these stuffing options.

Yes, I will update a version with BOM option indicators

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ImanthonyYe commented Oct 13, 2025

Todo about JTAG pin connections needs resolving. Both for JECDB and JPD connectors are probably not connected correctly for JTAG.

I feel if we don't use MUX, it's hard to control the isolation between PD and ECDB.
But as we discussed previously, it will be a little risk that if VDD of MUX is not powered, it might be something unknow status if JECDB/JPD is already connected.

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ImanthonyYe commented Oct 15, 2025

Todo about JTAG pin connections needs resolving. Both for JECDB and JPD connectors are probably not connected correctly for JTAG.

Checked system side, connection should be correct.
TCK -> SWCLK
TDITDO -> SWDIO
nRESET -> XRES

@ImanthonyYe ImanthonyYe force-pushed the pr-schematics_first_draft branch from 04f7c08 to e5d87c5 Compare October 16, 2025 02:16
@ImanthonyYe
kicad: Add MUX for JTAG/SWD, Fix SPI netname error
85b46e8 
2025/10/13

1. Remove R15, LED_AP_VREF and "AP_UART_VREF" net name
2. Adding Test points(TP2~TP18) to replace NC pins of U1 and U6
3. Adding footprint of parts
4. Correct Netname errors.
	SPI_VREF_FORCE_3.3_OUT -> SPI_VREF_FORCE_3.3
	SPI_VREF_FORCE_1.8_OUT -> SPI_VREF_FORCE_1.8
	SPI_OE_N -> FTDI_SPI_OE_N
5. DNC R35, R36
6. Add R15, R37, for isolating Banshee path and normal path
7. Add U10, C20, Netname "JTAG_SWD_SEL", Remove R22, R23, R24.
8. Change netname AP_UART_VREF to JTAG_SWD_SEL for LED indicator
9. Chnage JPD, JSPI PN to MOLEX_5051100692, JECDB to MOLEX_5051101097, which are similar to what Compal used.
@ImanthonyYe
kicad: Remove JTAG MUX and add Cortex20-10 adaptor
5eda1a8 
2025/10/15

1. Remove U10, C20, Netname "JTAG_SWD_SEL"
2. Roll back design of SWDIO/JTAG(adding back R20, R21, TP1, R15, R22, R23)
3. Add JDB10 and JDB20
4.  Change JSPI and JPD to HRS_FH19C-6S-0.5SH
5. Change JECDB to Cvilux_CF35102D0RE-NH
6. Add TP19, TP20, TP21, TP22, TP23 on Unused pin of JTAG
7. Remove JTAG_SWD LED
@ImanthonyYe
kicad: Adding JTAG Connections
cdf0ea5 
10/16

1. Add JTAG Connection between JDB10 and JDB20
@ImanthonyYe ImanthonyYe force-pushed the pr-schematics_first_draft branch from 7db6bee to cdf0ea5 Compare October 16, 2025 07:16
@ImanthonyYe
kicad: Fix JCL footprint issues and remove 20pin JTAG
d8f77e3 
10/23

1. Remove JDB20, TP20~TP23
2. Change LED location reference to LED1~LED7, and Change LED2 to RGB because AP_SPI_VREF will have either 1.8v or 3.3v. Add R38, R39 for current limit.
3. Add footprint for X'tal 7M-12.000MAAJ and change C27, C28 to 18pF.
4. Change JECDB to HRS_FH19C-10S-0.5SH
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amstan commented Oct 31, 2025

I would approve this, but you still have 2 unfinished todos in the schematic.

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ImanthonyYe commented Oct 31, 2025

I would approve this, but you still have 2 unfinished TODOs in the schematic.

ah, yes. but I have an updated version of schematics to upload by this week or early next week, there are few items back and forth modified with 3rd party now.

@ImanthonyYe
kicad: modifying netnames and LEDs
adb7b98 
10/31

1. Change LED2, LED7 to EAST1616RGBA1 because it's common cathode
2. Edit LED2, LED7 symbol to follow spec.
3. Change TP19 to EC_VREF net
4. Change SPI NET NAME
5. Change DUT_CCD SBU pins net name
6. Remove Test points for saving space
7. Renaming TP to align pin name
@ImanthonyYe
Delete light/kicad/#auto_saved_files#
7cae6f3
@ImanthonyYe
Delete light/kicad/~light.kicad_sch.lck
eba0a13
@ImanthonyYe
kicad: renaming netname and fixing pin order of the connectors
27d6392 
11/05

1. Rename JTAG netname
2. Change pin order of JPD1, JSPI1, JECDB1
3. Remove TPs
@ImanthonyYe
Merge branch 'pr-schematics_first_draft' of https://github.com/Framew…
f5e422a 
…orkComputer/FrameworkDebugger into pr-schematics_first_draft
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@ImanthonyYe @amstan