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gateware: imports cleanup. NFC.
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whitequark committed Dec 12, 2018
1 parent bbf2464 commit 775fdc0388aa360a7ed9915ed8dc9fcd0eaa3202
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Showing 17 changed files with 0 additions and 20 deletions.
@@ -3,7 +3,6 @@
import struct
import time
from migen import *
from migen.genlib.fsm import *

from .. import *
from ...gateware.lfsr import *
@@ -10,7 +10,6 @@
import argparse
import logging
from migen import *
from migen.genlib.fsm import *
from migen.genlib.cdc import MultiReg

from .. import *
@@ -2,7 +2,6 @@
import logging
import math
from migen import *
from migen.genlib.fsm import *

from .. import *
from ...support.pyrepl import *
@@ -2,7 +2,6 @@
import argparse
import logging
from migen import *
from migen.genlib.fsm import *

from .. import *

@@ -1,7 +1,6 @@
import logging
import math
from migen import *
from migen.genlib.fsm import *
from migen.genlib.cdc import *

from .. import *
@@ -3,7 +3,6 @@
import asyncio
import math
from migen import *
from migen.genlib.fsm import *
from migen.genlib.cdc import *

from .. import *
@@ -5,8 +5,6 @@
import struct
import math
from migen import *
from migen.fhdl.bitcontainer import value_bits_sign
from migen.genlib.fsm import *

from .. import *
from ...gateware.pads import *
@@ -3,7 +3,6 @@
import logging
import asyncio
from migen import *
from migen.genlib.fsm import *

from .. import *
from ...gateware.pads import *
@@ -34,7 +34,6 @@
# * HLT ≡ halt

from migen import *
from migen.genlib.fsm import *


__all__ = [
@@ -1,7 +1,6 @@
from functools import reduce
from collections import OrderedDict
from migen import *
from migen.fhdl.bitcontainer import log2_int
from migen.genlib.fifo import _FIFOInterface, SyncFIFOBuffered
from migen.genlib.coding import PriorityEncoder, PriorityDecoder
from migen.genlib.fsm import FSM
@@ -1,7 +1,4 @@
from migen import *
from migen.fhdl.bitcontainer import value_bits_sign
from migen.fhdl.specials import _MemoryPort
from migen.genlib.fsm import *

from ..arch.boneless.opcode import *

@@ -24,7 +24,6 @@
# FIFOADR->FIFODATA 14.3

from migen import *
from migen.genlib.fsm import *
from migen.genlib.cdc import MultiReg
from migen.genlib.fifo import _FIFOInterface, AsyncFIFO, SyncFIFO, SyncFIFOBuffered
from migen.genlib.resetsync import AsyncResetSynchronizer
@@ -1,7 +1,6 @@
# I2C reference: https://www.nxp.com/docs/en/user-guide/UM10204.pdf

from migen import *
from migen.genlib.fsm import *
from migen.genlib.cdc import MultiReg


@@ -3,7 +3,6 @@
# http://www.ftdichip.com/Support/Documents/AppNotes/ AN_108_Command_Processor_for_MPSSE_and_MCU_Host_Bus_Emulation_Modes.pdf

from migen import *
from migen.genlib.fsm import *
from migen.genlib.cdc import MultiReg


@@ -1,5 +1,4 @@
from migen import *
from migen.genlib.fsm import *


__all__ = ["Registers", "I2CRegisters"]
@@ -1,5 +1,4 @@
from migen import *
from migen.genlib.fsm import *
from migen.genlib.cdc import MultiReg


@@ -1,6 +1,5 @@
import logging
from migen import *
from migen.fhdl.bitcontainer import value_bits_sign
from migen.genlib.cdc import MultiReg
from migen.genlib.fifo import _FIFOInterface

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