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C 50500 53800 1 0 1 led-2.sym
{
T 49800 53700 5 10 1 1 0 6 1
refdes=D1
T 50400 54400 5 10 0 0 0 6 1
device=LED
}
C 50500 53400 1 0 1 led-2.sym
{
T 50400 54000 5 10 0 0 0 6 1
device=LED
}
C 50500 53000 1 0 1 led-2.sym
{
T 49800 53200 5 10 1 1 0 6 1
refdes=D2
T 50400 53600 5 10 0 0 0 6 1
device=LED
}
C 50500 52600 1 0 1 led-2.sym
{
T 49800 52800 5 10 1 1 0 6 1
refdes=D3
T 50400 53200 5 10 0 0 0 6 1
device=LED
}
C 50500 52200 1 0 1 led-2.sym
{
T 49800 52400 5 10 1 1 0 6 1
refdes=D4
T 50400 52800 5 10 0 0 0 6 1
device=LED
}
C 50500 51800 1 0 1 led-2.sym
{
T 49800 52000 5 10 1 1 0 6 1
refdes=D5
T 50400 52400 5 10 0 0 0 6 1
device=LED
}
C 50500 51400 1 0 1 led-2.sym
{
T 49800 51600 5 10 1 1 0 6 1
refdes=D6
T 50400 52000 5 10 0 0 0 6 1
device=LED
}
C 50500 51000 1 0 1 led-2.sym
{
T 49800 51200 5 10 1 1 0 6 1
refdes=D7
T 50400 51600 5 10 0 0 0 6 1
device=LED
}
C 50500 50600 1 0 1 led-2.sym
{
T 49800 50800 5 10 1 1 0 6 1
refdes=D8
T 50400 51200 5 10 0 0 0 6 1
device=LED
}
C 50500 50200 1 0 1 led-2.sym
{
T 49800 50400 5 10 1 1 0 6 1
refdes=D9
T 50400 50800 5 10 0 0 0 6 1
device=LED
}
C 50500 49800 1 0 1 led-2.sym
{
T 49800 50000 5 10 1 1 0 6 1
refdes=D10
T 50400 50400 5 10 0 0 0 6 1
device=LED
}
C 50500 49400 1 0 1 led-2.sym
{
T 49800 49600 5 10 1 1 0 6 1
refdes=D11
T 50400 50000 5 10 0 0 0 6 1
device=LED
}
C 50500 49000 1 0 1 led-2.sym
{
T 49800 49200 5 10 1 1 0 6 1
refdes=D12
T 50400 49600 5 10 0 0 0 6 1
device=LED
}
C 50500 48600 1 0 1 led-2.sym
{
T 49800 48800 5 10 1 1 0 6 1
refdes=D13
T 50400 49200 5 10 0 0 0 6 1
device=LED
}
C 50500 48200 1 0 1 led-2.sym
{
T 49800 48400 5 10 1 1 0 6 1
refdes=D14
T 50400 48800 5 10 0 0 0 6 1
device=LED
}
C 50500 47800 1 0 1 led-2.sym
{
T 49800 48000 5 10 1 1 0 6 1
refdes=D15
T 50400 48400 5 10 0 0 0 6 1
device=LED
}
C 49600 54200 1 0 0 resistor-1.sym
{
T 49900 54600 5 10 0 0 0 0 1
device=RESISTOR
T 49800 54400 5 10 1 1 0 0 1
refdes=R3
T 50100 54400 5 10 1 1 0 0 1
value=33
}
C 49400 54300 1 0 0 vcc-1.sym
C 46200 53100 1 0 0 input-1.sym
{
T 46200 53400 5 10 0 0 0 0 1
device=INPUT
T 46100 53200 5 10 1 1 0 7 1
value=L0
T 46900 52500 5 10 0 1 0 0 1
net=L0:1
}
C 46200 52800 1 0 0 input-1.sym
{
T 46200 53100 5 10 0 0 0 0 1
device=INPUT
T 46100 52900 5 10 1 1 0 7 1
value=L1
T 46900 52200 5 10 0 1 0 0 1
net=L1:1
}
C 46200 52500 1 0 0 input-1.sym
{
T 46200 52800 5 10 0 0 0 0 1
device=INPUT
T 46100 52600 5 10 1 1 0 7 1
value=L2
T 46900 51900 5 10 0 1 0 0 1
net=L2:1
}
C 46200 52200 1 0 0 input-1.sym
{
T 46200 52500 5 10 0 0 0 0 1
device=INPUT
T 46100 52300 5 10 1 1 0 7 1
value=L3
T 46900 51600 5 10 0 1 0 0 1
net=L3:1
}
C 43200 48600 1 0 0 7485-1.sym
{
T 43500 53940 5 10 0 0 0 0 1
device=7485
T 43500 53740 5 10 0 0 0 0 1
footprint=DIP16
T 44900 53600 5 10 1 1 0 6 1
refdes=U1
}
C 42400 53100 1 0 0 input-1.sym
{
T 42400 53400 5 10 0 0 0 0 1
device=INPUT
T 42300 53200 5 10 1 1 0 7 1
value=S0
T 43100 52500 5 10 0 1 0 0 1
net=S0:1
}
C 42400 52700 1 0 0 input-1.sym
{
T 42400 53000 5 10 0 0 0 0 1
device=INPUT
T 42300 52800 5 10 1 1 0 7 1
value=S1
T 43100 52100 5 10 0 1 0 0 1
net=S1:1
}
C 42400 52300 1 0 0 input-1.sym
{
T 42400 52600 5 10 0 0 0 0 1
device=INPUT
T 42300 52400 5 10 1 1 0 7 1
value=S2
T 43100 51700 5 10 0 1 0 0 1
net=S2:1
}
C 42400 51900 1 0 0 input-1.sym
{
T 42400 52200 5 10 0 0 0 0 1
device=INPUT
T 42300 52000 5 10 1 1 0 7 1
value=S3
T 43100 51300 5 10 0 1 0 0 1
net=S3:1
}
C 42400 51100 1 0 0 input-1.sym
{
T 42400 51400 5 10 0 0 0 0 1
device=INPUT
T 42300 51200 5 10 1 1 0 7 1
value=L1
T 43100 50500 5 10 0 1 0 0 1
net=L1:1
}
C 42400 50700 1 0 0 input-1.sym
{
T 42400 51000 5 10 0 0 0 0 1
device=INPUT
T 42300 50800 5 10 1 1 0 7 1
value=L2
T 43100 50100 5 10 0 1 0 0 1
net=L2:1
}
C 42400 51500 1 0 0 input-1.sym
{
T 42400 51800 5 10 0 0 0 0 1
device=INPUT
T 42300 51600 5 10 1 1 0 7 1
value=L0
T 43100 50900 5 10 0 1 0 0 1
net=L0:1
}
C 42400 50300 1 0 0 input-1.sym
{
T 42400 50600 5 10 0 0 0 0 1
device=INPUT
T 42300 50400 5 10 1 1 0 7 1
value=L3
T 43100 49700 5 10 0 1 0 0 1
net=L3:1
}
N 43200 49600 43100 49600 4
C 45200 53100 1 0 0 nc-right-1.sym
{
T 45300 53600 5 10 0 0 0 0 1
value=NoConnection
T 45300 53800 5 10 0 0 0 0 1
device=DRC_Directive
}
C 45200 52300 1 0 0 nc-right-1.sym
{
T 45300 52800 5 10 0 0 0 0 1
value=NoConnection
T 45300 53000 5 10 0 0 0 0 1
device=DRC_Directive
}
C 44600 48100 1 0 0 input-1.sym
{
T 44600 48400 5 10 0 0 0 0 1
device=INPUT
T 44500 48200 5 10 1 1 0 7 1
value=LEDBIT
T 45300 47500 5 10 0 1 0 0 1
net=LEDBIT:1
}
C 47000 48500 1 0 0 74154-1.sym
{
T 47300 53750 5 10 0 0 0 0 1
device=74154
T 48700 53600 5 10 1 1 0 6 1
refdes=U2
T 47300 53950 5 10 0 0 0 0 1
footprint=DIP24
}
N 49000 53200 49100 53200 4
N 49100 53200 49100 53900 4
N 49100 53900 49600 53900 4
N 49000 52900 49200 52900 4
N 49200 52900 49200 53500 4
N 49200 53500 49600 53500 4
N 49000 52600 49300 52600 4
N 49300 52600 49300 53100 4
N 49300 53100 49600 53100 4
N 49000 52300 49400 52300 4
N 49400 52300 49400 52700 4
N 49400 52700 49600 52700 4
N 49000 52000 49500 52000 4
N 49500 52000 49500 52300 4
N 49000 51700 49500 51700 4
N 49500 51700 49500 51900 4
N 49000 51400 49500 51400 4
N 49500 51400 49500 51500 4
N 49000 51100 49600 51100 4
N 49000 50800 49500 50800 4
N 49500 50800 49500 50700 4
N 49000 50500 49500 50500 4
N 49500 50500 49500 50300 4
N 49000 50200 49500 50200 4
N 49500 50200 49500 49900 4
N 49000 49900 49400 49900 4
N 49400 49900 49400 49500 4
N 49400 49500 49600 49500 4
N 49000 49600 49300 49600 4
N 49300 49600 49300 49100 4
N 49300 49100 49600 49100 4
N 49000 49300 49200 49300 4
N 49200 49300 49200 48700 4
N 49200 48700 49600 48700 4
N 49000 49000 49100 49000 4
N 49100 49000 49100 48300 4
N 49100 48300 49600 48300 4
N 49000 48700 49000 47900 4
N 45200 52800 45800 52800 4
N 45800 49400 45800 52800 4
C 46900 48400 1 0 0 gnd-1.sym
N 46700 48400 46700 49000 4
N 46700 49000 47000 49000 4
C 52500 45100 1 0 0 lm555-1.sym
{
T 54800 47500 5 10 0 0 0 0 1
device=LM555
T 54300 45100 5 10 1 1 0 0 1
refdes=U5
}
C 52400 45200 1 0 0 gnd-1.sym
C 53900 47900 1 0 0 vcc-1.sym
T 43400 47400 9 10 1 0 0 0 2
If the LED mux count is equal to the current step number,
flicker the LED. (An XOR gate is used as a conditional inverter.)
T 53800 48500 9 10 1 0 0 0 1
START/STOP TOGGLE CIRCUIT
C 54400 42300 1 0 1 rot3P4P-1.sym
{
T 53990 45500 5 10 0 0 0 6 1
device=Electroswitch_3P4T_Rotary_Switch
T 53990 45300 5 10 0 0 0 6 1
footprint=ROT_3P4T
T 54000 45100 5 10 0 0 0 6 1
symversion=1.0
T 53290 43700 5 10 1 1 0 6 1
refdes=S?
}
C 54400 40600 1 0 1 rot3P4P-1.sym
{
T 53990 43800 5 10 0 0 0 6 1
device=Electroswitch_3P4T_Rotary_Switch
T 53990 43600 5 10 0 0 0 6 1
footprint=ROT_3P4T
T 54000 43400 5 10 0 0 0 6 1
symversion=1.0
T 53290 42000 5 10 1 1 0 6 1
refdes=S?
T 53000 40800 5 10 0 1 0 6 1
slot=2
}
C 54000 42800 1 0 0 output-1.sym
{
T 54100 43100 5 10 0 0 0 0 1
device=OUTPUT
T 54900 42900 5 10 1 1 0 1 1
value=CH0
T 54700 42900 5 10 0 1 0 0 1
net=CH0:1
}
C 54000 41100 1 0 0 output-1.sym
{
T 54100 41400 5 10 0 0 0 0 1
device=OUTPUT
T 54900 41200 5 10 1 1 0 1 1
value=CH1
T 54700 41200 5 10 0 1 0 0 1
net=CH1:1
}
T 51800 44300 9 10 1 0 0 0 1
CHANNEL SELECT ROTARY SWITCH
C 51700 40300 1 0 0 gnd-1.sym
N 52700 43500 51800 43500 4
N 51800 43500 51800 40600 4
N 52500 42700 51800 42700 4
N 52700 41800 51800 41800 4
N 52500 41400 51800 41400 4
C 52000 43000 1 0 0 nc-left-1.sym
{
T 52000 43400 5 10 0 0 0 0 1
value=NoConnection
T 52000 43800 5 10 0 0 0 0 1
device=DRC_Directive
}
C 52200 42200 1 0 0 nc-left-1.sym
{
T 52200 42600 5 10 0 0 0 0 1
value=NoConnection
T 52200 43000 5 10 0 0 0 0 1
device=DRC_Directive
}
C 52000 40900 1 0 0 nc-left-1.sym
{
T 52000 41300 5 10 0 0 0 0 1
value=NoConnection
T 52000 41700 5 10 0 0 0 0 1
device=DRC_Directive
}
C 52200 40500 1 0 0 nc-left-1.sym
{
T 52200 40900 5 10 0 0 0 0 1
value=NoConnection
T 52200 41300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 53900 42100 1 270 0 resistor-1.sym
{
T 54300 41800 5 10 0 0 270 0 1
device=RESISTOR
T 54100 41800 5 10 1 1 0 0 1
refdes=R5
T 54100 41600 5 10 1 1 0 0 1
value=10k
}
C 53900 43800 1 270 0 resistor-1.sym
{
T 54300 43500 5 10 0 0 270 0 1
device=RESISTOR
T 54100 43500 5 10 1 1 0 0 1
refdes=R4
T 54100 43300 5 10 1 1 0 0 1
value=10k
}
C 53800 43800 1 0 0 vcc-1.sym
C 53800 42100 1 0 0 vcc-1.sym
N 55400 46600 55400 48000 4
N 55400 48000 52300 48000 4
N 52300 48000 52300 46600 4
N 54800 46600 56000 46600 4
N 52300 46600 52500 46600 4
C 54800 46900 1 0 0 nc-right-1.sym
{
T 54900 47400 5 10 0 0 0 0 1
value=NoConnection
T 54900 47600 5 10 0 0 0 0 1
device=DRC_Directive
}
C 54800 46100 1 0 0 nc-right-1.sym
{
T 54900 46600 5 10 0 0 0 0 1
value=NoConnection
T 54900 46800 5 10 0 0 0 0 1
device=DRC_Directive
}
C 55900 47500 1 270 0 resistor-1.sym
{
T 56300 47200 5 10 0 0 270 0 1
device=RESISTOR
T 56100 47100 5 10 1 1 0 0 1
refdes=R6
T 56100 46900 5 10 1 1 0 0 1
value=10k
}
C 55800 47500 1 0 0 vcc-1.sym
C 55900 46600 1 270 0 resistor-1.sym
{
T 56300 46300 5 10 0 0 270 0 1
device=RESISTOR
T 56100 46200 5 10 1 1 0 0 1
refdes=R7
T 56100 46000 5 10 1 1 0 0 1
value=10k
}
C 55900 45400 1 0 0 gnd-1.sym
C 56000 46600 1 0 0 switch-pushbutton-no-1.sym
{
T 56500 46900 5 10 1 1 0 0 1
refdes=S17
T 56400 47200 5 10 0 0 0 0 1
device=SWITCH_PUSHBUTTON_NO
}
N 54800 45500 55700 45500 4
N 55700 43400 55700 48000 4
N 55700 48000 57000 48000 4
C 56900 47500 1 270 0 resistor-1.sym
{
T 57300 47200 5 10 0 0 270 0 1
device=RESISTOR
T 57100 47100 5 10 1 1 0 0 1
refdes=R8
T 57100 46900 5 10 1 1 0 0 1
value=100k
}
N 57000 47500 57000 48000 4
C 56800 46600 1 270 0 capacitor-2.sym
{
T 57500 46400 5 10 0 0 270 0 1
device=POLARIZED_CAPACITOR
T 57200 46200 5 10 1 1 0 0 1
refdes=C2
T 57700 46400 5 10 0 0 270 0 1
symversion=0.1
T 57200 46000 5 10 1 1 0 0 1
value=1uF
}
C 56900 45400 1 0 0 gnd-1.sym
C 57500 44300 1 0 0 output-1.sym
{
T 57600 44600 5 10 0 0 0 0 1
device=OUTPUT
T 58400 44400 5 10 1 1 0 1 1
value=\_RUN\_
T 58200 44400 5 10 0 1 0 0 1
net=RUN:1
}
C 52500 48200 1 0 0 input-1.sym
{
T 52500 48500 5 10 0 0 0 0 1
device=INPUT
T 52400 48300 5 10 1 1 0 7 1
value=\_RESET\_
T 53200 47600 5 10 0 1 0 0 1
net=RESET:1
}
N 53300 48300 53300 47900 4
C 56100 41300 1 0 0 switch-pushbutton-no-1.sym
{
T 56500 41600 5 10 1 1 0 0 1
refdes=S18
T 56500 41900 5 10 0 0 0 0 1
device=SWITCH_PUSHBUTTON_NO
}
C 56000 41000 1 0 0 gnd-1.sym
C 57000 42200 1 270 0 resistor-1.sym
{
T 57400 41900 5 10 0 0 270 0 1
device=RESISTOR
T 57200 41800 5 10 1 1 0 0 1
refdes=R9
T 57200 41600 5 10 1 1 0 0 1
value=10k
}
C 56900 42200 1 0 0 vcc-1.sym
C 57100 41200 1 0 0 output-1.sym
{
T 57200 41500 5 10 0 0 0 0 1
device=OUTPUT
T 58000 41300 5 10 1 1 0 1 1
value=\_CLEAR\_
T 57800 41300 5 10 0 1 0 0 1
net=CLEAR:1
}
T 56100 42600 9 10 1 0 0 0 1
PATTERN CLEAR BUTTON
C 49000 42500 1 270 0 capacitor-1.sym
{
T 49700 42300 5 10 0 0 270 0 1
device=CAPACITOR
T 49500 42100 5 10 1 1 0 0 1
refdes=C1
T 49900 42300 5 10 0 0 270 0 1
symversion=0.1
T 49500 41900 5 10 1 1 0 0 1
value=10uF
}
C 49100 41300 1 0 0 gnd-1.sym
C 48300 42400 1 0 0 resistor-1.sym
{
T 48600 42800 5 10 0 0 0 0 1
device=RESISTOR
T 48500 42700 5 10 1 1 0 0 1
refdes=R2
T 48800 42700 5 10 1 1 0 0 1
value=10k
}
C 48100 42500 1 0 0 vcc-1.sym
C 49200 42400 1 0 0 output-1.sym
{
T 49300 42700 5 10 0 0 0 0 1
device=OUTPUT
T 50100 42500 5 10 1 1 0 1 1
value=\_RESET\_
T 49700 42500 5 10 0 1 0 0 1
net=RESET:1
}
T 48700 43000 9 10 1 0 0 0 1
POWER-ON RESET
C 58700 49800 1 270 0 capacitor-2.sym
{
T 59400 49600 5 10 0 0 270 0 1
device=POLARIZED_CAPACITOR
T 59100 49400 5 10 1 1 0 0 1
refdes=C4
T 59600 49600 5 10 0 0 270 0 1
symversion=0.1
T 59100 49200 5 10 1 1 0 0 1
value=1uF
}
C 58500 49800 1 90 1 capacitor-1.sym
{
T 57800 49600 5 10 0 0 270 2 1
device=CAPACITOR
T 58100 49400 5 10 1 1 0 6 1
refdes=C3
T 57600 49600 5 10 0 0 270 2 1
symversion=0.1
T 58100 49200 5 10 1 1 0 6 1
value=0.1uF
}
C 58200 48600 1 0 0 gnd-1.sym
C 58800 48600 1 0 0 gnd-1.sym
C 57500 50100 1 0 0 gnd-1.sym
C 51800 51900 1 0 0 switch-pushbutton-no-1.sym
{
T 52200 52200 5 10 1 1 0 0 1
refdes=S1
T 52200 52500 5 10 0 0 0 0 1
device=SWITCH_PUSHBUTTON_NO
}
C 53000 51900 1 0 0 switch-pushbutton-no-1.sym
{
T 53400 52200 5 10 1 1 0 0 1
refdes=S2
T 53400 52500 5 10 0 0 0 0 1
device=SWITCH_PUSHBUTTON_NO
}
C 54200 51900 1 0 0 switch-pushbutton-no-1.sym
{
T 54600 52200 5 10 1 1 0 0 1
refdes=S3
T 54600 52500 5 10 0 0 0 0 1
device=SWITCH_PUSHBUTTON_NO
}
C 55400 51900 1 0 0 switch-pushbutton-no-1.sym
{
T 55800 52200 5 10 1 1 0 0 1
refdes=S4
T 55800 52500 5 10 0 0 0 0 1
device=SWITCH_PUSHBUTTON_NO
}
C 51800 51100 1 0 0 switch-pushbutton-no-1.sym
{
T 52200 51400 5 10 1 1 0 0 1
refdes=S5
T 52200 51700 5 10 0 0 0 0 1
device=SWITCH_PUSHBUTTON_NO
}
C 53000 51100 1 0 0 switch-pushbutton-no-1.sym
{
T 53400 51400 5 10 1 1 0 0 1
refdes=S6
T 53400 51700 5 10 0 0 0 0 1
device=SWITCH_PUSHBUTTON_NO
}
C 54200 51100 1 0 0 switch-pushbutton-no-1.sym
{
T 54600 51400 5 10 1 1 0 0 1
refdes=S7
T 54600 51700 5 10 0 0 0 0 1
device=SWITCH_PUSHBUTTON_NO
}
C 55400 51100 1 0 0 switch-pushbutton-no-1.sym
{
T 55800 51400 5 10 1 1 0 0 1
refdes=S8
T 55800 51700 5 10 0 0 0 0 1
device=SWITCH_PUSHBUTTON_NO
}
C 51800 50300 1 0 0 switch-pushbutton-no-1.sym
{
T 52200 50600 5 10 1 1 0 0 1
refdes=S9
T 52200 50900 5 10 0 0 0 0 1
device=SWITCH_PUSHBUTTON_NO
}
C 53000 50300 1 0 0 switch-pushbutton-no-1.sym
{
T 53400 50600 5 10 1 1 0 0 1
refdes=S10
T 53400 50900 5 10 0 0 0 0 1
device=SWITCH_PUSHBUTTON_NO
}
C 54200 50300 1 0 0 switch-pushbutton-no-1.sym
{
T 54600 50600 5 10 1 1 0 0 1
refdes=S11
T 54600 50900 5 10 0 0 0 0 1
device=SWITCH_PUSHBUTTON_NO
}
C 55400 50300 1 0 0 switch-pushbutton-no-1.sym
{
T 55800 50600 5 10 1 1 0 0 1
refdes=S12
T 55800 50900 5 10 0 0 0 0 1
device=SWITCH_PUSHBUTTON_NO
}
C 51800 49500 1 0 0 switch-pushbutton-no-1.sym
{
T 52200 49800 5 10 1 1 0 0 1
refdes=S13
T 52200 50100 5 10 0 0 0 0 1
device=SWITCH_PUSHBUTTON_NO
}
C 53000 49500 1 0 0 switch-pushbutton-no-1.sym
{
T 53400 49800 5 10 1 1 0 0 1
refdes=S14
T 53400 50100 5 10 0 0 0 0 1
device=SWITCH_PUSHBUTTON_NO
}
C 54200 49500 1 0 0 switch-pushbutton-no-1.sym
{
T 54600 49800 5 10 1 1 0 0 1
refdes=S15
T 54600 50100 5 10 0 0 0 0 1
device=SWITCH_PUSHBUTTON_NO
}
C 55400 49500 1 0 0 switch-pushbutton-no-1.sym
{
T 55800 49800 5 10 1 1 0 0 1
refdes=S16
T 55800 50100 5 10 0 0 0 0 1
device=SWITCH_PUSHBUTTON_NO
}
N 51800 49500 51800 53400 4
N 53000 49500 53000 53100 4
N 54200 49500 54200 52800 4
N 55400 49500 55400 52500 4
N 52800 51900 52800 51700 4
N 52800 51700 56400 51700 4
N 54000 51900 54000 51700 4
N 55200 51900 55200 51700 4
N 56400 51900 56400 51700 4
N 52800 51100 52800 50900 4
N 52800 50900 56600 50900 4
N 54000 51100 54000 50900 4
N 55200 51100 55200 50900 4
N 56600 50900 56600 51600 4
N 52800 50300 52800 50100 4
N 52800 50100 56800 50100 4
N 54000 50300 54000 50100 4
N 55200 50300 55200 50100 4
N 56800 50100 56800 51300 4
N 52800 49500 52800 49300 4
N 52800 49300 57000 49300 4
N 54000 49500 54000 49300 4
N 55200 49500 55200 49300 4
N 56400 51900 57600 51900 4
N 57600 51600 56600 51600 4
N 57600 51300 56800 51300 4
N 56600 51100 56400 51100 4
N 56400 50300 56800 50300 4
N 57600 51000 57000 51000 4
N 57000 51000 57000 49300 4
N 56400 49500 57000 49500 4
N 57600 52500 55400 52500 4
N 57600 52800 54200 52800 4
N 57600 53100 53000 53100 4
N 51800 53400 57600 53400 4
C 59600 53300 1 0 0 output-1.sym
{
T 59700 53600 5 10 0 0 0 0 1
device=OUTPUT
T 60500 53400 5 10 1 1 0 1 1
value=K0
T 60300 53400 5 10 0 1 0 0 1
net=K0:1
}
C 59600 53000 1 0 0 output-1.sym
{
T 59700 53300 5 10 0 0 0 0 1
device=OUTPUT
T 60500 53100 5 10 1 1 0 1 1
value=K1
T 60300 53100 5 10 0 1 0 0 1
net=K1:1
}
C 59600 52700 1 0 0 output-1.sym
{
T 59700 53000 5 10 0 0 0 0 1
device=OUTPUT
T 60500 52800 5 10 1 1 0 1 1
value=K2
T 60300 52800 5 10 0 1 0 0 1
net=K2:1
}
C 59600 52400 1 0 0 output-1.sym
{
T 59700 52700 5 10 0 0 0 0 1
device=OUTPUT
T 60500 52500 5 10 1 1 0 1 1
value=K3
T 60300 52500 5 10 0 1 0 0 1
net=K3:1
}
C 62100 42200 1 0 0 output-1.sym
{
T 62200 42500 5 10 0 0 0 0 1
device=OUTPUT
T 63000 42300 5 10 1 1 0 1 1
value=\_PRESS\_
T 62800 42300 5 10 0 1 0 0 1
net=PRESS:1
}
T 45100 53900 9 10 1 0 0 0 1
STEP LED DECODER
T 57600 54200 9 10 1 0 0 0 1
STEP KEY ENCODER
C 64700 48100 1 0 0 output-1.sym
{
T 64800 48400 5 10 0 0 0 0 1
device=OUTPUT
T 65600 48200 5 10 1 1 0 1 1
value=L0
T 65400 48200 5 10 0 1 0 0 1
net=L0:1
}
C 64700 47700 1 0 0 output-1.sym
{
T 64800 48000 5 10 0 0 0 0 1
device=OUTPUT
T 65600 47800 5 10 1 1 0 1 1
value=L1
T 65400 47800 5 10 0 1 0 0 1
net=L1:1
}
C 64700 47300 1 0 0 output-1.sym
{
T 64800 47600 5 10 0 0 0 0 1
device=OUTPUT
T 65600 47400 5 10 1 1 0 1 1
value=L2
T 65400 47400 5 10 0 1 0 0 1
net=L2:1
}
C 64700 46900 1 0 0 output-1.sym
{
T 64800 47200 5 10 0 0 0 0 1
device=OUTPUT
T 65600 47000 5 10 1 1 0 1 1
value=L3
T 65400 47000 5 10 0 1 0 0 1
net=L3:1
}
L 65700 48400 65900 48400 3 0 0 0 -1 -1
L 65900 48400 65900 46800 3 0 0 0 -1 -1
L 65900 46800 65700 46800 3 0 0 0 -1 -1
T 66000 47400 9 10 1 0 0 0 3
LED DISPLAY
MULTIPLEX
COUNTER
C 64700 45900 1 0 0 output-1.sym
{
T 64800 46200 5 10 0 0 0 0 1
device=OUTPUT
T 65600 46000 5 10 1 1 0 1 1
value=S0
T 65400 46000 5 10 0 1 0 0 1
net=S0:1
}
C 64700 45500 1 0 0 output-1.sym
{
T 64800 45800 5 10 0 0 0 0 1
device=OUTPUT
T 65600 45600 5 10 1 1 0 1 1
value=S1
T 65400 45600 5 10 0 1 0 0 1
net=S1:1
}
C 64700 45100 1 0 0 output-1.sym
{
T 64800 45400 5 10 0 0 0 0 1
device=OUTPUT
T 65600 45200 5 10 1 1 0 1 1
value=S2
T 65400 45200 5 10 0 1 0 0 1
net=S2:1
}
C 64700 44700 1 0 0 output-1.sym
{
T 64800 45000 5 10 0 0 0 0 1
device=OUTPUT
T 65600 44800 5 10 1 1 0 1 1
value=S3
T 65400 44800 5 10 0 1 0 0 1
net=S3:1
}
L 65700 46200 65900 46200 3 0 0 0 -1 -1
L 65900 46200 65900 44600 3 0 0 0 -1 -1
L 65900 44600 65700 44600 3 0 0 0 -1 -1
T 66000 45200 9 10 1 0 0 0 2
STEP
COUNTER
C 60800 45500 1 0 0 input-1.sym
{
T 60800 45800 5 10 0 0 0 0 1
device=INPUT
T 60700 45600 5 10 1 1 0 7 1
value=STEPCLK
T 61500 44900 5 10 0 1 0 0 1
net=STEPCLK:1
}
C 62300 47700 1 0 0 input-1.sym
{
T 62300 48000 5 10 0 0 0 0 1
device=INPUT
T 62200 47800 5 10 1 1 0 7 1
value=LEDCLK
T 63000 47100 5 10 0 1 0 0 1
net=LEDCLK:1
}
C 63000 47900 1 0 0 gnd-1.sym
C 63000 46700 1 0 0 gnd-1.sym
T 63400 48800 9 10 1 0 0 0 1
COUNTERS
C 69900 49700 1 0 0 74153-1.sym
{
T 70200 53950 5 10 0 0 0 0 1
device=74153
T 71600 53800 5 10 1 1 0 6 1
refdes=U9
T 70200 54150 5 10 0 0 0 0 1
footprint=DIP16
}
C 69900 45300 1 0 0 74153-1.sym
{
T 70200 49550 5 10 0 0 0 0 1
device=74153
T 71600 49400 5 10 1 1 0 6 1
refdes=U10
T 70200 49750 5 10 0 0 0 0 1
footprint=DIP16
}
N 71900 48300 72100 48300 4
N 72300 46700 71900 46700 4
C 69100 53000 1 0 0 input-1.sym
{
T 69100 53300 5 10 0 0 0 0 1
device=INPUT
T 69000 53100 5 10 1 1 0 7 1
value=\_PRESS\_
T 69200 53100 5 10 0 1 0 0 1
net=PRESS:1
}
C 68500 49400 1 0 0 gnd-1.sym
N 69900 52700 68600 52700 4
N 68600 52700 68600 49700 4
N 69900 51100 68600 51100 4
C 69100 52300 1 0 0 input-1.sym
{
T 69100 52600 5 10 0 0 0 0 1
device=INPUT
T 69000 52400 5 10 1 1 0 7 1
value=K0
T 69200 52400 5 10 0 1 0 0 1
net=K0:1
}
N 69900 52400 69900 52100 4
C 69100 51700 1 0 0 input-1.sym
{
T 69100 52000 5 10 0 0 0 0 1
device=INPUT
T 69000 51800 5 10 1 1 0 7 1
value=S0
T 69200 51800 5 10 0 1 0 0 1
net=S0:1
}
C 69100 51400 1 0 0 input-1.sym
{
T 69100 51700 5 10 0 0 0 0 1
device=INPUT
T 69000 51500 5 10 1 1 0 7 1
value=L0
T 69200 51500 5 10 0 1 0 0 1
net=L0:1
}
C 69100 50700 1 0 0 input-1.sym
{
T 69100 51000 5 10 0 0 0 0 1
device=INPUT
T 69000 50800 5 10 1 1 0 7 1
value=K1
T 69200 50800 5 10 0 1 0 0 1
net=K1:1
}
N 69900 50800 69900 50500 4
C 69100 50100 1 0 0 input-1.sym
{
T 69100 50400 5 10 0 0 0 0 1
device=INPUT
T 69000 50200 5 10 1 1 0 7 1
value=S1
T 69200 50200 5 10 0 1 0 0 1
net=S1:1
}
C 69100 49800 1 0 0 input-1.sym
{
T 69100 50100 5 10 0 0 0 0 1
device=INPUT
T 69000 49900 5 10 1 1 0 7 1
value=L1
T 69200 49900 5 10 0 1 0 0 1
net=L1:1
}
C 69100 46300 1 0 0 input-1.sym
{
T 69100 46600 5 10 0 0 0 0 1
device=INPUT
T 69000 46400 5 10 1 1 0 7 1
value=K3
T 69200 46400 5 10 0 1 0 0 1
net=K3:1
}
N 69900 46400 69900 46100 4
C 69100 45700 1 0 0 input-1.sym
{
T 69100 46000 5 10 0 0 0 0 1
device=INPUT
T 69000 45800 5 10 1 1 0 7 1
value=S3
T 69200 45800 5 10 0 1 0 0 1
net=S3:1
}
C 69100 45400 1 0 0 input-1.sym
{
T 69100 45700 5 10 0 0 0 0 1
device=INPUT
T 69000 45500 5 10 1 1 0 7 1
value=L3
T 69200 45500 5 10 0 1 0 0 1
net=L3:1
}
C 69100 47900 1 0 0 input-1.sym
{
T 69100 48200 5 10 0 0 0 0 1
device=INPUT
T 69000 48000 5 10 1 1 0 7 1
value=K2
T 69200 48000 5 10 0 1 0 0 1
net=K2:1
}
N 69900 48000 69900 47700 4
C 69100 47300 1 0 0 input-1.sym
{
T 69100 47600 5 10 0 0 0 0 1
device=INPUT
T 69000 47400 5 10 1 1 0 7 1
value=S2
T 69200 47400 5 10 0 1 0 0 1
net=S2:1
}
C 69100 47000 1 0 0 input-1.sym
{
T 69100 47300 5 10 0 0 0 0 1
device=INPUT
T 69000 47100 5 10 1 1 0 7 1
value=L2
T 69200 47100 5 10 0 1 0 0 1
net=L2:1
}
C 68500 45000 1 0 0 gnd-1.sym
N 68600 48300 68600 45300 4
N 69900 46700 68600 46700 4
N 69900 48300 68600 48300 4
C 69100 53300 1 0 0 input-1.sym
{
T 69100 53600 5 10 0 0 0 0 1
device=INPUT
T 69000 53400 5 10 1 1 0 7 1
value=\_STEP1\_
T 69000 51400 5 10 0 1 0 0 1
net=STEP1:1
}
T 69300 54200 9 10 1 0 0 0 1
ADDRESS INPUT MULTIPLEXER
C 69100 48600 1 0 0 input-1.sym
{
T 69100 48900 5 10 0 0 0 0 1
device=INPUT
T 69000 48700 5 10 1 1 0 7 1
value=\_PRESS\_
T 69200 48700 5 10 0 1 0 0 1
net=PRESS:1
}
T 68900 44600 9 10 1 0 0 0 3
\_PRESS\_ low: output = Kn (key input)
\_STEP1\_ high: output = Ln (LED mux count)
\_STEP1\_ low: output = Sn (step number)
C 74100 49500 1 0 0 74189-2.sym
{
T 74400 53950 5 10 0 0 0 0 1
device=74189
T 75800 53800 5 10 1 1 0 6 1
refdes=U11
T 74400 54150 5 10 0 0 0 0 1
footprint=DIP16
}
T 74300 54200 9 10 1 0 0 0 1
PATTERN MEMORY
T 74600 54000 9 10 1 0 0 0 1
16 x 4 BITS
N 74100 51800 71900 51800 4
N 71900 51800 71900 52700 4
N 74100 51400 71900 51400 4
N 71900 51400 71900 51100 4
N 74100 51000 72100 51000 4
N 72100 51000 72100 48300 4
N 74100 50600 72300 50600 4
N 72300 50600 72300 46700 4
C 74000 49500 1 0 0 gnd-1.sym
C 75700 46800 1 0 1 7408-1.sym
{
T 75000 47700 5 10 0 0 0 6 1
device=7408
T 75400 47700 5 10 1 1 0 6 1
refdes=U12
T 75000 49100 5 10 0 0 0 6 1
footprint=DIP14
}
C 75700 45700 1 0 1 7408-1.sym
{
T 75000 46600 5 10 0 0 0 6 1
device=7408
T 75400 46600 5 10 1 1 0 6 1
refdes=U12
T 75000 48000 5 10 0 0 0 6 1
footprint=DIP14
T 75100 46200 5 10 0 1 0 0 1
slot=2
}
C 75700 44600 1 0 1 7408-1.sym
{
T 75000 45500 5 10 0 0 0 6 1
device=7408
T 75400 45500 5 10 1 1 0 6 1
refdes=U12
T 75000 46900 5 10 0 0 0 6 1
footprint=DIP14
T 75100 45000 5 10 0 1 0 0 1
slot=3
}
C 75700 43500 1 0 1 7408-1.sym
{
T 75000 44400 5 10 0 0 0 6 1
device=7408
T 75400 44400 5 10 1 1 0 6 1
refdes=U12
T 75000 45800 5 10 0 0 0 6 1
footprint=DIP14
T 75100 43800 5 10 0 1 0 0 1
slot=4
}
N 74400 47300 73100 47300 4
N 73100 47300 73100 53400 4
N 73100 53400 74100 53400 4
N 74100 53000 73300 53000 4
N 73300 53000 73300 46200 4
N 73300 46200 74400 46200 4
N 74400 45100 73500 45100 4
N 73500 45100 73500 52600 4
N 73500 52600 74100 52600 4
N 74400 44000 73700 44000 4
N 73700 44000 73700 52200 4
N 73700 52200 74100 52200 4
N 75700 47100 75900 47100 4
N 75900 47100 75900 43800 4
N 75900 43800 75700 43800 4
N 75700 46000 75900 46000 4
N 75700 44900 75900 44900 4
C 76700 43700 1 0 1 input-1.sym
{
T 76700 44000 5 10 0 0 0 6 1
device=INPUT
T 76800 43800 5 10 1 1 0 1 1
value=\_CLEAR\_
T 76600 43800 5 10 0 0 0 6 1
net=CLEAR:1
}
C 78400 47000 1 0 1 7486-1.sym
{
T 77700 47900 5 10 0 0 0 6 1
device=7486
T 78100 47900 5 10 1 1 0 6 1
refdes=U14
T 77700 49300 5 10 0 0 0 6 1
footprint=DIP14
}
C 78400 45900 1 0 1 7486-1.sym
{
T 77700 46800 5 10 0 0 0 6 1
device=7486
T 78100 46800 5 10 1 1 0 6 1
refdes=U14
T 77700 48200 5 10 0 0 0 6 1
footprint=DIP14
T 78000 46600 5 10 0 1 0 0 1
slot=2
}
C 78400 44800 1 0 1 7486-1.sym
{
T 77700 45700 5 10 0 0 0 6 1
device=7486
T 78100 45700 5 10 1 1 0 6 1
refdes=U14
T 77700 47100 5 10 0 0 0 6 1
footprint=DIP14
T 77900 45600 5 10 0 1 0 0 1
slot=3
}
C 78400 43700 1 0 1 7486-1.sym
{
T 77700 44600 5 10 0 0 0 6 1
device=7486
T 78100 44600 5 10 1 1 0 6 1
refdes=U14
T 77700 46000 5 10 0 0 0 6 1
footprint=DIP14
T 78000 44100 5 10 0 1 0 0 1
slot=4
}
N 77100 44200 75700 44200 4
N 77100 45300 75700 45300 4
N 77100 46400 75700 46400 4
N 77100 47500 75700 47500 4
T 77400 43300 9 10 1 0 0 0 1
BIT INVERTER
T 74400 43300 9 10 1 0 0 0 1
MEMORY CLEAR
C 77600 48800 1 0 0 4052-1.sym
{
T 77900 51650 5 10 0 0 0 0 1
device=4052
T 77900 51850 5 10 0 0 0 0 1
footprint=DIP16
T 79300 51500 5 10 1 1 0 6 1
refdes=U13
}
C 76800 51000 1 0 0 input-1.sym
{
T 76800 51300 5 10 0 0 0 0 1
device=INPUT
T 76700 51100 5 10 1 1 0 7 1
value=CH0
T 76900 51100 5 10 0 1 0 0 1
net=CH0:1
}
C 76800 50700 1 0 0 input-1.sym
{
T 76800 51000 5 10 0 0 0 0 1
device=INPUT
T 76700 50800 5 10 1 1 0 7 1
value=CH1
T 76900 50800 5 10 0 1 0 0 1
net=CH1:1
}
T 77700 48400 9 10 1 0 0 0 1
CHANNEL DECODER
C 77500 49500 1 0 0 gnd-1.sym
C 77500 48700 1 0 0 gnd-1.sym
N 79800 51100 79800 53400 4
N 76100 53400 83000 53400 4
N 76100 53000 82100 53000 4
N 80000 53000 80000 50800 4
N 80000 50800 79600 50800 4
N 76100 52600 81900 52600 4
N 80200 52600 80200 50500 4
N 80200 50500 79600 50500 4
N 76100 52200 81700 52200 4
N 80400 52200 80400 50200 4
N 80400 50200 79600 50200 4
N 79600 51100 79800 51100 4
C 77600 50000 1 0 1 output-1.sym
{
T 77500 50300 5 10 0 0 0 6 1
device=OUTPUT
T 76700 50100 5 10 1 1 0 7 1
value=LEDBIT
T 76900 50100 5 10 0 1 0 6 1
net=LEDBIT:1
}
N 79600 49900 80400 49900 4
N 79800 49900 79800 47700 4
N 79800 47700 78400 47700 4
N 79600 49600 80400 49600 4
N 80000 49600 80000 46600 4
N 80000 46600 78400 46600 4
N 79600 49300 80400 49300 4
N 80200 49300 80200 45500 4
N 80200 45500 78400 45500 4
N 79600 49000 80400 49000 4
N 80400 49000 80400 44400 4
N 80400 44400 78400 44400 4
C 80400 48900 1 0 0 resistor-1.sym
{
T 80700 49300 5 10 0 0 0 0 1
device=RESISTOR
T 81400 49000 5 10 1 1 0 0 1
refdes=R26
}
C 80400 49200 1 0 0 resistor-1.sym
{
T 80700 49600 5 10 0 0 0 0 1
device=RESISTOR
T 81400 49300 5 10 1 1 0 0 1
refdes=R25
}
C 80400 49500 1 0 0 resistor-1.sym
{
T 80700 49900 5 10 0 0 0 0 1
device=RESISTOR
T 81400 49600 5 10 1 1 0 0 1
refdes=R24
}
C 80400 49800 1 0 0 resistor-1.sym
{
T 80700 50200 5 10 0 0 0 0 1
device=RESISTOR
T 81400 49900 5 10 1 1 0 0 1
refdes=R23
}
N 81300 49000 81300 49900 4
C 81100 49900 1 0 0 vcc-1.sym
C 83000 52700 1 0 0 7432-1.sym
{
T 83600 53600 5 10 0 0 0 0 1
device=7432
T 83300 53600 5 10 1 1 0 0 1
refdes=U15
T 83600 55000 5 10 0 0 0 0 1
footprint=DIP14
}
C 83000 51600 1 0 0 7432-1.sym
{
T 83600 52500 5 10 0 0 0 0 1
device=7432
T 83300 52500 5 10 1 1 0 0 1
refdes=U15
T 83600 53900 5 10 0 0 0 0 1
footprint=DIP14
T 83200 51900 5 10 0 1 0 0 1
slot=2
}
C 83000 50500 1 0 0 7432-1.sym
{
T 83600 51400 5 10 0 0 0 0 1
device=7432
T 83300 51400 5 10 1 1 0 0 1
refdes=U15
T 83600 52800 5 10 0 0 0 0 1
footprint=DIP14
T 83400 51200 5 10 0 1 0 0 1
slot=3
}
C 83000 49400 1 0 0 7432-1.sym
{
T 83600 50300 5 10 0 0 0 0 1
device=7432
T 83300 50300 5 10 1 1 0 0 1
refdes=U15
T 83600 51700 5 10 0 0 0 0 1
footprint=DIP14
T 83500 49700 5 10 0 1 0 0 1
slot=4
}
N 82100 46200 82100 53000 4
N 82100 52300 83000 52300 4
N 81900 45100 81900 52600 4
N 81900 51200 83000 51200 4
N 83000 50100 81700 50100 4
N 81700 44000 81700 52200 4
N 83000 53000 82800 53000 4
N 82800 49700 82800 53700 4
N 82800 49700 83000 49700 4
N 82800 51900 83000 51900 4
N 82800 50800 83000 50800 4
N 82600 53700 82800 53700 4
C 81800 53600 1 0 0 input-1.sym
{
T 81800 53900 5 10 0 0 0 0 1
device=INPUT
T 81700 53700 5 10 1 1 0 7 1
value=\_STEP2\_
T 81700 51700 5 10 0 1 0 0 1
net=STEP2:1
}
C 85200 53100 1 0 0 output-1.sym
{
T 85300 53400 5 10 0 0 0 0 1
device=OUTPUT
T 86100 53200 5 10 1 1 0 1 1
value=\_TRIG0\_
T 85900 53200 5 10 0 1 0 0 1
net=TRIG0:1
}
C 85200 52000 1 0 0 output-1.sym
{
T 85300 52300 5 10 0 0 0 0 1
device=OUTPUT
T 86100 52100 5 10 1 1 0 1 1
value=\_TRIG1\_
T 85900 52100 5 10 0 1 0 0 1
net=TRIG1:1
}
C 85200 50900 1 0 0 output-1.sym
{
T 85300 51200 5 10 0 0 0 0 1
device=OUTPUT
T 86100 51000 5 10 1 1 0 1 1
value=\_TRIG2\_
T 85900 51000 5 10 0 1 0 0 1
net=TRIG2:1
}
C 85200 49800 1 0 0 output-1.sym
{
T 85300 50100 5 10 0 0 0 0 1
device=OUTPUT
T 86100 49900 5 10 1 1 0 1 1
value=\_TRIG3\_
T 85900 49900 5 10 0 1 0 0 1
net=TRIG3:1
}
T 82800 54200 9 10 1 0 0 0 1
TRIGGER PULSES
C 42200 49100 1 0 0 input-1.sym
{
T 42200 49400 5 10 0 0 0 0 1
device=INPUT
T 42100 49200 5 10 1 1 0 7 1
value=STEPCLK
T 42900 48500 5 10 0 1 0 0 1
net=STEPCLK:1
}
N 74100 50200 72900 50200 4
N 72900 44000 72900 50200 4
C 69000 43500 1 0 0 input-1.sym
{
T 69000 43800 5 10 0 0 0 0 1
device=INPUT
T 68900 43600 5 10 1 1 0 7 1
value=\_CLEAR\_
T 69100 43600 5 10 0 0 0 0 1
net=CLEAR:1
}
C 69000 43900 1 0 0 input-1.sym
{
T 69000 44200 5 10 0 0 0 0 1
device=INPUT
T 68900 44000 5 10 1 1 0 7 1
value=\_WR\_
T 69100 44000 5 10 0 0 0 0 1
net=WR:1
}
C 60000 41200 1 0 0 74123-2.sym
{
T 60400 44240 5 10 0 0 0 0 1
device=74123
T 60400 44040 5 10 0 0 0 0 1
footprint=DIP16
T 61800 43100 5 10 1 1 0 6 1
refdes=U7
T 60400 43240 5 10 0 0 0 0 1
symversion=1.0
T 61200 42100 5 10 0 1 0 0 1
slot=2
}
C 64700 41200 1 0 0 74123-2.sym
{
T 65100 44240 5 10 0 0 0 0 1
device=74123
T 65100 44040 5 10 0 0 0 0 1
footprint=DIP16
T 66500 43100 5 10 1 1 0 6 1
refdes=U7
T 65100 43240 5 10 0 0 0 0 1
symversion=1.0
T 65800 42600 5 10 0 1 0 0 1
slot=1
}
C 60000 37900 1 0 0 74123-2.sym
{
T 60400 40940 5 10 0 0 0 0 1
device=74123
T 60400 40740 5 10 0 0 0 0 1
footprint=DIP16
T 61800 39800 5 10 1 1 0 6 1
refdes=U8
T 60400 39940 5 10 0 0 0 0 1
symversion=1.0
T 61500 39300 5 10 0 1 0 0 1
slot=2
}
C 64700 37900 1 0 0 74123-2.sym
{
T 65100 40940 5 10 0 0 0 0 1
device=74123
T 65100 40740 5 10 0 0 0 0 1
footprint=DIP16
T 66500 39800 5 10 1 1 0 6 1
refdes=U8
T 65100 39940 5 10 0 0 0 0 1
symversion=1.0
T 65600 38600 5 10 0 1 0 0 1
slot=1
}
T 61700 43500 9 10 1 0 0 0 1
MEMORY WRITE PULSE GENERATORS
N 59800 52200 59600 52200 4
C 59900 41500 1 0 0 vcc-1.sym
C 64000 41100 1 0 0 gnd-1.sym
C 64600 41500 1 0 0 vcc-1.sym
N 64100 42300 64800 42300 4
N 64100 42300 64100 42700 4
N 63200 42700 62100 42700 4
C 66800 42200 1 0 0 output-1.sym
{
T 66900 42500 5 10 0 0 0 0 1
device=OUTPUT
T 67700 42300 5 10 1 1 0 1 1
value=\_WR\_
T 67500 42300 5 10 0 1 0 0 1
net=WR:1
}
C 66800 42600 1 0 0 nc-right-1.sym
{
T 66900 43100 5 10 0 0 0 0 1
value=NoConnection
T 66900 43300 5 10 0 0 0 0 1
device=DRC_Directive
}
L 69300 42500 69800 42500 3 0 0 0 -1 -1
L 69800 42800 69800 42500 3 0 0 0 -1 -1
L 69800 42800 71800 42800 3 0 0 0 -1 -1
L 69300 42300 69800 42300 3 0 0 0 -1 -1
L 69800 42300 69800 42000 3 0 0 0 -1 -1
L 69800 42000 70300 42000 3 0 0 0 -1 -1
L 70300 42000 70300 42300 3 0 0 0 -1 -1
L 70300 42300 71800 42300 3 0 0 0 -1 -1
L 70000 41500 70200 41500 3 0 0 0 -1 -1
L 70200 41500 70200 41800 3 0 0 0 -1 -1
L 70200 41800 71800 41800 3 0 0 0 -1 -1
L 70000 41500 70000 41800 3 0 0 0 -1 -1
L 70000 41800 69300 41800 3 0 0 0 -1 -1
T 69200 42600 9 10 1 0 0 6 1
DA
T 69200 42100 9 10 1 0 0 6 1
\_PRESS\_
T 69200 41600 9 10 1 0 0 6 1
\_WR\_
L 69700 42700 69800 42800 3 0 0 0 -1 -1
L 69800 42800 69900 42700 3 0 0 0 -1 -1
L 69700 42100 69800 42000 3 0 0 0 -1 -1
L 69800 42000 69900 42100 3 0 0 0 -1 -1
L 69900 41600 70000 41500 3 0 0 0 -1 -1
L 70000 41500 70100 41600 3 0 0 0 -1 -1
B 68400 41300 3600 1700 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 62100 40000 9 10 1 0 0 0 1
STEP PULSE GENERATORS
L 69500 39500 69700 39500 3 0 0 0 -1 -1
L 69700 39500 69700 39200 3 0 0 0 -1 -1
L 69700 39200 70500 39200 3 0 0 0 -1 -1
L 70500 39200 70500 39500 3 0 0 0 -1 -1
L 70500 39500 71300 39500 3 0 0 0 -1 -1
L 71300 39500 71300 39200 3 0 0 0 -1 -1
L 71300 39200 72100 39200 3 0 0 0 -1 -1
L 72100 39200 72100 39500 3 0 0 0 -1 -1
L 72100 39500 72400 39500 3 0 0 0 -1 -1
L 69500 39000 69700 39000 3 0 0 0 -1 -1
L 69700 39000 69700 38700 3 0 0 0 -1 -1
L 69700 38700 70200 38700 3 0 0 0 -1 -1
L 70200 38700 70200 39000 3 0 0 0 -1 -1
L 70200 39000 71300 39000 3 0 0 0 -1 -1
L 71300 39000 71300 38700 3 0 0 0 -1 -1
L 71300 38700 71800 38700 3 0 0 0 -1 -1
L 71800 38700 71800 39000 3 0 0 0 -1 -1
L 71800 39000 72400 39000 3 0 0 0 -1 -1
L 69500 38500 69900 38500 3 0 0 0 -1 -1
L 69900 38500 69900 38200 3 0 0 0 -1 -1
L 69900 38200 70100 38200 3 0 0 0 -1 -1
L 70100 38200 70100 38500 3 0 0 0 -1 -1
L 70100 38500 71500 38500 3 0 0 0 -1 -1
L 71500 38500 71500 38200 3 0 0 0 -1 -1
L 71500 38200 71700 38200 3 0 0 0 -1 -1
L 71700 38200 71700 38500 3 0 0 0 -1 -1
L 71700 38500 72400 38500 3 0 0 0 -1 -1
T 69400 38300 9 10 1 0 0 6 1
\_STEP2\_
T 69400 38800 9 10 1 0 0 6 1
\_STEP1\_
T 69400 39300 9 10 1 0 0 6 1
STEPCLK
B 68400 38000 4200 1700 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
L 69600 39300 69700 39200 3 0 0 0 -1 -1
L 69700 39200 69800 39300 3 0 0 0 -1 -1
L 69600 38800 69700 38700 3 0 0 0 -1 -1
L 69700 38700 69800 38800 3 0 0 0 -1 -1
L 69800 38300 69900 38200 3 0 0 0 -1 -1
L 69900 38200 70000 38300 3 0 0 0 -1 -1
L 71200 39300 71300 39200 3 0 0 0 -1 -1
L 71300 39200 71400 39300 3 0 0 0 -1 -1
L 71200 38800 71300 38700 3 0 0 0 -1 -1
L 71300 38700 71400 38800 3 0 0 0 -1 -1
L 71400 38300 71500 38200 3 0 0 0 -1 -1
L 71500 38200 71600 38300 3 0 0 0 -1 -1
C 59300 39300 1 0 0 input-1.sym
{
T 59300 39600 5 10 0 0 0 0 1
device=INPUT
T 59200 39400 5 10 1 1 0 7 1
value=STEPCLK
T 60000 38700 5 10 0 1 0 0 1
net=STEPCLK:1
}
C 60000 42400 1 0 0 gnd-1.sym
C 59900 39000 1 0 0 vcc-1.sym
C 59900 38200 1 0 0 vcc-1.sym
C 62100 38900 1 0 0 output-1.sym
{
T 62200 39200 5 10 0 0 0 0 1
device=OUTPUT
T 63000 39000 5 10 1 1 0 1 1
value=\_STEP1\_
T 62800 39000 5 10 0 1 0 0 1
net=STEP1:1
}
C 63000 39300 1 0 0 resistor-1.sym
{
T 63300 39700 5 10 0 0 0 0 1
device=RESISTOR
T 63100 39600 5 10 1 1 0 0 1
refdes=R15
T 63400 39600 5 10 1 1 0 0 1
value=1k
}
C 63700 39400 1 270 0 capacitor-1.sym
{
T 64400 39200 5 10 0 0 270 0 1
device=CAPACITOR
T 64000 38600 5 10 1 1 0 0 1
refdes=C7
T 64600 39200 5 10 0 0 270 0 1
symversion=0.1
T 64000 38400 5 10 1 1 0 0 1
value=220pF
}
C 63800 38200 1 0 0 gnd-1.sym
C 64600 38200 1 0 0 vcc-1.sym
C 66800 39300 1 0 0 nc-right-1.sym
{
T 66900 39800 5 10 0 0 0 0 1
value=NoConnection
T 66900 40000 5 10 0 0 0 0 1
device=DRC_Directive
}
C 66800 38900 1 0 0 output-1.sym
{
T 66900 39200 5 10 0 0 0 0 1
device=OUTPUT
T 67700 39000 5 10 1 1 0 1 1
value=\_STEP2\_
T 67500 39000 5 10 0 1 0 0 1
net=STEP2:1
}
N 62100 41900 63200 41900 4
N 62100 40600 62100 41500 4
N 62100 41000 62700 41000 4
C 63100 41600 1 0 0 gnd-1.sym
C 61000 40600 1 0 0 vcc-1.sym
C 61000 37300 1 0 0 vcc-1.sym
C 61200 37200 1 0 0 resistor-1.sym
{
T 61500 37600 5 10 0 0 0 0 1
device=RESISTOR
T 61300 37000 5 10 1 1 0 0 1
refdes=R11
T 61700 37000 5 10 1 1 0 0 1
value=2.2k
}
N 62100 37300 62100 38200 4
N 62100 37700 62700 37700 4
C 62500 38600 1 270 0 capacitor-1.sym
{
T 63200 38400 5 10 0 0 270 0 1
device=CAPACITOR
T 62900 37900 5 10 1 1 0 0 1
C?
T 63400 38400 5 10 0 0 270 0 1
symversion=0.1
T 62900 37700 5 10 1 1 0 0 1
value=220pF
}
C 63100 38300 1 0 0 gnd-1.sym
N 62100 38600 63200 38600 4
N 66800 40600 66800 41500 4
N 66800 41000 67400 41000 4
C 65700 40600 1 0 0 vcc-1.sym
C 67800 41600 1 0 0 gnd-1.sym
N 66800 41900 67900 41900 4
N 66800 37300 66800 38200 4
N 66800 37700 67400 37700 4
C 65900 37200 1 0 0 resistor-1.sym
{
T 66200 37600 5 10 0 0 0 0 1
device=RESISTOR
T 66000 37000 5 10 1 1 0 0 1
refdes=R20
T 66400 37000 5 10 1 1 0 0 1
value=2.2k
}
C 65700 37300 1 0 0 vcc-1.sym
C 67200 38600 1 270 0 capacitor-1.sym
{
T 67600 37900 5 10 1 1 0 0 1
refdes=C11
T 67900 38400 5 10 0 0 270 0 1
device=CAPACITOR
T 68100 38400 5 10 0 0 270 0 1
symversion=0.1
T 67600 37700 5 10 1 1 0 0 1
value=47pF
}
N 66800 38600 67900 38600 4
C 67800 38300 1 0 0 gnd-1.sym
N 46000 41200 46000 42300 4
C 46000 42200 1 0 0 output-1.sym
{
T 46100 42500 5 10 0 0 0 0 1
device=OUTPUT
T 46900 42300 5 10 1 1 0 1 1
value=NOISEGEN
T 46700 42300 5 10 0 1 0 0 1
net=NOISEGEN:1
}
N 44700 41200 44700 42100 4
T 45400 43000 9 10 1 0 0 0 1
NOISE SOURCE
C 63100 50100 1 0 0 556-2.sym
{
T 63400 53200 5 10 0 0 0 0 1
device=TLC556
T 63400 53400 5 10 0 0 0 0 1
footprint=SO14
T 64995 53200 5 10 1 1 0 6 1
refdes=U5
}
C 65100 53700 1 0 0 vcc-1.sym
C 65500 52300 1 0 0 resistor-1.sym
{
T 65800 52700 5 10 0 0 0 0 1
device=RESISTOR
T 65800 52600 5 10 1 1 0 0 1
refdes=R18
T 66200 52600 5 10 1 1 0 0 1
value=1.5k
}
C 62200 52700 1 0 0 resistor-1.sym
{
T 62500 53100 5 10 0 0 0 0 1
device=RESISTOR
T 62100 53000 5 10 1 1 0 0 1
refdes=R13
T 62500 53000 5 10 1 1 0 0 1
value=5.6k
}
C 63000 53700 1 270 0 resistor-1.sym
{
T 63400 53400 5 10 0 0 270 0 1
device=RESISTOR
T 63000 53300 5 10 1 1 0 6 1
refdes=R14
T 63000 53100 5 10 1 1 0 6 1
value=1k
}
C 65400 53300 1 270 0 resistor-1.sym
{
T 65800 53000 5 10 0 0 270 0 1
device=RESISTOR
T 65600 53000 5 10 1 1 0 0 1
refdes=R17
T 65600 52800 5 10 1 1 0 0 1
value=1k
}
C 66000 50400 1 270 0 capacitor-2.sym
{
T 66700 50200 5 10 0 0 270 0 1
device=POLARIZED_CAPACITOR
T 66000 50000 5 10 1 1 0 6 1
refdes=C9
T 66900 50200 5 10 0 0 270 0 1
symversion=0.1
T 66000 49800 5 10 1 1 0 6 1
value=4.7uF
}
C 62000 50800 1 270 0 capacitor-1.sym
{
T 62700 50600 5 10 0 0 270 0 1
device=CAPACITOR
T 62400 50400 5 10 1 1 0 0 1
refdes=C6
T 62900 50600 5 10 0 0 270 0 1
symversion=0.1
T 62400 50200 5 10 1 1 0 0 1
value=0.1uF
}
N 65300 52000 66200 52000 4
N 66200 52000 66200 50400 4
N 66200 50400 65300 50400 4
N 62200 52400 63100 52400 4
N 62200 50800 62200 52800 4
N 62200 50800 63100 50800 4
N 65300 52800 65300 53700 4
N 63100 53700 65500 53700 4
N 65500 52400 65300 52400 4
N 65500 53300 65500 53700 4
N 66200 49500 62200 49500 4
N 62200 49500 62200 49900 4
N 63100 50400 63100 49500 4
C 63000 49200 1 0 0 gnd-1.sym
N 66700 52500 66400 52500 4
N 66400 52500 66400 52400 4
C 67100 51900 1 0 0 nc-right-1.sym
{
T 67200 52400 5 10 0 0 0 0 1
value=NoConnection
T 67200 52600 5 10 0 0 0 0 1
device=DRC_Directive
}
C 66200 51900 1 0 0 pot-2.sym
{
T 67000 52800 5 10 0 0 0 0 1
device=VARIABLE_RESISTOR
T 66400 51700 5 10 1 1 0 0 1
refdes=R21
T 67000 53400 5 10 0 0 0 0 1
footprint=none
T 66800 51700 5 10 1 1 0 0 1
value=50k
}
C 62900 51600 1 0 0 vcc-1.sym
C 65300 50700 1 0 0 output-1.sym
{
T 65400 51000 5 10 0 0 0 0 1
device=OUTPUT
T 66200 50800 5 10 1 1 0 1 1
value=STEPCLK
T 66000 50800 5 10 0 1 0 0 1
net=STEPCLK:1
}
C 63100 51100 1 0 1 output-1.sym
{
T 63000 51400 5 10 0 0 0 6 1
device=OUTPUT
T 62200 51200 5 10 1 1 0 7 1
value=LEDCLK
T 62400 51200 5 10 0 1 0 6 1
net=LEDCLK:1
}
T 63500 54200 9 10 1 0 0 0 1
CLOCK GENERATORS
N 60100 42300 59800 42300 4
N 59800 42300 59800 52200 4
C 69100 48900 1 0 0 input-1.sym
{
T 69100 49200 5 10 0 0 0 0 1
device=INPUT
T 69000 49000 5 10 1 1 0 7 1
value=\_STEP1\_
T 69000 47000 5 10 0 1 0 0 1
net=STEP1:1
}
N 63000 39400 62100 39400 4
N 63900 39400 64200 39400 4
N 64200 39400 64200 39000 4
N 64200 39000 64800 39000 4
C 64700 39100 1 0 0 gnd-1.sym
T 68400 37100 9 10 1 0 0 0 4
Sn setup time after STEPCLK falling edge: 160 ns
\_STEP1\_ pulse width: 760 ns
\_STEP2\_ pulse width: 240 ns
Delay, \_STEP1\_ falling edge to \_STEP2\_ falling edge: 240 ns
N 49000 47900 49600 47900 4
N 49500 49900 49600 49900 4
N 49500 50300 49600 50300 4
N 49500 50700 49600 50700 4
N 49500 51500 49600 51500 4
N 49500 51900 49600 51900 4
N 49500 52300 49600 52300 4
N 50500 54300 50500 47900 4
N 43100 49600 43100 48800 4
N 43000 49200 43200 49200 4
C 45400 47900 1 0 0 7486-1.sym
{
T 46100 48800 5 10 0 0 0 0 1
device=7486
T 45700 48800 5 10 1 1 0 0 1
refdes=U4
T 46100 50200 5 10 0 0 0 0 1
footprint=DIP14
}
N 45800 49400 45400 49400 4
N 45400 49400 45400 48600 4
C 56200 43900 1 0 0 7486-1.sym
{
T 56900 44800 5 10 0 0 0 0 1
device=7486
T 56500 44800 5 10 1 1 0 0 1
refdes=U4
T 56900 46200 5 10 0 0 0 0 1
footprint=DIP14
T 57000 44400 5 10 0 1 0 0 1
slot=2
}
C 56000 44600 1 0 0 vcc-1.sym
N 56200 44200 55700 44200 4
T 56300 43700 9 10 1 0 0 0 1
XOR gate used as inverter
C 62300 43900 1 0 0 input-1.sym
{
T 62300 44200 5 10 0 0 0 0 1
device=INPUT
T 62200 44000 5 10 1 1 0 7 1
value=\_RUN\_
T 63000 43300 5 10 0 1 0 0 1
net=RUN:1
}
C 63000 45700 1 0 0 gnd-1.sym
C 57500 43300 1 0 0 output-1.sym
{
T 57600 43600 5 10 0 0 0 0 1
device=OUTPUT
T 58400 43400 5 10 1 1 0 1 1
value=RUN
T 58200 43400 5 10 0 1 0 0 1
net=NRUN:1
}
N 57500 43400 55700 43400 4
C 66100 51100 1 0 1 input-1.sym
{
T 66100 51400 5 10 0 0 0 6 1
device=INPUT
T 66200 51200 5 10 1 1 0 1 1
value=RUN
T 65400 50500 5 10 0 1 0 6 1
net=NRUN:1
}
C 43000 48500 1 0 0 gnd-1.sym
N 43100 48800 43200 48800 4
C 65300 51500 1 0 0 nc-right-1.sym
{
T 65400 52000 5 10 0 0 0 0 1
value=NoConnection
T 65400 52200 5 10 0 0 0 0 1
device=DRC_Directive
}
C 62600 51900 1 0 0 nc-left-1.sym
{
T 62600 52300 5 10 0 0 0 0 1
value=NoConnection
T 62600 52700 5 10 0 0 0 0 1
device=DRC_Directive
}
C 61200 40500 1 0 0 resistor-1.sym
{
T 61500 40900 5 10 0 0 0 0 1
device=RESISTOR
T 61300 40300 5 10 1 1 0 0 1
refdes=R10
T 61700 40300 5 10 1 1 0 0 1
value=2.2k
}
C 62500 41900 1 270 0 capacitor-1.sym
{
T 63200 41700 5 10 0 0 270 0 1
device=CAPACITOR
T 62900 41200 5 10 1 1 0 0 1
C?
T 63400 41700 5 10 0 0 270 0 1
symversion=0.1
T 62900 41000 5 10 1 1 0 0 1
value=220pF
}
T 68400 40600 9 10 1 0 0 0 3
\_PRESS\_ pulse width: 650 ns
\_WR\_ pulse width: 290 ns
Delay, \_PRESS\_ falling edge to \_WR\_ falling edge: 190 ns
C 64700 42400 1 0 0 gnd-1.sym
C 65900 40500 1 0 0 resistor-1.sym
{
T 66200 40900 5 10 0 0 0 0 1
device=RESISTOR
T 66000 40300 5 10 1 1 0 0 1
refdes=R19
T 66400 40300 5 10 1 1 0 0 1
value=2.2k
}
C 67200 41900 1 270 0 capacitor-1.sym
{
T 67600 41200 5 10 1 1 0 0 1
refdes=C10
T 67900 41700 5 10 0 0 270 0 1
device=CAPACITOR
T 68100 41700 5 10 0 0 270 0 1
symversion=0.1
T 67600 41000 5 10 1 1 0 0 1
value=47pF
}
C 70700 43800 1 0 1 diode-1.sym
{
T 70300 44400 5 10 0 0 0 6 1
device=DIODE
T 70400 44300 5 10 1 1 0 6 1
refdes=D16
}
C 71400 43400 1 0 1 diode-1.sym
{
T 71000 44000 5 10 0 0 0 6 1
device=DIODE
T 71100 43900 5 10 1 1 0 6 1
refdes=D17
}
N 70500 43600 69800 43600 4
N 70700 44000 72900 44000 4
N 71400 43600 72400 43600 4
C 72300 44900 1 270 0 resistor-1.sym
{
T 72700 44600 5 10 0 0 270 0 1
device=RESISTOR
T 72500 44500 5 10 1 1 0 0 1
refdes=R22
T 72500 44300 5 10 1 1 0 0 1
value=10k
}
N 72400 43600 72400 44000 4
C 72200 44900 1 0 0 vcc-1.sym
N 78400 47300 82300 47300 4
N 82300 47300 82300 53400 4
N 82100 46200 78400 46200 4
N 81900 45100 78400 45100 4
N 81700 44000 78400 44000 4
T 76700 38900 9 10 1 0 0 0 16
Individual bits in RAM are toggled by feeding the outputs
of the 74LS189 back to the inputs through a 74HC86.
Since an XOR gate can act like a conditional inverter,
pins 2, 5, 10, and 13 of the '86 are the "control" inputs.
When a "control" pin is high, the '189's corresponding output bit,
which is already inverted, is inverted again, and the bit is unchanged.
When a "control" pin is low, the '189's corresponding output bit
is allowed to pass through unmodified, and the bit's inverse is written
into RAM.
The 4052 multiplexer pulls the "control" line for the selected channel low,
all the others are held high by pullup resistors.
Based on one datasheet, it looks like the 74LS189 has output buffers
to ensure that the \_Qn\_ lines retain their old value during a write cycle.
I verified this with a logic analyzer as well.
C 63900 42300 1 270 0 capacitor-1.sym
{
T 64600 42100 5 10 0 0 270 0 1
device=CAPACITOR
T 64200 41500 5 10 1 1 0 0 1
refdes=C8
T 64800 42100 5 10 0 0 270 0 1
symversion=0.1
T 64200 41300 5 10 1 1 0 0 1
value=220pF
}
C 63200 42600 1 0 0 resistor-1.sym
{
T 63500 43000 5 10 0 0 0 0 1
device=RESISTOR
T 63300 42900 5 10 1 1 0 0 1
refdes=R16
T 63700 42900 5 10 1 1 0 0 1
value=1k
}
C 85200 53000 1 0 1 diode-1.sym
{
T 84800 53600 5 10 0 0 0 6 1
device=DIODE
T 84900 53500 5 10 1 1 0 6 1
refdes=D18
}
C 85200 51900 1 0 1 diode-1.sym
{
T 84800 52500 5 10 0 0 0 6 1
device=DIODE
T 84900 52400 5 10 1 1 0 6 1
refdes=D19
}
C 85200 50800 1 0 1 diode-1.sym
{
T 84800 51400 5 10 0 0 0 6 1
device=DIODE
T 84900 51300 5 10 1 1 0 6 1
refdes=D20
}
C 85200 49700 1 0 1 diode-1.sym
{
T 84800 50300 5 10 0 0 0 6 1
device=DIODE
T 84900 50200 5 10 1 1 0 6 1
refdes=D21
}
C 44700 41800 1 0 0 7486-1.sym
{
T 45400 42700 5 10 0 0 0 0 1
device=7486
T 45000 42700 5 10 1 1 0 0 1
refdes=U4
T 45400 44100 5 10 0 0 0 0 1
footprint=DIP14
T 45000 42100 5 10 0 1 0 0 1
slot=4
}
C 44500 42500 1 0 0 vcc-1.sym
C 44900 41100 1 0 0 resistor-1.sym
{
T 45200 41500 5 10 0 0 0 0 1
device=RESISTOR
T 45100 41400 5 10 1 1 0 0 1
refdes=R1
T 45400 41400 5 10 1 1 0 0 1
value=1k
}
N 44900 41200 44700 41200 4
N 45800 41200 46000 41200 4
C 61600 45500 1 0 0 resistor-1.sym
{
T 61900 45900 5 10 0 0 0 0 1
device=RESISTOR
T 61700 45800 5 10 1 1 0 0 1
refdes=R12
T 62100 45800 5 10 1 1 0 0 1
value=1k
}
N 63100 44000 63100 44800 4
C 62700 45600 1 90 1 capacitor-1.sym
{
T 62000 45400 5 10 0 0 270 2 1
device=CAPACITOR
T 62200 45100 5 10 1 1 0 6 1
refdes=C5
T 61800 45400 5 10 0 0 270 2 1
symversion=0.1
T 62200 44900 5 10 1 1 0 6 1
value=1nF
}
C 62400 44400 1 0 0 gnd-1.sym
N 63100 45600 62500 45600 4
T 60200 46200 9 10 1 0 0 0 4
RC circuit delays the clock edge
until after \_STEP2\_ goes high.
This ensures the first beat is not
skipped when playback starts.
C 84400 39000 1 0 0 lm324-1.sym
{
T 85225 39150 5 8 0 0 0 0 1
device=LM324
T 84400 39900 5 10 1 1 0 0 1
refdes=U16
}
N 84400 39200 84400 38900 4
N 84400 38900 85400 38900 4
N 85400 38900 85400 39400 4
C 84800 38700 1 0 0 gnd-1.sym
C 84700 39800 1 0 0 vcc-1.sym
C 84400 37400 1 0 0 lm324-1.sym
{
T 85225 37550 5 8 0 0 0 0 1
device=LM324
T 84300 38300 5 10 1 1 0 0 1
refdes=U16
T 85000 37900 5 10 0 1 0 0 1
slot=2
}
N 84400 37600 84400 37300 4
N 84400 37300 85400 37300 4
N 85400 37300 85400 37800 4
C 84800 37100 1 0 0 gnd-1.sym
C 84700 38200 1 0 0 vcc-1.sym
C 84400 35800 1 0 0 lm324-1.sym
{
T 85225 35950 5 8 0 0 0 0 1
device=LM324
T 84300 36700 5 10 1 1 0 0 1
refdes=U16
T 84800 36300 5 10 0 1 0 0 1
slot=3
}
N 84400 36000 84400 35700 4
N 84400 35700 85400 35700 4
N 85400 35700 85400 36200 4
C 84800 35500 1 0 0 gnd-1.sym
C 84700 36600 1 0 0 vcc-1.sym
C 84400 34200 1 0 0 lm324-1.sym
{
T 85225 34350 5 8 0 0 0 0 1
device=LM324
T 84300 35100 5 10 1 1 0 0 1
refdes=U16
T 84700 34700 5 10 0 1 0 0 1
slot=4
}
N 84400 34400 84400 34100 4
N 84400 34100 85400 34100 4
N 85400 34100 85400 34600 4
C 84800 33900 1 0 0 gnd-1.sym
C 84700 35000 1 0 0 vcc-1.sym
C 85400 39300 1 0 0 resistor-1.sym
{
T 85700 39700 5 10 0 0 0 0 1
device=RESISTOR
T 85600 39600 5 10 1 1 0 0 1
refdes=R27
T 86000 39600 5 10 1 1 0 0 1
value=1k
}
C 85400 37700 1 0 0 resistor-1.sym
{
T 85700 38100 5 10 0 0 0 0 1
device=RESISTOR
T 85600 38000 5 10 1 1 0 0 1
refdes=R28
T 86000 38000 5 10 1 1 0 0 1
value=1k
}
C 85400 36100 1 0 0 resistor-1.sym
{
T 85700 36500 5 10 0 0 0 0 1
device=RESISTOR
T 85600 36400 5 10 1 1 0 0 1
refdes=R29
T 86000 36400 5 10 1 1 0 0 1
value=1k
}
C 85400 34500 1 0 0 resistor-1.sym
{
T 85700 34900 5 10 0 0 0 0 1
device=RESISTOR
T 85600 34800 5 10 1 1 0 0 1
refdes=R30
T 86000 34800 5 10 1 1 0 0 1
value=1k
}
N 86300 34600 86300 39400 4
C 83600 37900 1 0 0 input-1.sym
{
T 83600 38200 5 10 0 0 0 0 1
device=INPUT
T 83500 38000 5 10 1 1 0 7 1
value=OUT1
T 83500 36000 5 10 0 1 0 0 1
net=OUT1:1
}
C 83600 36300 1 0 0 input-1.sym
{
T 83600 36600 5 10 0 0 0 0 1
device=INPUT
T 83500 36400 5 10 1 1 0 7 1
value=OUT2
T 83500 34400 5 10 0 1 0 0 1
net=OUT2:1
}
C 83600 34700 1 0 0 input-1.sym
{
T 83600 35000 5 10 0 0 0 0 1
device=INPUT
T 83500 34800 5 10 1 1 0 7 1
value=OUT3
T 83500 32800 5 10 0 1 0 0 1
net=OUT3:1
}
C 83600 39500 1 0 0 input-1.sym
{
T 83600 39800 5 10 0 0 0 0 1
device=INPUT
T 83500 39600 5 10 1 1 0 7 1
value=OUT0
T 83500 37600 5 10 0 1 0 0 1
net=OUT0:1
}
C 88100 38800 1 0 0 lm358-1.sym
{
T 88775 39400 5 10 0 0 0 0 1
device=LM358
T 88800 40150 5 10 0 0 0 0 1
footprint=DIP8
T 88000 39700 5 10 1 1 0 0 1
refdes=U17
}
N 88100 39000 88100 38700 4
N 88100 38700 89100 38700 4
N 89100 38700 89100 39200 4
C 86300 39300 1 0 0 resistor-1.sym
{
T 86600 39700 5 10 0 0 0 0 1
device=RESISTOR
T 86500 39600 5 10 1 1 0 0 1
refdes=R31
T 86800 39600 5 10 1 1 0 0 1
value=10k
}
C 87100 39400 1 270 0 resistor-1.sym
{
T 87500 39100 5 10 0 0 270 0 1
device=RESISTOR
T 87400 39000 5 10 1 1 0 0 1
refdes=R32
T 87400 38800 5 10 1 1 0 0 1
value=10k
}
C 87100 38200 1 0 0 gnd-1.sym
N 87200 39400 88100 39400 4
C 88500 38500 1 0 0 gnd-1.sym
C 88400 39600 1 0 0 vcc-1.sym
C 89100 39000 1 0 0 capacitor-1.sym
{
T 89300 39700 5 10 0 0 0 0 1
device=CAPACITOR
T 89300 39500 5 10 1 1 0 0 1
refdes=C12
T 89300 39900 5 10 0 0 0 0 1
symversion=0.1
T 89700 39500 5 10 1 1 0 0 1
value=1uF
}
C 90000 39100 1 0 0 output-1.sym
{
T 90100 39400 5 10 0 0 0 0 1
device=OUTPUT
T 90900 39200 5 10 1 1 0 1 1
value=AUDIO OUT
T 90700 39200 5 10 0 1 0 0 1
net=AUDIOOUT:1
}
T 83700 40400 9 10 1 0 0 0 1
MIXER AND OUTPUT STAGE
C 86200 47000 1 0 1 connector5-1.sym
{
T 84400 48500 5 10 0 0 0 6 1
device=CONNECTOR_5
T 86100 48700 5 10 1 1 0 6 1
refdes=CONN1
}
T 84600 49000 9 10 1 0 0 0 1
VOICE BOARD CONNECTIONS
C 84300 48400 1 0 0 vcc-1.sym
C 84400 46900 1 0 0 gnd-1.sym
C 83700 48000 1 0 0 input-1.sym
{
T 83700 48300 5 10 0 0 0 0 1
device=INPUT
T 83600 48100 5 10 1 1 0 7 1
value=NOISEGEN
T 83600 46100 5 10 0 1 0 0 1
net=NOISEGEN:1
}
C 83700 47700 1 0 0 input-1.sym
{
T 83700 48000 5 10 0 0 0 0 1
device=INPUT
T 83600 47800 5 10 1 1 0 7 1
value=\_TRIG0\_
T 83600 45800 5 10 0 1 0 0 1
net=TRIG0:1
}
C 84500 47400 1 0 1 output-1.sym
{
T 84400 47700 5 10 0 0 0 6 1
device=OUTPUT
T 83600 47500 5 10 1 1 0 7 1
value=OUT0
T 83800 47500 5 10 0 1 0 6 1
net=OUT0:1
}
C 86200 45000 1 0 1 connector5-1.sym
{
T 84400 46500 5 10 0 0 0 6 1
device=CONNECTOR_5
T 86100 46700 5 10 1 1 0 6 1
refdes=CONN2
}
C 84300 46400 1 0 0 vcc-1.sym
C 84400 44900 1 0 0 gnd-1.sym
C 83700 46000 1 0 0 input-1.sym
{
T 83700 46300 5 10 0 0 0 0 1
device=INPUT
T 83600 46100 5 10 1 1 0 7 1
value=NOISEGEN
T 83600 44100 5 10 0 1 0 0 1
net=NOISEGEN:1
}
C 83700 45700 1 0 0 input-1.sym
{
T 83700 46000 5 10 0 0 0 0 1
device=INPUT
T 83600 45800 5 10 1 1 0 7 1
value=\_TRIG1\_
T 83600 43800 5 10 0 1 0 0 1
net=TRIG1:1
}
C 84500 45400 1 0 1 output-1.sym
{
T 84400 45700 5 10 0 0 0 6 1
device=OUTPUT
T 83600 45500 5 10 1 1 0 7 1
value=OUT1
T 83800 45500 5 10 0 1 0 6 1
net=OUT1:1
}
C 86200 43000 1 0 1 connector5-1.sym
{
T 84400 44500 5 10 0 0 0 6 1
device=CONNECTOR_5
T 86100 44700 5 10 1 1 0 6 1
refdes=CONN3
}
C 84300 44400 1 0 0 vcc-1.sym
C 84400 42900 1 0 0 gnd-1.sym
C 83700 44000 1 0 0 input-1.sym
{
T 83700 44300 5 10 0 0 0 0 1
device=INPUT
T 83600 44100 5 10 1 1 0 7 1
value=NOISEGEN
T 83600 42100 5 10 0 1 0 0 1
net=NOISEGEN:1
}
C 83700 43700 1 0 0 input-1.sym
{
T 83700 44000 5 10 0 0 0 0 1
device=INPUT
T 83600 43800 5 10 1 1 0 7 1
value=\_TRIG2\_
T 83600 41800 5 10 0 1 0 0 1
net=TRIG2:1
}
C 84500 43400 1 0 1 output-1.sym
{
T 84400 43700 5 10 0 0 0 6 1
device=OUTPUT
T 83600 43500 5 10 1 1 0 7 1
value=OUT2
T 83800 43500 5 10 0 1 0 6 1
net=OUT2:1
}
C 86200 41000 1 0 1 connector5-1.sym
{
T 84400 42500 5 10 0 0 0 6 1
device=CONNECTOR_5
T 86100 42700 5 10 1 1 0 6 1
refdes=CONN4
}
C 84300 42400 1 0 0 vcc-1.sym
C 84400 40900 1 0 0 gnd-1.sym
C 83700 42000 1 0 0 input-1.sym
{
T 83700 42300 5 10 0 0 0 0 1
device=INPUT
T 83600 42100 5 10 1 1 0 7 1
value=NOISEGEN
T 83600 40100 5 10 0 1 0 0 1
net=NOISEGEN:1
}
C 83700 41700 1 0 0 input-1.sym
{
T 83700 42000 5 10 0 0 0 0 1
device=INPUT
T 83600 41800 5 10 1 1 0 7 1
value=\_TRIG3\_
T 83600 39800 5 10 0 1 0 0 1
net=TRIG3:1
}
C 84500 41400 1 0 1 output-1.sym
{
T 84400 41700 5 10 0 0 0 6 1
device=OUTPUT
T 83600 41500 5 10 1 1 0 7 1
value=OUT3
T 83800 41500 5 10 0 1 0 6 1
net=OUT3:1
}
T 80600 48600 9 10 1 0 0 0 1
R23-R26: 10k
T 64200 55500 9 10 1 0 0 0 1
All parts are 74HC except 74C922 and 74LS189
T 71300 43300 9 10 1 0 0 0 1
D16-D17: 1N4148
T 84600 49400 9 10 1 0 0 0 1
D18-D21: 1N4148
T 43100 37500 9 16 1 0 0 0 3
7400 Drum Machine
Matt Sarnoff (www.msarnoff.org)
October 20, 2011
C 57600 49800 1 0 0 EMBEDDED74c922-1.sym
[
T 57900 55200 5 10 0 0 0 0 1
net=GND:9
T 57900 55000 5 10 0 0 0 0 1
net=Vcc:18
T 57900 54800 5 10 0 0 0 0 1
numslots=0
T 57900 54600 5 10 0 0 0 0 1
description=16-Key Encoder
T 57900 54400 5 10 0 0 0 0 1
author=Matt Sarnoff (www.msarnoff.org)
T 57900 54200 5 10 0 0 0 0 1
footprint=DIP18
T 57900 54000 5 10 0 0 0 0 1
device=74C922
T 57900 53800 9 10 1 0 0 0 1
74C922
T 59300 53800 8 10 0 1 0 6 1
refdes=U?
B 57900 50100 1400 3600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
P 59600 53400 59300 53400 1 0 0
{
T 59400 53450 5 8 1 1 0 0 1
pinnumber=17
T 59400 53350 5 8 0 1 0 2 1
pinseq=16
T 59250 53400 9 8 1 1 0 6 1
pinlabel=D0
T 59250 53400 5 8 0 1 0 8 1
pintype=out
}
P 59600 53100 59300 53100 1 0 0
{
T 59400 53150 5 8 1 1 0 0 1
pinnumber=16
T 59400 53050 5 8 0 1 0 2 1
pinseq=15
T 59250 53100 9 8 1 1 0 6 1
pinlabel=D1
T 59250 53100 5 8 0 1 0 8 1
pintype=out
}
P 59600 52800 59300 52800 1 0 0
{
T 59400 52850 5 8 1 1 0 0 1
pinnumber=15
T 59400 52750 5 8 0 1 0 2 1
pinseq=14
T 59250 52800 9 8 1 1 0 6 1
pinlabel=D2
T 59250 52800 5 8 0 1 0 8 1
pintype=out
}
P 59600 52500 59300 52500 1 0 0
{
T 59400 52550 5 8 1 1 0 0 1
pinnumber=14
T 59400 52450 5 8 0 1 0 2 1
pinseq=13
T 59250 52500 9 8 1 1 0 6 1
pinlabel=D3
T 59250 52500 5 8 0 1 0 8 1
pintype=out
}
P 57600 50400 57900 50400 1 0 0
{
T 57800 50450 5 8 1 1 0 6 1
pinnumber=13
T 57800 50350 5 8 0 1 0 8 1
pinseq=12
T 57950 50400 9 8 1 1 0 0 1
pinlabel=\_OE\_
T 57950 50400 5 8 0 1 0 2 1
pintype=in
}
P 59600 52200 59300 52200 1 0 0
{
T 59400 52250 5 8 1 1 0 0 1
pinnumber=12
T 59400 52150 5 8 0 1 0 2 1
pinseq=11
T 59250 52200 9 8 1 1 0 6 1
pinlabel=DA
T 59250 52200 5 8 0 1 0 8 1
pintype=out
}
P 57600 53400 57900 53400 1 0 0
{
T 57800 53450 5 8 1 1 0 6 1
pinnumber=11
T 57800 53350 5 8 0 1 0 8 1
pinseq=10
T 57950 53400 9 8 1 1 0 0 1
pinlabel=COL X1
T 57950 53400 5 8 0 1 0 2 1
pintype=in
}
P 57600 53100 57900 53100 1 0 0
{
T 57800 53150 5 8 1 1 0 6 1
pinnumber=10
T 57800 53050 5 8 0 1 0 8 1
pinseq=9
T 57950 53100 9 8 1 1 0 0 1
pinlabel=COL X2
T 57950 53100 5 8 0 1 0 2 1
pintype=in
}
P 57600 52800 57900 52800 1 0 0
{
T 57800 52850 5 8 1 1 0 6 1
pinnumber=8
T 57800 52750 5 8 0 1 0 8 1
pinseq=8
T 57950 52800 9 8 1 1 0 0 1
pinlabel=COL X3
T 57950 52800 5 8 0 1 0 2 1
pintype=in
}
P 57600 52500 57900 52500 1 0 0
{
T 57800 52550 5 8 1 1 0 6 1
pinnumber=7
T 57800 52450 5 8 0 1 0 8 1
pinseq=7
T 57950 52500 9 8 1 1 0 0 1
pinlabel=COL X4
T 57950 52500 5 8 0 1 0 2 1
pintype=in
}
P 58900 49800 58900 50100 1 0 0
{
T 58855 49900 5 8 1 1 0 6 1
pinnumber=6
T 58950 50000 5 8 0 1 90 8 1
pinseq=6
T 58900 50150 9 8 1 1 0 3 1
pinlabel=KBM
T 58900 50150 5 8 0 1 90 2 1
pintype=in
}
P 58300 49800 58300 50100 1 0 0
{
T 58255 49900 5 8 1 1 0 6 1
pinnumber=5
T 58350 50000 5 8 0 1 90 8 1
pinseq=5
T 58300 50150 9 8 1 1 0 3 1
pinlabel=OSC
T 58300 50150 5 8 0 1 90 2 1
pintype=in
}
P 57600 51000 57900 51000 1 0 0
{
T 57800 51050 5 8 1 1 0 6 1
pinnumber=4
T 57800 50950 5 8 0 1 0 8 1
pinseq=4
T 57950 51000 9 8 1 1 0 0 1
pinlabel=ROW Y4
T 57950 51000 5 8 0 1 0 2 1
pintype=in
}
P 57600 51300 57900 51300 1 0 0
{
T 57800 51350 5 8 1 1 0 6 1
pinnumber=3
T 57800 51250 5 8 0 1 0 8 1
pinseq=3
T 57950 51300 9 8 1 1 0 0 1
pinlabel=ROW Y3
T 57950 51300 5 8 0 1 0 2 1
pintype=in
}
P 57600 51600 57900 51600 1 0 0
{
T 57800 51650 5 8 1 1 0 6 1
pinnumber=2
T 57800 51550 5 8 0 1 0 8 1
pinseq=2
T 57950 51600 9 8 1 1 0 0 1
pinlabel=ROW Y2
T 57950 51600 5 8 0 1 0 2 1
pintype=in
}
P 57600 51900 57900 51900 1 0 0
{
T 57800 51950 5 8 1 1 0 6 1
pinnumber=1
T 57800 51850 5 8 0 1 0 8 1
pinseq=1
T 57950 51900 9 8 1 1 0 0 1
pinlabel=ROW Y1
T 57950 51900 5 8 0 1 0 2 1
pintype=in
}
]
{
T 59300 53800 5 10 1 1 0 6 1
refdes=U3
T 57900 54000 5 10 0 0 0 0 1
device=74C922
T 57900 54200 5 10 0 0 0 0 1
footprint=DIP18
}
C 63100 46700 1 0 0 EMBEDDED4520-2.sym
[
T 63400 48550 9 10 1 0 0 0 1
4520
T 63400 50550 5 10 0 0 0 0 1
documentation=http://www.semiconductors.philips.com/acrobat/datasheets/HEF4520B_CNV_3.pdf
T 63400 50350 5 10 0 0 0 0 1
description=2 binary counter
T 63400 50150 5 10 0 0 0 0 1
slotdef=2:15,10,9,14,13,12,11
T 63400 49950 5 10 0 0 0 0 1
slotdef=1:7,2,1,6,5,4,3
T 63400 49750 5 10 0 0 0 0 1
numslots=2
T 63400 49550 5 10 0 0 0 0 1
slot=1
T 63400 49350 5 10 0 0 0 0 1
net=VDD:16
T 63400 49150 5 10 0 0 0 0 1
net=VSS:8
T 63400 48950 5 10 0 0 0 0 1
footprint=DIP16
T 63400 48750 5 10 0 0 0 0 1
device=4520
T 64400 48600 8 10 0 1 0 6 1
refdes=U?
V 63350 47800 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
L 63500 47800 63400 47875 3 0 0 0 -1 -1
L 63500 47800 63400 47725 3 0 0 0 -1 -1
B 63400 46700 1000 1800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
P 64700 48200 64400 48200 1 0 0
{
T 64500 48250 5 8 1 1 0 0 1
pinnumber=3
T 64500 48150 5 8 0 1 0 2 1
pinseq=7
T 64350 48200 9 8 1 1 0 6 1
pinlabel=Q1
T 64350 48200 5 8 0 1 0 8 1
pintype=out
}
P 64700 47800 64400 47800 1 0 0
{
T 64500 47850 5 8 1 1 0 0 1
pinnumber=4
T 64500 47750 5 8 0 1 0 2 1
pinseq=6
T 64350 47800 9 8 1 1 0 6 1
pinlabel=Q2
T 64350 47800 5 8 0 1 0 8 1
pintype=out
}
P 64700 47400 64400 47400 1 0 0
{
T 64500 47450 5 8 1 1 0 0 1
pinnumber=5
T 64500 47350 5 8 0 1 0 2 1
pinseq=5
T 64350 47400 9 8 1 1 0 6 1
pinlabel=Q3
T 64350 47400 5 8 0 1 0 8 1
pintype=out
}
P 64700 47000 64400 47000 1 0 0
{
T 64500 47050 5 8 1 1 0 0 1
pinnumber=6
T 64500 46950 5 8 0 1 0 2 1
pinseq=4
T 64350 47000 9 8 1 1 0 6 1
pinlabel=Q4
T 64350 47000 5 8 0 1 0 8 1
pintype=out
}
L 63500 48200 63400 48125 3 0 0 0 -1 -1
L 63500 48200 63400 48275 3 0 0 0 -1 -1
P 63100 48200 63400 48200 1 0 0
{
T 63300 48250 5 8 1 1 0 6 1
pinnumber=1
T 63300 48150 5 8 0 1 0 8 1
pinseq=3
T 63500 48200 9 8 1 1 0 0 1
pinlabel=CP0
T 63500 48200 5 8 0 1 0 2 1
pintype=clk
}
P 63100 47800 63300 47800 1 0 0
{
T 63300 47850 5 8 1 1 0 6 1
pinnumber=2
T 63300 47750 5 8 0 1 0 8 1
pinseq=2
T 63500 47800 9 8 1 1 0 0 1
pinlabel=\_CP\_1
T 63500 47800 5 8 0 1 0 2 1
pintype=clk
}
P 63100 47000 63400 47000 1 0 0
{
T 63300 47050 5 8 1 1 0 6 1
pinnumber=7
T 63300 46950 5 8 0 1 0 8 1
pinseq=1
T 63450 47000 9 8 1 1 0 0 1
pinlabel=RST
T 63450 47000 5 8 0 1 0 2 1
pintype=in
}
]
{
T 64400 48600 5 10 1 1 0 6 1
refdes=U6
T 63400 48750 5 10 0 0 0 0 1
device=4520
T 63400 48950 5 10 0 0 0 0 1
footprint=DIP16
}
C 63100 44500 1 0 0 EMBEDDED4520-2.sym
[
T 63400 46350 9 10 1 0 0 0 1
4520
T 63400 48350 5 10 0 0 0 0 1
documentation=http://www.semiconductors.philips.com/acrobat/datasheets/HEF4520B_CNV_3.pdf
T 63400 48150 5 10 0 0 0 0 1
description=2 binary counter
T 63400 47950 5 10 0 0 0 0 1
slotdef=2:15,10,9,14,13,12,11
T 63400 47750 5 10 0 0 0 0 1
slotdef=1:7,2,1,6,5,4,3
T 63400 47550 5 10 0 0 0 0 1
numslots=2
T 63400 47350 5 10 0 0 0 0 1
slot=1
T 63400 47150 5 10 0 0 0 0 1
net=VDD:16
T 63400 46950 5 10 0 0 0 0 1
net=VSS:8
T 63400 46750 5 10 0 0 0 0 1
footprint=DIP16
T 63400 46550 5 10 0 0 0 0 1
device=4520
T 64400 46400 8 10 0 1 0 6 1
refdes=U?
V 63350 45600 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
L 63500 45600 63400 45675 3 0 0 0 -1 -1
L 63500 45600 63400 45525 3 0 0 0 -1 -1
B 63400 44500 1000 1800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
P 64700 46000 64400 46000 1 0 0
{
T 64500 46050 5 8 1 1 0 0 1
pinnumber=11
T 64500 45950 5 8 0 1 0 2 1
pinseq=7
T 64350 46000 9 8 1 1 0 6 1
pinlabel=Q1
T 64350 46000 5 8 0 1 0 8 1
pintype=out
}
P 64700 45600 64400 45600 1 0 0
{
T 64500 45650 5 8 1 1 0 0 1
pinnumber=12
T 64500 45550 5 8 0 1 0 2 1
pinseq=6
T 64350 45600 9 8 1 1 0 6 1
pinlabel=Q2
T 64350 45600 5 8 0 1 0 8 1
pintype=out
}
P 64700 45200 64400 45200 1 0 0
{
T 64500 45250 5 8 1 1 0 0 1
pinnumber=13
T 64500 45150 5 8 0 1 0 2 1
pinseq=5
T 64350 45200 9 8 1 1 0 6 1
pinlabel=Q3
T 64350 45200 5 8 0 1 0 8 1
pintype=out
}
P 64700 44800 64400 44800 1 0 0
{
T 64500 44850 5 8 1 1 0 0 1
pinnumber=14
T 64500 44750 5 8 0 1 0 2 1
pinseq=4
T 64350 44800 9 8 1 1 0 6 1
pinlabel=Q4
T 64350 44800 5 8 0 1 0 8 1
pintype=out
}
L 63500 46000 63400 45925 3 0 0 0 -1 -1
L 63500 46000 63400 46075 3 0 0 0 -1 -1
P 63100 46000 63400 46000 1 0 0
{
T 63300 46050 5 8 1 1 0 6 1
pinnumber=9
T 63300 45950 5 8 0 1 0 8 1
pinseq=3
T 63500 46000 9 8 1 1 0 0 1
pinlabel=CP0
T 63500 46000 5 8 0 1 0 2 1
pintype=clk
}
P 63100 45600 63300 45600 1 0 0
{
T 63300 45650 5 8 1 1 0 6 1
pinnumber=10
T 63300 45550 5 8 0 1 0 8 1
pinseq=2
T 63500 45600 9 8 1 1 0 0 1
pinlabel=\_CP\_1
T 63500 45600 5 8 0 1 0 2 1
pintype=clk
}
P 63100 44800 63400 44800 1 0 0
{
T 63300 44850 5 8 1 1 0 6 1
pinnumber=15
T 63300 44750 5 8 0 1 0 8 1
pinseq=1
T 63450 44800 9 8 1 1 0 0 1
pinlabel=RST
T 63450 44800 5 8 0 1 0 2 1
pintype=in
}
]
{
T 64400 46400 5 10 1 1 0 6 1
refdes=U6
T 63400 46550 5 10 0 0 0 0 1
device=4520
T 63400 46750 5 10 0 0 0 0 1
footprint=DIP16
T 64200 44900 5 10 0 1 0 0 1
slot=2
}
T 63400 53400 9 10 1 0 0 0 1
(7556 or TLC556)