# 2021-2022 Deeltoets 2 ## Opgaven De opgaven kun je vinden op: [https://bitbucket.org/HR_ELEKTRO/ems10/wiki/Toetsen/2021-2022_Deeltoets_2.pdf](https://bitbucket.org/HR_ELEKTRO/ems10/wiki/Toetsen/2021-2022_Deeltoets_2.pdf) ## Uitwerkingen ### Toetsvragen 1 en 2 ```c #include #include // 1C #pragma vector = TIMER1_A1_VECTOR __interrupt void timer1_ISR(void) { P2OUT ^= 1<<1; TA1CTL &= ~TAIFG; } int main(void) { WDTCTL = WDTPW | WDTHOLD; // stop watchdog timer // 1A P2DIR |= 1<<2 | 1<<1; P2OUT |= 1<<2 | 1<<1; // 1B BCSCTL3 = LFXT1S_2; // Timer 1 use ACLK, up/down mode en input divider = 1 TA1CTL = TASSEL_1 | ID_0 | MC_3 | TAIE; // Interrupt every 2 seconds = 12000 * 2 = 24000 clocks TACCR0 = 1/2 * 24000 = 12000 TA1CCR0 = 12000; // niet -1 // 1C P2SEL |= 1<<2; P2SEL2 &= ~(1<<2); // Output Mode 2:Toggle/Set TA1CCTL1 = OUTMOD_2; TA1CCR1 = 3000; // niet -1 __enable_interrupt(); // 2 // DCO = 12 MHz DCOCTL = 0; BCSCTL1 = CALBC1_12MHZ; DCOCTL = CALDCO_12MHZ; // We volgen de instructies uit de Family User's Guide paragraaf 15.3.1. // 1. Set UCSWRST UCA0CTL1 |= UCSWRST; // 2. Initialize all USCI registers with UCSWRST = 1 (including UCAxCTL1) // Parity disabled, LSB first, 8-bit data, One stop bit, UART mode, Asynchronous mode UCA0CTL0 = 0; // USCI clock source select = SMCLK UCA0CTL1 = UCSSEL_2 | UCSWRST; // Baudrate = 9600 zie paragraaf 15.3.13 in Family User's Guide. // Oversampling mode enabled UCA0BR0 = 78; UCA0BR1 = 0; UCA0MCTL = UCBRS_0 | UCBRF_2 | UCOS16; // 3. Configure ports. P1SEL |= BIT2 | BIT1; P1SEL2 |= BIT2 | BIT1; // 4. Clear UCSWRST via software UCA0CTL1 &= ~UCSWRST; while (1) { while ((IFG2 & UCA0RXIFG) == 0); // wacht op ontvangst karakter char c = UCA0RXBUF; if (c == '0') { P2OUT &= ~(1<<1); } else if (c == '1') { P2OUT |= 1<<1; } } } ``` ### Toetsvraag 3 De antwoorden op toetsvraag 3 kun je vinden op: [https://bitbucket.org/HR_ELEKTRO/ems10/wiki/Toetsen/2021-2022_Deeltoets_2_antwoordblad.pdf](https://bitbucket.org/HR_ELEKTRO/ems10/wiki/Toetsen/2021-2022_Deeltoets_2_antwoordblad.pdf)