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useless shit

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Kyle Hagan
Kyle Hagan committed Oct 12, 2017
1 parent c86f225 commit 648c8a47c5f79dff1c3eaca834844f6f11771447
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@@ -0,0 +1,20 @@
<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE plist PUBLIC "-//Apple Computer//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">
<plist version="1.0">
<dict>
<key>CFBundleDevelopmentRegion</key>
<string>English</string>
<key>CFBundleIdentifier</key>
<string>com.apple.xcode.dsym.a.out</string>
<key>CFBundleInfoDictionaryVersion</key>
<string>6.0</string>
<key>CFBundlePackageType</key>
<string>dSYM</string>
<key>CFBundleSignature</key>
<string>????</string>
<key>CFBundleShortVersionString</key>
<string>1.0</string>
<key>CFBundleVersion</key>
<string>1</string>
</dict>
</plist>
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@@ -382,7 +382,6 @@ void WB()//TA told us to update current state not next state, but updating curre
/************************************************************/
void MEM()
{
/*IMPLEMENT THIS*/
//MEM_WB.IR = EX_MEM.IR;
if (EX_MEM.instruction_type == 0 || EX_MEM.instruction_type == 7 || EX_MEM.instruction_type == 8){
@@ -396,7 +395,6 @@ void MEM()
}
}
else if (EX_MEM.instruction_type == 1){
//store
@@ -413,19 +411,19 @@ void MEM()
MEM_WB.PC = EX_MEM.PC;
MEM_WB.IR = EX_MEM.IR;
if(ENABLE_FORWARDING){
if(MEM_WB.RegWrite && (MEM_WB.C != 0) && (!(EX_MEM.RegWrite && (EX_MEM.C != 0) && (EX_MEM.C == ID_EX.RegisterRs) && MEM_WB.C == ID_EX.RegisterRs)){
//forwardA=01
}
if(MEM_WB.RegWrite && (MEM_WB.C != 0) && (!(EX_MEM.RegWrite && (EX_MEM.C != 0) && (EX_MEM.C == ID_EX.RegisterRt) && MEM_WB.C == ID_EX.RegisterRt)){
//forwardB=01
}
if(ENABLE_FORWARDING){
if(MEM_WB.RegWrite && (MEM_WB.C != 0) && (!(EX_MEM.RegWrite && (EX_MEM.C != 0) && (EX_MEM.C == ID_EX.RegisterRs) && MEM_WB.C == ID_EX.RegisterRs))){
//forwardA=01
}
if(MEM_WB.RegWrite && (MEM_WB.C != 0) && (!(EX_MEM.RegWrite && (EX_MEM.C != 0) && (EX_MEM.C == ID_EX.RegisterRt) && MEM_WB.C == ID_EX.RegisterRt))){
//forwardB=01
}
}
}
/************************************************************/
/* execution (EX) pipeline stage: */
/* execution (EX) pipeline stage: */
/************************************************************/
void EX()
{
@@ -439,50 +437,49 @@ void EX()
EX_MEM.instruction_type = ID_EX.instruction_type;
EX_MEM.PC = ID_EX.PC;
if(ENABLE_FORWARDING){
if(EX_MEM.RegWrite && (EX_MEM.C != 0) && (EX_MEM.C == ID_EX.RegisterRs)){
//forwardA = 10
}
if((EX_MEM.RegWrite) && (EX_MEM.C != 0) && (EX_MEM.C == ID_EX.RegisterRt)){
//forwardB = 10
}
if(ENABLE_FORWARDING){
if(EX_MEM.RegWrite && (EX_MEM.C != 0) && (EX_MEM.C == ID_EX.RegisterRs)){
//forwardA = 10
}
if((EX_MEM.RegWrite) && (EX_MEM.C != 0) && (EX_MEM.C == ID_EX.RegisterRt)){
//forwardB = 10
}
}
}
/************************************************************/
/* instruction decode (ID) pipeline stage: */
/* instruction decode (ID) pipeline stage: */
/************************************************************/
void ID()
{
/*IMPLEMENT THIS*/
execute_instruction(IF_ID.IR, 0);
if (ID_EX.instruction_type == 6){//syscall
SYSCALL_FLAG = 1;
}
ID_EX.IR = IF_ID.IR;
ID_EX.PC = IF_ID.PC;
if (ID_EX.instruction_type == 1){
ID_EX.RegWrite = 0;
if (ID_EX.instruction_type == 1){
ID_EX.RegWrite = 0;
}
else{
ID_EX.RegWrite = 1;
}
if (!ENABLE_FORWARDING){
if((EX_MEM.RegWrite) && (EX_MEM.C != 0) && (EX_MEM.C == ID_EX.RegisterRs)){
//stall
}
else{
ID_EX.RegWrite = 1;
if((EX_MEM.RegWrite) && (EX_MEM.C != 0) && (EX_MEM.C == ID_EX.RegisterRt)){
//stall
}
if (!ENABLE_FORWARDING){
if((EX_MEM.RegWrite) && (EX_MEM.C != 0) && (EX_MEM.C == ID_EX.RegisterRs)){
//stall
}
if((EX_MEM.RegWrite) && (EX_MEM.C != 0) && (EX_MEM.C == ID_EX.RegisterRt)){
//stall
}
if((MEM_WB.RegWrite) && (MEM_WB.C != 0) && (MEM_WB.C == ID_EX.RegisterRs)){
//stall
}
if(MEM_WB.RegWrite && (MEM_WB.C != 0) && (MEM_WB.C == ID_EX.RegisterRt)){
//stall
}
if((MEM_WB.RegWrite) && (MEM_WB.C != 0) && (MEM_WB.C == ID_EX.RegisterRs)){
//stall
}
if((MEM_WB.RegWrite) && (MEM_WB.C != 0) && (MEM_WB.C == ID_EX.RegisterRt)){
//stall
}
}
}
/************************************************************/
@@ -500,8 +497,6 @@ void IF()
NEXT_STATE.PC = CURRENT_STATE.PC + 4;
IF_ID.PC = NEXT_STATE.PC;
}
}
@@ -515,7 +510,7 @@ void initialize() {
RUN_FLAG = TRUE;
}
/************************************************************/ID_EX
/************************************************************/
/* Print the program loaded into memory (in MIPS assembly format) */
/************************************************************/
void print_program(){
@@ -532,8 +527,8 @@ void print_program(){
}
/***************************************X/MEM*********************/
/* Print the current pipeline */
/************************************************************/
/* Print the current pipeline */
/*****************************************************************/
void show_pipeline(){
/*IMPLEMENT THIS*/
printf("---------------------------------IF--------------------------------------\n");
@@ -575,7 +570,7 @@ void show_pipeline(){
}
/***************************************************************/
/* main */
/* main */
/***************************************************************/
int main(int argc, char *argv[]) {
printf("\n**************************\n");
@@ -56,7 +56,7 @@ typedef struct CPU_Pipeline_Reg_Struct{
uint32_t ALUOutput2;
uint32_t LMD;
uint32_t instruction_type;
uint32_t RegWrite;
uint32_t RegWrite; //This is used when writing to a register (1 = write, 0 = not writing)
uint32_t RegisterRs;
uint32_t RegisterRt;

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