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Adding many of the missing signals to the mux table.

Signed-off-by: Bas Laarhoven <sjml@xs4all.nl>
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1 parent 4b5c9a2 commit e8cf28a95c283bf39dd17217a1244298166cc23d @modmaker modmaker committed with koenkooi May 13, 2012
Showing with 101 additions and 96 deletions.
  1. +101 −96 arch/arm/mach-omap2/mux33xx.c
@@ -28,6 +28,11 @@
}
/* AM33XX pin mux super set */
+/* 20120513 - SJL added a lot of missing signals using datasheet rev. C.
+ * Converted all names to lower case, except for the A and B
+ * channel suffixes, as that seems to be the rule.
+ * Marked lines with completed spec by leading empty comment.
+ */
static struct omap_mux __initdata am33xx_muxmodes[] = {
_AM33XX_MUXENTRY(GPMC_AD0, 0,
"gpmc_ad0", "mmc1_dat0", NULL, NULL,
@@ -53,21 +58,21 @@ static struct omap_mux __initdata am33xx_muxmodes[] = {
_AM33XX_MUXENTRY(GPMC_AD7, 0,
"gpmc_ad7", "mmc1_dat7", NULL, NULL,
NULL, NULL, NULL, "gpio1_7"),
- _AM33XX_MUXENTRY(GPMC_AD8, 0,
+/**/ _AM33XX_MUXENTRY(GPMC_AD8, 0,
"gpmc_ad8", "lcd_data16", "mmc1_dat0", "mmc2_dat4",
- NULL, NULL, NULL, "gpio0_22"),
- _AM33XX_MUXENTRY(GPMC_AD9, 0,
+ "ehrpwm2A", "pr1_mii_mt0_clk", NULL, "gpio0_22"),
+/**/ _AM33XX_MUXENTRY(GPMC_AD9, 0,
"gpmc_ad9", "lcd_data17", "mmc1_dat1", "mmc2_dat5",
- "ehrpwm2B", NULL, NULL, "gpio0_23"),
- _AM33XX_MUXENTRY(GPMC_AD10, 0,
+ "ehrpwm2B", "pr1_mii0_col", NULL, "gpio0_23"),
+/**/ _AM33XX_MUXENTRY(GPMC_AD10, 0,
"gpmc_ad10", "lcd_data18", "mmc1_dat2", "mmc2_dat6",
- NULL, NULL, NULL, "gpio0_26"),
- _AM33XX_MUXENTRY(GPMC_AD11, 0,
+ "ehrpwm2_tripzone_input", "pr1_mii0_txen", NULL, "gpio0_26"),
+/**/ _AM33XX_MUXENTRY(GPMC_AD11, 0,
"gpmc_ad11", "lcd_data19", "mmc1_dat3", "mmc2_dat7",
- NULL, NULL, NULL, "gpio0_27"),
- _AM33XX_MUXENTRY(GPMC_AD12, 0,
+ "ehrpwm0_synco", "pr1_mii0_txd3", NULL, "gpio0_27"),
+/**/ _AM33XX_MUXENTRY(GPMC_AD12, 0,
"gpmc_ad12", "lcd_data20", "mmc1_dat4", "mmc2_dat0",
- NULL, NULL, NULL, "gpio1_12"),
+ "eqep2a_in", "pr1_mii0_txd2", "pr1_pru0_pru_r30_14", "gpio1_12"),
_AM33XX_MUXENTRY(GPMC_AD13, 0,
"gpmc_ad13", "lcd_data21", "mmc1_dat5", "mmc2_dat1",
NULL, NULL, NULL, "gpio1_13"),
@@ -77,33 +82,33 @@ static struct omap_mux __initdata am33xx_muxmodes[] = {
_AM33XX_MUXENTRY(GPMC_AD15, 0,
"gpmc_ad15", "lcd_data23", "mmc1_dat7", "mmc2_dat3",
NULL, NULL, NULL, "gpio1_15"),
- _AM33XX_MUXENTRY(GPMC_A0, 0,
- "gpmc_a0", "mii2_txen", "rgmii2_tctl", "rmii2_txen",
- NULL, NULL, NULL, "gpio1_16"),
- _AM33XX_MUXENTRY(GPMC_A1, 0,
- "gpmc_a1", "mii2_rxdv", "rgmii2_rctl", "mmc2_dat0",
- NULL, NULL, NULL, "gpio1_17"),
- _AM33XX_MUXENTRY(GPMC_A2, 0,
- "gpmc_a2", "mii2_txd3", "rgmii2_td3", "mmc2_dat1",
- NULL, NULL, "ehrpwm1A", "gpio1_18"),
- _AM33XX_MUXENTRY(GPMC_A3, 0,
- "gpmc_a3", "mii2_txd2", "rgmii2_td2", "mmc2_dat2",
- NULL, NULL, NULL, "gpio1_19"),
- _AM33XX_MUXENTRY(GPMC_A4, 0,
- "gpmc_a4", "mii2_txd1", "rgmii2_td1", "rmii2_txd1",
- "gpmc_a20", NULL, NULL, "gpio1_20"),
- _AM33XX_MUXENTRY(GPMC_A5, 0,
- "gpmc_a5", "mii2_txd0", "rgmii2_td0", "rmii2_txd0",
- "gpmc_a21", NULL, NULL, "gpio1_21"),
- _AM33XX_MUXENTRY(GPMC_A6, 0,
- "gpmc_a6", "mii2_txclk", "rgmii2_tclk", "mmc2_dat4",
- "gpmc_a22", NULL, NULL, "gpio1_22"),
- _AM33XX_MUXENTRY(GPMC_A7, 0,
- "gpmc_a7", "mii2_rxclk", "rgmii2_rclk", "mmc2_dat5",
- NULL, NULL, NULL, "gpio1_23"),
- _AM33XX_MUXENTRY(GPMC_A8, 0,
- "gpmc_a8", "mii2_rxd3", "rgmii2_rd3", "mmc2_dat6",
- NULL, NULL, "mcasp0_aclkx", "gpio1_24"),
+/**/ _AM33XX_MUXENTRY(GPMC_A0, 0,
+ "gpmc_a0", "gmii2_txen", "rgmii2_tctl", "rmii2_txen",
+ "gpmc_a16", "pr1_mii_mt1_clk", "ehrpwm1_tripzone_input", "gpio1_16"),
+/**/ _AM33XX_MUXENTRY(GPMC_A1, 0,
+ "gpmc_a1", "gmii2_rxdv", "rgmii2_rctl", "mmc2_dat0",
+ "gpmc_a17", "pr1_mii1_txd3", "ehrpwm0_synco", "gpio1_17"),
+/**/ _AM33XX_MUXENTRY(GPMC_A2, 0,
+ "gpmc_a2", "gmii2_txd3", "rgmii2_td3", "mmc2_dat1",
+ "gpmc_a18", "pr1_mii1_txd2", "ehrpwm1A", "gpio1_18"),
+/**/ _AM33XX_MUXENTRY(GPMC_A3, 0,
+ "gpmc_a3", "gmii2_txd2", "rgmii2_td2", "mmc2_dat2",
+ "gpmc_a19", "pr1_mii1_txd1", "ehrpwm1B", "gpio1_19"),
+/**/ _AM33XX_MUXENTRY(GPMC_A4, 0,
+ "gpmc_a4", "gmii2_txd1", "rgmii2_td1", "rmii2_txd1",
+ "gpmc_a20", "pr1_mii1_txd0", "eqep1a_in", "gpio1_20"),
+/**/ _AM33XX_MUXENTRY(GPMC_A5, 0,
+ "gpmc_a5", "gmii2_txd0", "rgmii2_td0", "rmii2_txd0",
+ "gpmc_a21", "pr1_mii1_rxd3", "eqep1b_in", "gpio1_21"),
+/**/ _AM33XX_MUXENTRY(GPMC_A6, 0,
+ "gpmc_a6", "gmii2_txclk", "rgmii2_tclk", "mmc2_dat4",
+ "gpmc_a22", "pr1_mii1_rxd2", "eqep1_index", "gpio1_22"),
+/**/ _AM33XX_MUXENTRY(GPMC_A7, 0,
+ "gpmc_a7", "gmii2_rxclk", "rgmii2_rclk", "mmc2_dat5",
+ "gpmc_a23", "pr1_mii1_rxd1", "eqep1_strobe", "gpio1_23"),
+/**/ _AM33XX_MUXENTRY(GPMC_A8, 0,
+ "gpmc_a8", "gmii2_rxd3", "rgmii2_rd3", "mmc2_dat6",
+ "gpmc_a24", "pr1_mii1_rxd0", "mcasp0_aclkx", "gpio1_24"),
_AM33XX_MUXENTRY(GPMC_A9, 0,
"gpmc_a9", "mii2_rxd2", "rgmii2_rd2", "mmc2_dat7",
NULL, NULL, "mcasp0_fsx", "gpio1_25"),
@@ -122,18 +127,18 @@ static struct omap_mux __initdata am33xx_muxmodes[] = {
_AM33XX_MUXENTRY(GPMC_BEN1, 0,
"gpmc_ben1", "mii2_col", NULL, "mmc2_dat3",
NULL, NULL, "mcasp0_aclkr", "gpio1_28"),
- _AM33XX_MUXENTRY(GPMC_CSN0, 0,
+/**/ _AM33XX_MUXENTRY(GPMC_CSN0, 0,
"gpmc_csn0", NULL, NULL, NULL,
NULL, NULL, NULL, "gpio1_29"),
- _AM33XX_MUXENTRY(GPMC_CSN1, 0,
- "gpmc_csn1", NULL, "mmc1_clk", NULL,
- NULL, NULL, NULL, "gpio1_30"),
- _AM33XX_MUXENTRY(GPMC_CSN2, 0,
- "gpmc_csn2", NULL, "mmc1_cmd", NULL,
- NULL, NULL, NULL, "gpio1_31"),
- _AM33XX_MUXENTRY(GPMC_CSN3, 0,
+/**/ _AM33XX_MUXENTRY(GPMC_CSN1, 0,
+ "gpmc_csn1", "gpmc_clk", "mmc1_clk", "pr1_edio_data_in6",
+ "pr1_edio_data_out6", "pr1_pru1_pru_r30_12", "pr1_pru1_pru_r31_12", "gpio1_30"),
+/**/ _AM33XX_MUXENTRY(GPMC_CSN2, 0,
+ "gpmc_csn2", "gpmc_be1n", "mmc1_cmd", "pr1_edio_data_in7",
+ "pr1_edio_data_out7", "pr1_pru1_pru_r30_13", "pr1_pru1_pru_r31_13", "gpio1_31"),
+/**/ _AM33XX_MUXENTRY(GPMC_CSN3, 0,
"gpmc_csn3", NULL, NULL, "mmc2_cmd",
- NULL, NULL, NULL, "gpio2_0"),
+ "pr1_mii0_crs", "pr1_mdio_data", "EMU4", "gpio2_0"),
_AM33XX_MUXENTRY(GPMC_CLK, 0,
"gpmc_clk", "lcd_memory_clk_mux", NULL, "mmc2_clk",
NULL, NULL, "mcasp0_fsr", "gpio2_1"),
@@ -155,33 +160,33 @@ static struct omap_mux __initdata am33xx_muxmodes[] = {
_AM33XX_MUXENTRY(LCD_DATA1, 0,
"lcd_data1", "gpmc_a1", NULL, NULL,
NULL, NULL, NULL, "gpio2_7"),
- _AM33XX_MUXENTRY(LCD_DATA2, 0,
- "lcd_data2", "gpmc_a2", NULL, NULL,
- NULL, NULL, NULL, "gpio2_8"),
- _AM33XX_MUXENTRY(LCD_DATA3, 0,
- "lcd_data3", "gpmc_a3", NULL, NULL,
- NULL, NULL, NULL, "gpio2_9"),
- _AM33XX_MUXENTRY(LCD_DATA4, 0,
- "lcd_data4", "gpmc_a4", NULL, NULL,
- NULL, NULL, NULL, "gpio2_10"),
- _AM33XX_MUXENTRY(LCD_DATA5, 0,
- "lcd_data5", "gpmc_a5", NULL, NULL,
- NULL, NULL, NULL, "gpio2_11"),
- _AM33XX_MUXENTRY(LCD_DATA6, 0,
- "lcd_data6", "gpmc_a6", NULL, NULL,
- NULL, NULL, NULL, "gpio2_12"),
- _AM33XX_MUXENTRY(LCD_DATA7, 0,
- "lcd_data7", "gpmc_a7", NULL, NULL,
- NULL, NULL, NULL, "gpio2_13"),
+/**/ _AM33XX_MUXENTRY(LCD_DATA2, 0,
+ "lcd_data2", "gpmc_a2", "pr1_mii0_txd3", "ehrpwm2_tripzone_input",
+ NULL, "pr1_pru1_pru_r30_2", "pr1_pru1_pru_r31_2", "gpio2_8"),
+/**/ _AM33XX_MUXENTRY(LCD_DATA3, 0,
+ "lcd_data3", "gpmc_a3", "pr1_mii0_txd2","ehrpwm0_synco",
+ NULL, "pr1_pru1_pru_r30_3", "pr1_pru1_pru_r31_3", "gpio2_9"),
+/**/ _AM33XX_MUXENTRY(LCD_DATA4, 0,
+ "lcd_data4", "gpmc_a4", "pr1_mii0_txd1", "eQEP2A_in",
+ NULL, "pr1_pru1_pru_r30_4", "pr1_pru1_pru_r31_4", "gpio2_10"),
+/**/ _AM33XX_MUXENTRY(LCD_DATA5, 0,
+ "lcd_data5", "gpmc_a5", "pr1_mii0_txd0", "eqep2b_in",
+ NULL, "pr1_pru1_pru_r30_5", "pr1_pru1_pru_r31_5", "gpio2_11"),
+/**/ _AM33XX_MUXENTRY(LCD_DATA6, 0,
+ "lcd_data6", "gpmc_a6", "pr1_edio_data_in6", "eqep2_index",
+ "pr1_edio_data_out6", "pr1_pru1_pru_r30_6", "pr1_pru1_pru_r31_6", "gpio2_12"),
+/**/ _AM33XX_MUXENTRY(LCD_DATA7, 0,
+ "lcd_data7", "gpmc_a7", "pr1_edio_data_in7", "eqep2_strobe",
+ "pr1_pru1_pru_r30_7", "pr1_pru_pru1_r30_7", "pr1_pru1_pru_r31_7", "gpio2_13"),
_AM33XX_MUXENTRY(LCD_DATA8, 0,
"lcd_data8", "gpmc_a12", NULL, "mcasp0_aclkx",
NULL, NULL, "uart2_ctsn", "gpio2_14"),
_AM33XX_MUXENTRY(LCD_DATA9, 0,
"lcd_data9", "gpmc_a13", NULL, "mcasp0_fsx",
NULL, NULL, "uart2_rtsn", "gpio2_15"),
- _AM33XX_MUXENTRY(LCD_DATA10, 0,
- "lcd_data10", "gpmc_a14", NULL, "mcasp0_axr0",
- NULL, NULL, NULL, "gpio2_16"),
+/**/ _AM33XX_MUXENTRY(LCD_DATA10, 0,
+ "lcd_data10", "gpmc_a14", "ehrpwm1A", "mcasp0_axr0",
+ "mcasp0_axr0", "pr1_mii0_rxd1", "uart3_ctsn", "gpio2_16"),
_AM33XX_MUXENTRY(LCD_DATA11, 0,
"lcd_data11", "gpmc_a15", NULL, "mcasp0_ahclkr",
"mcasp0_axr2", NULL, NULL, "gpio2_17"),
@@ -197,18 +202,18 @@ static struct omap_mux __initdata am33xx_muxmodes[] = {
_AM33XX_MUXENTRY(LCD_DATA15, 0,
"lcd_data15", "gpmc_a19", NULL, "mcasp0_ahclkx",
"mcasp0_axr3", NULL, NULL, "gpio0_11"),
- _AM33XX_MUXENTRY(LCD_VSYNC, 0,
- "lcd_vsync", NULL, NULL, NULL,
- NULL, NULL, NULL, "gpio2_22"),
- _AM33XX_MUXENTRY(LCD_HSYNC, 0,
- "lcd_hsync", NULL, NULL, NULL,
- NULL, NULL, NULL, "gpio2_23"),
- _AM33XX_MUXENTRY(LCD_PCLK, 0,
- "lcd_pclk", NULL, NULL, NULL,
- NULL, NULL, NULL, "gpio2_24"),
- _AM33XX_MUXENTRY(LCD_AC_BIAS_EN, 0,
- "lcd_ac_bias_en", NULL, NULL, NULL,
- NULL, NULL, NULL, "gpio2_25"),
+/**/ _AM33XX_MUXENTRY(LCD_VSYNC, 0,
+ "lcd_vsync", "gpmc_a8", NULL, "pr1_edio_data_in2",
+ "pr1_edio_data_out2", "pr1_pru1_pru_r30_8", "pr1_pru1_pru_r31_8", "gpio2_22"),
+/**/ _AM33XX_MUXENTRY(LCD_HSYNC, 0,
+ "lcd_hsync", "gpmc_a9", NULL, "pr1_edio_data_in3",
+ "pr1_edio_data_out3", "pr1_pru1_pru_r30_9", "pr1_pru1_pru_r31_9", "gpio2_23"),
+/**/ _AM33XX_MUXENTRY(LCD_PCLK, 0,
+ "lcd_pclk", "gpmc_a10", "pr1_mii0_crs", "pr1_edio_data_in4",
+ "pr1_edio_data_out4", "pr1_pru1_pru_r30_10", "pr1_pru1_pru_r31_10", "gpio2_24"),
+/**/ _AM33XX_MUXENTRY(LCD_AC_BIAS_EN, 0,
+ "lcd_ac_bias_en", "gpmc_a11", "pr1_mii1_crs", "pr1_edio_data_in5",
+ "pr1_edio_data_out5", "pr1_pru1_pru_r30_11", "pr1_pru1_pru_r31_11", "gpio2_25"),
_AM33XX_MUXENTRY(MMC0_DAT3, 0,
"mmc0_dat3", NULL, NULL, NULL,
NULL, NULL, NULL, "gpio2_26"),
@@ -296,9 +301,9 @@ static struct omap_mux __initdata am33xx_muxmodes[] = {
_AM33XX_MUXENTRY(SPI0_CS1, 0,
"spi0_cs1", "uart3_rxd", NULL, "mmc0_pow",
NULL, "mmc0_sdcd", NULL, "gpio0_6"),
- _AM33XX_MUXENTRY(ECAP0_IN_PWM0_OUT, 0,
- "ecap0_in_pwm0_out", "uart3_txd", "spi1_cs1", NULL,
- "spi1_sclk", "mmc0_sdwp", NULL, "gpio0_7"),
+/**/ _AM33XX_MUXENTRY(ECAP0_IN_PWM0_OUT, 0,
+ "ecap0_in_pwm0_out", "uart3_txd", "spi1_cs1", "pr1_ecap0_ecap_capin_apwm_o",
+ "spi1_sclk", "mmc0_sdwp", "xdma_event_intr2", "gpio0_7"),
_AM33XX_MUXENTRY(UART0_CTSN, 0,
"uart0_ctsn", NULL, "d_can1_tx", "i2c1_sda",
"spi1_d0", NULL, NULL, "gpio1_8"),
@@ -389,11 +394,11 @@ static struct omap_mux __initdata am33xx_muxmodes[] = {
_AM33XX_MUXENTRY(TRSTN, 0,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
- _AM33XX_MUXENTRY(EMU0, 0,
- NULL, NULL, NULL, NULL,
+/**/ _AM33XX_MUXENTRY(EMU0, 0,
+ "emu0", NULL, NULL, NULL,
NULL, NULL, NULL, "gpio3_7"),
- _AM33XX_MUXENTRY(EMU1, 0,
- NULL, NULL, NULL, NULL,
+/**/ _AM33XX_MUXENTRY(EMU1, 0,
+ "emu1", NULL, NULL, NULL,
NULL, NULL, NULL, "gpio3_8"),
_AM33XX_MUXENTRY(RTC_XTALIN, 0,
NULL, NULL, NULL, NULL,
@@ -572,34 +577,34 @@ static struct omap_mux __initdata am33xx_muxmodes[] = {
_AM33XX_MUXENTRY(DDR_VTP, 0,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
- _AM33XX_MUXENTRY(AIN0, 0,
+/**/ _AM33XX_MUXENTRY(AIN0, 0,
"ain0", NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
- _AM33XX_MUXENTRY(AIN1, 0,
+/**/ _AM33XX_MUXENTRY(AIN1, 0,
"ain1", NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
- _AM33XX_MUXENTRY(AIN2, 0,
+/**/ _AM33XX_MUXENTRY(AIN2, 0,
"ain2", NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
- _AM33XX_MUXENTRY(AIN3, 0,
+/**/ _AM33XX_MUXENTRY(AIN3, 0,
"ain3", NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
- _AM33XX_MUXENTRY(AIN4, 0,
+/**/ _AM33XX_MUXENTRY(AIN4, 0,
"ain4", NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
- _AM33XX_MUXENTRY(AIN5, 0,
+/**/ _AM33XX_MUXENTRY(AIN5, 0,
"ain5", NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
- _AM33XX_MUXENTRY(AIN6, 0,
+/**/ _AM33XX_MUXENTRY(AIN6, 0,
"ain6", NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
- _AM33XX_MUXENTRY(AIN7, 0,
+/**/ _AM33XX_MUXENTRY(AIN7, 0,
"ain7", NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
- _AM33XX_MUXENTRY(VREFP, 0,
+/**/ _AM33XX_MUXENTRY(VREFP, 0,
"vrefp", NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
- _AM33XX_MUXENTRY(VREFN, 0,
+/**/ _AM33XX_MUXENTRY(VREFN, 0,
"vrefn", NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
{ .reg_offset = OMAP_MUX_TERMINATOR },

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