Major Updates to LVS

[atorkmabrains]

LVS-Enhancement for SG13G2

Updates

• Ignoring Heattrans layer for recognizing the regular FETs. Now the difference between FETs and RF-FETs is

  • RFNMOS & RFNMOS-HV : with ptap surrounding
  • RFPMOS & RFPMOS-HV : with ntap surrounding

• Ignoring Heattrans layer for recognizing HBT-npn devices.

• Ignoring Heatres layer for recognizing poly resistors.

• Resolved Cap extraction (alpha LVS) #96:

  • There's no restriction on positioning devices under the MiM except for inductors, which can't be placed above it.
    • Devices positioned beneath the mimcap will all be recognized (MiM, resistors, FETs, etc.).
    • Placing an inductor above the mimcap will result in both not being recognized.

• Resolved RPPD extraction (alpha LVS) #100 & Series rhigh extraction (LVS alpha) #103:

  • Simplification will be enabled for both layout and schematic by default. Explained in Usage section.
  • We've revamped the resistor combiner functionality:
    • Series resistors with identical parameters (except length) will now combine into one resistor with the total length.
    • Parallel resistors will merge into a single resistor with the parameter 'm' representing the number of parallel resistors, provided they share identical parameters.
  • We've added new options to streamline resistor extraction:
    • --no_series_res: Prevents simplification of series resistors in both layout and schematic netlists.
    • --no_parallel_res: Prevents simplification of parallel resistors in both layout and schematic netlists.
    • Note that the --no_simplify option disables simplification for all devices (in both layout and schematic).

• Resolved Option GUI (alpha LVS) #98:
  We've updated the Klayout-GUI menus utilized for LVS to be more modular and user-friendly. Docs updated for GUI usage.