i965/vec4: fix d2b for small double values

FIXME: merge in original d2b

Author: itoral

src/mesa/drivers/dri/i965/brw_vec4_nir.cpp

@@ -1729,21 +1729,34 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
       break;
 
    case nir_op_d2b: {
-      /* two-argument instructions can't take 64-bit immediates */
-      dst_reg zero = dst_reg(VGRF, alloc.allocate(1));
-      zero.type = BRW_REGISTER_TYPE_DF;
-      emit(MOV(zero, brw_imm_df(0.0)));
-
-      dst_reg tmp = dst_reg(VGRF, alloc.allocate(1));
-      tmp.type = BRW_REGISTER_TYPE_DF;
-      emit(CMP(tmp, op[0], src_reg(zero), BRW_CONDITIONAL_NZ));
-
-      /* Convert the double CMP result to a single boolean result. For that
-       * we take the low 32-bit chunk of each DF component in the result.
+      /* Because comparing to 0.0f is subject to precision limitations, do the
+       * comparison using integers (we need to get rid of the sign bit for that)
+       * then we OR both 32-bit chunks and compare the result to 0u. This will
+       * return false if any bit (other than sign) was set on the double
+       * operand.
        */
-      src_reg lo = src_reg(retype(tmp, BRW_REGISTER_TYPE_UD));
-      lo.swizzle = BRW_SWIZZLE_XZXZ;
-      emit(MOV(retype(dst, BRW_REGISTER_TYPE_UD), lo));
+      if (devinfo->gen >= 8)
+         op[0] = resolve_source_modifiers(op[0]);
+      op[0] = retype(op[0], BRW_REGISTER_TYPE_UD);
+
+      /* Eliminate the sign bit in the hi 32-bit of each DF component*/
+      op[0].swizzle = BRW_SWIZZLE4(1, 1, 3, 3);
+      emit(AND(writemask(dst_reg(op[0]), WRITEMASK_YW),
+               op[0], brw_imm_ud(0x7FFFFFFFu)));
+
+      /* OR the lo/hi 32-bit of each DF component */
+      src_reg low = op[0];
+      low.swizzle = BRW_SWIZZLE_XZXZ;
+      src_reg high = op[0];
+      high.swizzle = BRW_SWIZZLE_YWYW;
+      dst_reg tmp_dst = dst_reg(this, glsl_type::uint_type);
+      tmp_dst.writemask = WRITEMASK_XY;
+      emit(OR(tmp_dst, low, high));
+
+      /* Now, compare the result to 0u */
+      src_reg  tmp_src = src_reg(tmp_dst);
+      tmp_src.swizzle = BRW_SWIZZLE_XYXY;
+      emit(CMP(dst, tmp_src, brw_imm_ud(0u), BRW_CONDITIONAL_NZ));
       break;
    }