àà ============= PEIM FSP v1.0 (_BDX-DE_ v0.0.3.3) ============= Register PPI Notify: DCD0BE23-9586-40F4-B643-06522CED4EDE Install PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3 Install PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A The 0th FV start address is 0x000FFEB1000, size is 0x0011F000, handle is 0x0 Register PPI Notify: 49EDB1C1-BF21-4761-BB12-EB0031AABB39 Register PPI Notify: EA7CA24B-DED5-4DAD-A389-BF827E8F9B38 Install PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6 Install PPI: DBE23AA9-A345-4B97-85B6-B226F1617389 Loading PEIM at 0x000FFEBAFD0 EntryPoint=0x000FFEBB0A0 PcdPeim.efi Install PPI: 06E81C58-4AD7-44BC-8390-F10265F72480 Install PPI: 01F34D25-4DE2-23AD-3FF3-36353FF323F1 Loading PEIM at 0x000FFEBF440 EntryPoint=0x000FFEBF510 SetupDefault.efi Install PPI: 57B195D1-E14B-40AD-A68F-9806000C436A Loading PEIM at 0x000FFEC2A34 EntryPoint=0x000FFEC2B0C PlatformInfo.efi enable all DMI VCx :: CPU Type Socket ModelId# 56 :: CPU stepping # 4 Install PPI: 1E2ACC41-E26A-483D-AFC7-A056C34E087B Publish PlatformInfoPPI Loading PEIM at 0x000FFEC5794 EntryPoint=0x000FFEC5864 MePolicyInitPei.efi Install PPI: 7AE3CEB7-2EE2-48FA-AA49-3510BC83CABF ME PEI Platform Policy PPI Installed Loading PEIM at 0x000FFEC7BCC EntryPoint=0x000FFEC7C94 HeciInit.efi Force an S5 exit path. Install PPI: E5EE2066-FAA1-4DFA-924E-B1E3A8EE30E8 Install PPI: EE0EA811-FBD9-4777-B95A-BA4F71101F74 Loading PEIM at 0x000FFECB434 EntryPoint=0x000FFECB4FC MeUma.efi Install PPI: 8C376010-2400-4D7D-B47B-9D851DF3C9D1 ME UMA: ME UMA PPI Installed Loading PEIM at 0x000FFECEB94 EntryPoint=0x000FFECEC64 SpsPei.efi [SPS] Waiting for ME firmware init complete [HECI-0] VID-DID: 8086-8C3A [HECI-0] MBAR not programmed, using default 0x00000000FEDB0000 [SPS] Sending ME-BIOS Interface Version request [HECI-0] Send msg: 80010020 [HECI-0] Got msg: 80050020 [SPS] SPS ME-BIOS interface version is 1.0 Feature set is 0x2106 [SPS] HOB: features 0x2106, flow 1, boot mode 0, cores to disable 0 Loading PEIM at 0x000FFED26DC EntryPoint=0x000FFED27BC UncoreInitPeim.efi OVERRIDING TOTAL SYSTEM CONFIGURATION WITH UPD upd->MemDdr4Platform = 0x0 tsc->DDR4Platform = 0x2 Halting the TCO Timer (Watchdog) Running on hardware Revision: 0 BIOSSIM: InitHeap() BIOSSIM: InitUSBDebug() BDX (1HA) processor detected CPU Stepping 4 Found CCMRC Version: 00500000 MRC Sync Number: 244071 RC Version: 02040000 host = FE191768 (pointer to sysHost structure) Legacy Serial Debug Enabled QPI Init starting... ******* QPI Setup Structure ******* PPINrOptIn: 0 Bus Ratio: 1 1 1 1 IO Ratio: 1 1 1 1 MMIOL Ratio: 1 1 1 1 LegacyVgaSoc: 0 MmioP2pDis: 0 IsocAzaliaVc1En: 0 DebugPrintLevel: 15 ClusterOnDieEn: 0 IBPECIEn: 1 E2EParityEn: 0 EarlySnoopEn: 1 HomeDirWOSBEn: 1 DegradePrecedence: 0 QpiLinkSpeedMode: 1 (FAST) QpiLinkSpeed: 6 QpiLinkL0pEn: 1 QpiLinkL1En: 1 QpiLinkL0rEn: 1 QpiLbEn: 0 IioUniphyDisable (per socket): 0 0 0 0 QpiLinkCreditReduce: 2 QpiConfigTxWci: 11 QpiCrcMode: 0 QpiCpuSktHotPlugEn: 0 QpiCpuSktHotPlugTopology: 0 QpiSkuMismatchCheck: 1 QpiPortDisable (per port): S0:0 0 S1:0 0 S2:0 0 S3:0 0 QpiLinkCreditReduce (per port): S0:0 0 S1:0 0 S2:0 0 S3:0 0 QpiLinkSpeed (per port): S0:6 6 S1:6 6 S2:6 6 S3:6 6 QpiProbeType (per port): S0:0 0 S1:0 0 S2:0 0 S3:0 0 QpiConfigTxWci (per port): S0:11 11 S1:11 11 S2:11 11 S3:11 11 Rsvd (per port): S0:0 0 S1:0 0 S2:0 0 S3:0 0 ******* Common Setup Structure ******* mmCfgBase: 0x80000000 mmCfgSize: 0x10000000 mmiolBase: 0x90000000 mmiolSize: 0x6C000000 mmiohBase: 0x00003800-00000000 mmiohSize: 256 GB numaEn: 1 isocEn: 0 mesegEn: 0 dcaEn: 1 ******* Common Var Structure ******* resetRequired: 0 state: 0 numCpus: 0 socketPresentBitMap: 0x01 busIio: 0x00 0x00 0x00 0x00 busUncore: 0x3F 0x00 0x00 0x00 mmCfgBase: 0x80000000 ;******* Collecting Early System Information - START ******* CAPID0[5] is set. SKU Detected as DE. SocketId: 0 Physical Chop: 4 SocketId: 0 CAPID5: 0x0600F9F9 SocketId: 0 CAPID4: 0x24080F43 SocketId: 0 CAPID3: 0x00930A20 SocketId: 0 CAPID2: 0x53B40000 SocketId: 0 CAPID1: 0x8C000787 SocketId: 0 CAPID0: 0x00188520 ; SBSP Socket: 0 SKU: 0x05 SubSKU: 0x00 Stepping: 0x04 CAPID4[sbsp]: 0x24080F43 ; Total Cbos: 12 Cbo List: 0xF9F9 Total HA: 01 Total R3Qpi: 00 Total QpiAgent: 00 ; TotCpus: 4 CpuList: 0x0F ; busIio: 0x00 0x40 0x80 0xC0 ; busUncore: 0x3F 0x7F 0xBF 0xFF ; Reset Type: Cold Reset Link Speed: Slow Speed ;******* Collecting Early System Information - END ******* ;******* Setting up Minimum Path - START ******* ; Constructing SBSP minimum path Topology Tree ; -------------------------------------------- ; Adding SBSP (CPU0) to the tree CPU0 Link Exchange UseQpiPcSts = 1 ;SBSP Minimum Path Tree ;---------------------- ;Index Socket ParentPort Hop ParentIndex ; 00 CPU0 -- 0 -- ;******* Setting up Minimum Path - END ******* ;******* Initialize MCTP - START ******* ;******* Initialize MCTP - END ******* ;******* Check for QPI Topology Degradation - START ******* ;Link Exchange Parameter ;----------------------- ;CPU0 ; Already Reduced to Supported Topology ; System will be treated 1S Configuration ;******* Check for QPI Topology Degradation - END ******* ;******* Checking QPIRC Input Structure - START ******* ; Sys configuration Type = 16 ;******* Checking QPIRC Input Structure - END ******* ;******* Allocate RTIDs - START ******* ; WB - 02 Ubox - 00 Local RTID PerCbo (base) - 10 Extra - 00 ; Local Base - 01 Reallocation Base - 65 ; Adjusting Cbo 06 base to Reallocation base ; RTID Allocation Table ; --------------------- ; Local ; ----- ; WB 0 1 ; UBOX 0 0 ; ISOC 0 0 ; CBO00 1 5 ; CBO00 6 5 ; CBO01 11 6 ; CBO01 17 5 ; CBO02 22 5 ; CBO02 27 5 ; CBO03 32 6 ; CBO03 38 5 ; CBO04 43 5 ; CBO04 48 5 ; CBO05 53 6 ; CBO05 59 5 ; CBO06 65 6 ; CBO06 71 5 ; CBO07 76 5 ; CBO07 81 5 ; CBO08 86 6 ; CBO08 92 5 ; CBO09 97 5 ; CBO09 102 5 ; CBO10 107 6 ; CBO10 113 5 ; CBO11 118 5 ; CBO11 123 5 ; EXTRA 0 0 ;******* Allocate RTIDs - END ******* ;******* Cacluate Resource Allocation - START ******* ;CPU Resource Allocation ;----------------------- ;CPU0 Bus: 0x00 - 0xFF IO: 0x0000 - 0xFFFF IOAPIC: 0xFEC00000 - 0xFEC3FFFF MMIOL: 0x90000000 - 0xFBFFFFFF MMIOH: 0x00003800 00000000 - 0x0000383F FFFFFFFF ;******* Cacluate Resource Allocation - END ******* ;******* Programming RTIDs and other Credits - START ******* ;******* Programming RTIDs and other Credits - END ******* ;******* Sync Up PBSPs - START ******* ; Setting Ubox Sticky SR07 to 0x00000000 ; Setting Ubox Sticky SR03 to 0x20000007 ; Setting Ubox Sticky SR02 to 0x00000001 ; Verifying if the remote socket(s) checked-in. ;******* Sync Up PBSPs - END ******* ;******* Programming MSR for w/a - START ******* ;******* Programming MSR for w/a - END ******* ;******* Programming BGF Overrides - START ******* ; Wait for mailbox ready ; Send Data portion of command. Socket = 0 Data sent == 0x0 ; Send Pcode mailbox command. Socket = 0 Command sent == 0x7D ; Wait for mailbox ready ; Wait for mailbox ready ; Send Data portion of command. Socket = 0 Data sent == 0x11 ; Send Pcode mailbox command. Socket = 0 Command sent == 0x17D ; Wait for mailbox ready ; Wait for mailbox ready ; Send Data portion of command. Socket = 0 Data sent == 0x0 ; Send Pcode mailbox command. Socket = 0 Command sent == 0x27D ; Wait for mailbox ready ; Wait for mailbox ready ; Send Data portion of command. Socket = 0 Data sent == 0x0 ; Send Pcode mailbox command. Socket = 0 Command sent == 0x37D ; Wait for mailbox ready ; Wait for mailbox ready ; Send Data portion of command. Socket = 0 Data sent == 0x0 ; Send Pcode mailbox command. Socket = 0 Command sent == 0x47D ; Wait for mailbox ready ;******* Programming BGF Overrides - END ******* ;******* Full Speed Transition - START ******* ; ;Single Socket, no QPI Links to transition ; Force unused links to disabled/low power state. ; Clr PhyInitBegin on Socket 0 Link 0 : QPIREUT_PH_CTR write 0xFFFFFFDF Set force_l1 on Socket 0 Link 0 : QPIPHYPWRCTRL write 0xFFFFFFFF ; Clr PhyInitBegin on Socket 0 Link 1 : QPIREUT_PH_CTR write 0xFFFFFFDF Set force_l1 on Socket 0 Link 1 : QPIPHYPWRCTRL write 0xFFFFFFFF ;******* Full Speed Transition - END ******* ;******* Cod Activate - START ******* ;******* Cod Activate - END ******* ******* QPI Output Structure ******* OutLegacyVgaSoc: 0 OutIsocEn: 0 OutMesegEn: 0 OutIsocAzaliaVc1En: 0 OutClusterOnDieEn: 0 OutIBPECIEn: 1 OutE2EParityEn: 0 OutEarlySnoopEn: 1 OutHomeDirWOSBEn: 0 QpiCurrentLinkSpeedMode: 0 (SLOW) OutQpiLinkSpeed: 6 OutQpiLinkL0pEn: 1 OutQpiLinkL1En: 1 OutQpiLinkL0rEn: 1 OutIioUniphyDisable: 0, 0, 0, 0 OutQpiCrcMode: 0 OutClusterOnDieReduction: 0 OutPointerSeperationHA: 0 QpiInternalGlobal->BtModeEn: 0 QpiInternalGlobal->BtMode: 0 QpiInternalGlobal->BtMode2Alt: 0 QpiInternalGlobal->Sys4SClusterOnDieEn: 0 QpiInternalGlobal->SnoopFanoutEn: 0 QpiInternalGlobal->SysSnoopMode: 0 QpiInternalGlobal->IodcEn: 0 ;******* QPIRC Exit ******* QPI Init completed! Reset Requested: 2 Pipe Init starting...Pipe Init completed! Reset Requested: 2 CPU Feature Early Config starting... CAPID0[5] is set. SKU Detected as DE.CPU Feature Early Config completed! Reset Requested: 2 START_MRC_RUN ME UMA: ME UMA Size Requested: 0 ME UMA size = 0 MBytes forceColdBoot bit set Get socket PPIN N0: PPIN Hi = 0x53AA0A9B, PPIN Lo = 0xC9D25DA1 setupChanged: 1 Clearing the MRC NVRAM structure. bootMode = NormalBoot subBootMode = ColdBoot Dispatch Slaves -- Started Dispatch Slaves - 0ms Promote Warning Exception List -- Started Promote Warning Exception List - 0ms Initialize Throttling Early -- Started Initialize Throttling Early - 0ms Detect DIMM Configuration -- Started Detect DIMM Configuration - 0ms Get Slave Data -- Started Get Slave Data - 0ms Check POR Compatibility -- Started SODIMM population Check POR Compatibility - 2ms Initialize DDR Clocks -- Started GetPORDDRFreq returns ddrfreq = 10 Reset requested: non-MRC MRC reset request! Current DCLK: 12 Desired DCLK: 14, req_type = 0 Initialize DDR Clocks - 13ms Send Status -- Started Send Status -- EXIT, status = 2h Total MRC time = 60ms Setting Last Boot Date = 7317 days STOP_MRC_RUN Reset Requested: 2 Pipe Exit starting...Pipe Exit completed! Reset Requested: 2 Checking for Reset Requests ... Send HostResetWarning notification to ME. ME UMA: WARNING: HostResetWarning called on non S3/4 resume flow (0) - ignored HostResetWarning notification Complete. Issue WARM RESET! BIOS done set ============= PEIM FSP v1.0 (_BDX-DE_ v0.0.3.3) ============= Register PPI Notify: DCD0BE23-9586-40F4-B643-06522CED4EDE Install PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3 Install PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A The 0th FV start address is 0x000FFEB1000, size is 0x0011F000, handle is 0x0 Register PPI Notify: 49EDB1C1-BF21-4761-BB12-EB0031AABB39 Register PPI Notify: EA7CA24B-DED5-4DAD-A389-BF827E8F9B38 Install PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6 Install PPI: DBE23AA9-A345-4B97-85B6-B226F1617389 Loading PEIM at 0x000FFEBAFD0 EntryPoint=0x000FFEBB0A0 PcdPeim.efi Install PPI: 06E81C58-4AD7-44BC-8390-F10265F72480 Install PPI: 01F34D25-4DE2-23AD-3FF3-36353FF323F1 Loading PEIM at 0x000FFEBF440 EntryPoint=0x000FFEBF510 SetupDefault.efi Install PPI: 57B195D1-E14B-40AD-A68F-9806000C436A Loading PEIM at 0x000FFEC2A34 EntryPoint=0x000FFEC2B0C PlatformInfo.efi enable all DMI VCx :: CPU Type Socket ModelId# 56 :: CPU stepping # 4 Install PPI: 1E2ACC41-E26A-483D-AFC7-A056C34E087B Publish PlatformInfoPPI Loading PEIM at 0x000FFEC5794 EntryPoint=0x000FFEC5864 MePolicyInitPei.efi Install PPI: 7AE3CEB7-2EE2-48FA-AA49-3510BC83CABF ME PEI Platform Policy PPI Installed Loading PEIM at 0x000FFEC7BCC EntryPoint=0x000FFEC7C94 HeciInit.efi Force an S5 exit path. Install PPI: E5EE2066-FAA1-4DFA-924E-B1E3A8EE30E8 Install PPI: EE0EA811-FBD9-4777-B95A-BA4F71101F74 Loading PEIM at 0x000FFECB434 EntryPoint=0x000FFECB4FC MeUma.efi Install PPI: 8C376010-2400-4D7D-B47B-9D851DF3C9D1 ME UMA: ME UMA PPI Installed Loading PEIM at 0x000FFECEB94 EntryPoint=0x000FFECEC64 SpsPei.efi [SPS] Waiting for ME firmware init complete [HECI-0] VID-DID: 8086-8C3A [HECI-0] MBAR not programmed, using default 0x00000000FEDB0000 [SPS] Sending ME-BIOS Interface Version request [HECI-0] Send msg: 80010020 [HECI-0] Got msg: 80050020 [SPS] SPS ME-BIOS interface version is 1.0 Feature set is 0x2106 [SPS] HOB: features 0x2106, flow 1, boot mode 0, cores to disable 0 Loading PEIM at 0x000FFED26DC EntryPoint=0x000FFED27BC UncoreInitPeim.efi OVERRIDING TOTAL SYSTEM CONFIGURATION WITH UPD upd->MemDdr4Platform = 0x0 tsc->DDR4Platform = 0x2 Halting the TCO Timer (Watchdog) Running on hardware Revision: 0 BIOSSIM: InitHeap() BIOSSIM: InitUSBDebug() BDX (1HA) processor detected CPU Stepping 4 Found CCMRC Version: 00500000 MRC Sync Number: 244071 RC Version: 02040000 host = FE191768 (pointer to sysHost structure) Legacy Serial Debug Enabled QPI Init starting... ******* QPI Setup Structure ******* PPINrOptIn: 0 Bus Ratio: 1 1 1 1 IO Ratio: 1 1 1 1 MMIOL Ratio: 1 1 1 1 LegacyVgaSoc: 0 MmioP2pDis: 0 IsocAzaliaVc1En: 0 DebugPrintLevel: 15 ClusterOnDieEn: 0 IBPECIEn: 1 E2EParityEn: 0 EarlySnoopEn: 1 HomeDirWOSBEn: 1 DegradePrecedence: 0 QpiLinkSpeedMode: 1 (FAST) QpiLinkSpeed: 6 QpiLinkL0pEn: 1 QpiLinkL1En: 1 QpiLinkL0rEn: 1 QpiLbEn: 0 IioUniphyDisable (per socket): 0 0 0 0 QpiLinkCreditReduce: 2 QpiConfigTxWci: 11 QpiCrcMode: 0 QpiCpuSktHotPlugEn: 0 QpiCpuSktHotPlugTopology: 0 QpiSkuMismatchCheck: 1 QpiPortDisable (per port): S0:0 0 S1:0 0 S2:0 0 S3:0 0 QpiLinkCreditReduce (per port): S0:0 0 S1:0 0 S2:0 0 S3:0 0 QpiLinkSpeed (per port): S0:6 6 S1:6 6 S2:6 6 S3:6 6 QpiProbeType (per port): S0:0 0 S1:0 0 S2:0 0 S3:0 0 QpiConfigTxWci (per port): S0:11 11 S1:11 11 S2:11 11 S3:11 11 Rsvd (per port): S0:0 0 S1:0 0 S2:0 0 S3:0 0 ******* Common Setup Structure ******* mmCfgBase: 0x80000000 mmCfgSize: 0x10000000 mmiolBase: 0x90000000 mmiolSize: 0x6C000000 mmiohBase: 0x00003800-00000000 mmiohSize: 256 GB numaEn: 1 isocEn: 0 mesegEn: 0 dcaEn: 1 ******* Common Var Structure ******* resetRequired: 0 state: 0 numCpus: 0 socketPresentBitMap: 0x01 busIio: 0x00 0x00 0x00 0x00 busUncore: 0xFF 0x00 0x00 0x00 mmCfgBase: 0x80000000 ;******* Collecting Early System Information - START ******* CAPID0[5] is set. SKU Detected as DE. SocketId: 0 Physical Chop: 4 SocketId: 0 CAPID5: 0x0600F9F9 SocketId: 0 CAPID4: 0x24080F43 SocketId: 0 CAPID3: 0x00930A20 SocketId: 0 CAPID2: 0x53B40000 SocketId: 0 CAPID1: 0x8C000787 SocketId: 0 CAPID0: 0x00188520 ; SBSP Socket: 0 SKU: 0x05 SubSKU: 0x00 Stepping: 0x04 CAPID4[sbsp]: 0x24080F43 ; Total Cbos: 12 Cbo List: 0xF9F9 Total HA: 01 Total R3Qpi: 00 Total QpiAgent: 00 ; TotCpus: 1 CpuList: 0x01 ; busIio: 0x00 ; busUncore: 0xFF ; Reset Type: Warm Reset Link Speed: Slow Speed ;******* Collecting Early System Information - END ******* ;******* Setting up Minimum Path - START ******* ; Constructing SBSP minimum path Topology Tree ; -------------------------------------------- ; Adding SBSP (CPU0) to the tree CPU0 Link Exchange UseQpiPcSts = 1 ;SBSP Minimum Path Tree ;---------------------- ;Index Socket ParentPort Hop ParentIndex ; 00 CPU0 -- 0 -- ;******* Setting up Minimum Path - END ******* ;******* Initialize MCTP - START ******* ;******* Initialize MCTP - END ******* ;******* Check for QPI Topology Degradation - START ******* ;Link Exchange Parameter ;----------------------- ;CPU0 ; Already Reduced to Supported Topology ; System will be treated 1S Configuration ;******* Check for QPI Topology Degradation - END ******* ;******* Checking QPIRC Input Structure - START ******* ; Sys configuration Type = 16 ;******* Checking QPIRC Input Structure - END ******* ;******* Allocate RTIDs - START ******* ; WB - 02 Ubox - 00 Local RTID PerCbo (base) - 10 Extra - 00 ; Local Base - 01 Reallocation Base - 65 ; Adjusting Cbo 06 base to Reallocation base ; RTID Allocation Table ; --------------------- ; Local ; ----- ; WB 0 1 ; UBOX 0 0 ; ISOC 0 0 ; CBO00 1 5 ; CBO00 6 5 ; CBO01 11 6 ; CBO01 17 5 ; CBO02 22 5 ; CBO02 27 5 ; CBO03 32 6 ; CBO03 38 5 ; CBO04 43 5 ; CBO04 48 5 ; CBO05 53 6 ; CBO05 59 5 ; CBO06 65 6 ; CBO06 71 5 ; CBO07 76 5 ; CBO07 81 5 ; CBO08 86 6 ; CBO08 92 5 ; CBO09 97 5 ; CBO09 102 5 ; CBO10 107 6 ; CBO10 113 5 ; CBO11 118 5 ; CBO11 123 5 ; EXTRA 0 0 ;******* Allocate RTIDs - END ******* ;******* Cacluate Resource Allocation - START ******* ;CPU Resource Allocation ;----------------------- ;CPU0 Bus: 0x00 - 0xFF IO: 0x0000 - 0xFFFF IOAPIC: 0xFEC00000 - 0xFEC3FFFF MMIOL: 0x90000000 - 0xFBFFFFFF MMIOH: 0x00003800 00000000 - 0x0000383F FFFFFFFF ;******* Cacluate Resource Allocation - END ******* ;******* Check for QPI Topology change across reset - START ******* ;******* Check for QPI Topology change across reset - END ******* ;******* Phy/Link Updates On Warm Reset - START ******* ; Force unused links to disabled/low power state. ; Clr PhyInitBegin on Socket 0 Link 0 : QPIREUT_PH_CTR write 0xFFFFFFDF Set force_l1 on Socket 0 Link 0 : QPIPHYPWRCTRL write 0xFFFFFFFF ; Clr PhyInitBegin on Socket 0 Link 1 : QPIREUT_PH_CTR write 0xFFFFFFDF Set force_l1 on Socket 0 Link 1 : QPIPHYPWRCTRL write 0xFFFFFFFF ;******* Phy/Link Updates On Warm Reset - END ******* ;******* Sync Up PBSPs - START ******* ; Verifying if the remote socket(s) checked-in. ;******* Sync Up PBSPs - END ******* ; Wait for mailbox ready ; Send Data portion of command. Socket = 0 Data sent == 0x0 ; Send Pcode mailbox command. Socket = 0 Command sent == 0x91 ; Wait for mailbox ready ;******* Topology Dicovery and Optimum Route Calculation - START ******* ; Locating the Rings Present in the Topology ; No Rings Found ; Constructing Topology Tree ; Adjacency Table ; ---------------- ; Checking for Deadlock... ;CPU0 Topology Tree ;------------------- ;Index Socket ParentSocket ParentPort ParentIndex Hop ; 00 CPU0 -- -- -- 0 ; ; Calculating Route for CPU0 ;CPU 0 Routing Table ;------------------- ;DestSocket Port ;******* Topology Dicovery and Optimum Route Calculation - END ******* ;******* Program Optimum Route Table Settings - START ******* ;******* Program Optimum Route Table Settings - END ******* ;******* Program Final IO SAD Setting - START ******* ;******* Program Final IO SAD Setting - END ******* ;******* Program Misc. QPI Parameters - START ******* Lock QPI DFX. ;******* Program Misc. QPI Parameters - END ******* ;******* Program Home Agent Credits - START ******* ;******* Program Home Agent Credits - END ******* ;******* Program Home tracker and Route Back Table - START ******* ;******* Program Home tracker and Route Back Table - END ******* ;******* Program System Coherency Registers - START ******* ;******* Program System Coherency Registers - END ******* ;******* Check for S3 Resume - START ******* ;******* Check for S3 Resume - END ******* ;******* Collect Previous Boot Error - START ******* ;******* Collect Previous Boot Error - END ******* ******* QPI Output Structure ******* OutLegacyVgaSoc: 0 OutIsocEn: 0 OutMesegEn: 0 OutIsocAzaliaVc1En: 0 OutClusterOnDieEn: 0 OutIBPECIEn: 1 OutE2EParityEn: 0 OutEarlySnoopEn: 1 OutHomeDirWOSBEn: 0 QpiCurrentLinkSpeedMode: 0 (SLOW) OutQpiLinkSpeed: 6 OutQpiLinkL0pEn: 1 OutQpiLinkL1En: 1 OutQpiLinkL0rEn: 1 OutIioUniphyDisable: 0, 0, 0, 0 OutQpiCrcMode: 0 OutClusterOnDieReduction: 0 OutPointerSeperationHA: 0 QpiInternalGlobal->BtModeEn: 0 QpiInternalGlobal->BtMode: 0 QpiInternalGlobal->BtMode2Alt: 0 QpiInternalGlobal->Sys4SClusterOnDieEn: 0 QpiInternalGlobal->SnoopFanoutEn: 0 QpiInternalGlobal->SysSnoopMode: 0 QpiInternalGlobal->IodcEn: 0 ;******* QPIRC Exit ******* QPI Init completed! Reset Requested: 0 Pipe Init starting...Pipe Init completed! Reset Requested: 0 CPU Feature Early Config starting... CAPID0[5] is set. SKU Detected as DE.CPU Feature Early Config completed! Reset Requested: 0 PrevBootErrors - CBO mcbank: 18 - not present; skipping... PrevBootErrors - CBO mcbank: 19 - not present; skipping... PrevBootErrors - Valid MCA UC entries: 0 START_MRC_RUN ME UMA: ME UMA Size Requested: 0 ME UMA size = 0 MBytes forceColdBoot bit set Get socket PPIN N0: PPIN Hi = 0x53AA0A9B, PPIN Lo = 0xC9D25DA1 setupChanged: 1 Clearing the MRC NVRAM structure. bootMode = NormalBoot subBootMode = ColdBoot Dispatch Slaves -- Started Dispatch Slaves - 0ms Promote Warning Exception List -- Started Promote Warning Exception List - 0ms Initialize Throttling Early -- Started Initialize Throttling Early - 0ms Detect DIMM Configuration -- Started Detect DIMM Configuration - 0ms Get Slave Data -- Started Get Slave Data - 0ms Check POR Compatibility -- Started SODIMM population Check POR Compatibility - 2ms Initialize DDR Clocks -- Started GetPORDDRFreq returns ddrfreq = 10 Memory behind processor 0 running at DDR-1867 Initialize DDR Clocks - 8ms Send Status -- Started Send Status - 0ms Set Vdd -- Started Set Vdd - 0ms Check DIMM Ranks -- Started Check DIMM Ranks - 0ms Send Data -- Started Send Data - 0ms Initialize Memory -- Started Initialize Memory - 0ms Gather SPD Data -- Started Gather SPD Data - 0ms Configure XMP -- Started Configure XMP - 0ms Platform NVDIMM Status -- Started N0: CoreNVDIMMStatus Platform NVDIMM Status - 2ms Early Configuration -- Started Early Configuration - 1ms DDRIO Initialization -- Started N0.C0: Number of DIMMS in channel: 1 DDRIO Initialization - 66ms Pre-Training Initialization -- Started Pre-Training Initialization - 0ms Early CTL/CLK -- Started Early CTL/CLK - 21ms Early CMD/CLK -- Started Early CMD/CLK - 160ms Lrdimm BS Phase RX -- Started Lrdimm BS Phase RX - 0ms Lrdimm BS Cycle RX -- Started Lrdimm BS Cycle RX - 0ms Lrdimm BS Delay RX -- Started Lrdimm BS Delay RX - 0ms Receive Enable -- Started Receive Enable - 4ms Rx Dq/Dqs Basic -- Started Rx Dq/Dqs Basic - 1ms Lrdimm BS Fine WL -- Started Lrdimm BS Fine WL - 0ms Lrdimm BS Coarse WL -- Started Lrdimm BS Coarse WL - 0ms Lrdimm BS Delay TX -- Started Lrdimm BS Delay TX - 0ms Write Leveling -- Started Write Leveling - 5ms Write Fly By -- Started Write Fly By - 1ms Tx Dq Basic -- Started Tx Dq Basic - 4ms PPR Flow -- Started PPR Flow - 0ms Wr Early Vref Centering -- Started Wr Early Vref Centering - 12ms Rd Early Vref Centering -- Started Rd Early Vref Centering - 13ms CMD Vref Centering -- Started CMD Vref Centering - 13ms Late Cmd/Clk -- Started Late Cmd/Clk - 20ms Tx Eq -- Started Tx Eq - 169ms Imode -- Started Imode - 0ms CTLE -- Started CTLE - 141ms Tx Per Bit Deskew -- Started Tx Per Bit Deskew - 3ms Rx Per Bit Deskew -- Started Rx Per Bit Deskew - 4ms Wr Vref Centering (LRDIMM) -- Started Wr Vref Centering (LRDIMM) - 0ms Rd Vref Centering (LRDIMM) -- Started Rd Vref Centering (LRDIMM) - 0ms Wr Dq Centering (LRDIMM) -- Started Wr Dq Centering (LRDIMM) - 0ms Rd Dq Centering (LRDIMM) -- Started Rd Dq Centering (LRDIMM) - 0ms Wr Vref Centering -- Started Wr Vref Centering - 25ms Rd Vref Centering -- Started Rd Vref Centering - 37ms Tx Dq Adv -- Started Tx Dq Adv - 58ms Rx Dq/Dqs Adv -- Started Rx Dq/Dqs Adv - 66ms Round Trip Optimization -- Started Round Trip Optimization - 0ms Display Training Results -- Started Display Training Results - 0ms Post-Training Initialization -- Started N0.C0: t_rrdr = 1, t_rrdd = 1 Post-Training Initialization - 3ms Rank Margin Tool -- Started Rank Margin Tool - 0ms Fill BDAT Structure -- Started Fill BDAT Structure - 0ms Platform Restore NVDIMMs -- Started Platform Restore NVDIMMs - 0ms Platform Arm NVDIMMs -- Started Platform Arm NVDIMMs - 0ms Late Configuration -- Started Late Configuration - 0ms Initialize Throttling -- Started Initialize Throttling - 2ms Advanced MemTest -- Started Advanced MemTest - 0ms MemTest -- Started N0.C0.D0.R0: MemTest Failure! N0.C0.D0.R0: B0:B3 = 0xFFFEFFFE N0.C0.D0.R0: B4:B7 = 0xFFFFFFFF N0.C0.D0.R0: ECC = 0xFE N0.C0.D0.R0: FPT strobe = 0! N0.C0.D0.R0: FPT strobe = 1! N0.C0.D0.R0: FPT strobe = 2! N0.C0.D0.R0: FPT strobe = 3! N0.C0.D0.R0: FPT strobe = 4! N0.C0.D0.R0: FPT strobe = 5! N0.C0.D0.R0: FPT strobe = 6! N0.C0.D0.R0: FPT strobe = 7! N0.C0.D0.R0: FPT strobe = 8! N0.C0.D0.R0: MemTest Failure! N0.C0.D0.R0: B0:B3 = 0xFFFEFFFE N0.C0.D0.R0: B4:B7 = 0xFFFFFFFF N0.C0.D0.R0: ECC = 0xFE N0.C0.D0.R0: FPT strobe = 0! N0.C0.D0.R0: FPT strobe = 1! N0.C0.D0.R0: FPT strobe = 2! N0.C0.D0.R0: FPT strobe = 3! N0.C0.D0.R0: FPT strobe = 4! N0.C0.D0.R0: FPT strobe = 5! N0.C0.D0.R0: FPT strobe = 6! N0.C0.D0.R0: FPT strobe = 7! N0.C0.D0.R0: FPT strobe = 8! A warning has been logged! Warning Code = 0xB, Minor Warning Code = 0x1C, Data = 0x0 S0 Ch0 DIMM0 Rank0 MemTest - 2497ms MemInit -- Started MemInit - 0ms Check Ras Support After MemInit -- Started Check Ras Support After MemInit - 0ms Switch to Normal Mode -- Started Switch to Normal Mode - 0ms Get NVRAM Data -- Started Get NVRAM Data - 0ms Initialize Memory Map -- Started All channels disabled due to Memory Test failures! No Memory to map! A Error logged! Error Code = 0xE8, Minor Error Code = 0x2, Data = 0xFFFFFFFF FatalError: SocketId = 0 registered Major Code = 0xE8, Minor Code = 0x 2