From 0cce610d008b064b7ed73f6fa0b6552cb8947f1e Mon Sep 17 00:00:00 2001
From: Paul King <pking@jlab.org>
Date: Tue, 5 Feb 2019 17:47:36 -0500
Subject: [PATCH] Updating .map files with new unser placed in 4th (of 5) CH
 ADCs and modified sync test scalers

---
 Parity/prminput/prexCH_beamline.1194-.map | 65 +++++++++++++++++++++++
 Parity/prminput/prexCH_scaler.1194-.map   |  9 ++++
 Parity/prminput/prex_scaler.1194-.map     | 21 ++++++++
 3 files changed, 95 insertions(+)
 create mode 100644 Parity/prminput/prexCH_beamline.1194-.map
 create mode 100644 Parity/prminput/prexCH_scaler.1194-.map
 create mode 100644 Parity/prminput/prex_scaler.1194-.map

diff --git a/Parity/prminput/prexCH_beamline.1194-.map b/Parity/prminput/prexCH_beamline.1194-.map
new file mode 100644
index 000000000..9196e9036
--- /dev/null
+++ b/Parity/prminput/prexCH_beamline.1194-.map
@@ -0,0 +1,65 @@
+
+ROC=23
+Bank=0x05
+vqwk_buffer_offset = 1
+!same sample size for ADCs in a given bank
+sample_size=16564
+!Sample size should be unchanged - ask Paul King
+!
+! module.type, module.num  chan.num, det.type, det.name, if unrotated then last column ->UNROTATED
+
+
+!ADC0
+    VQWK, 0, 0,  bcm,  QWK_0_0
+    VQWK, 0, 1,  bcm,  QWK_0_1
+    VQWK, 0, 2,  bcm,  BCM_US
+    VQWK, 0, 3,  bcm,  BCM_DS
+    VQWK, 0, 4,  bcm,  QWK_0_4
+    VQWK, 0, 5,  bcm,  QWK_0_5
+    VQWK, 0, 6,  bcm,  QWK_0_6
+    VQWK, 0, 7,  bcm,  QWK_0_7
+
+!ADC1
+    VQWK, 1, 0,  bpmstripline,  BPM4Exp
+    VQWK, 1, 1,  bpmstripline,  BPM4Exm
+    VQWK, 1, 2,  bpmstripline,  BPM4Eyp
+    VQWK, 1, 3,  bpmstripline,  BPM4Eym
+    VQWK, 1, 4,  bcm,  QWK_1_4
+    VQWK, 1, 5,  bcm,  QWK_1_5
+    VQWK, 1, 6,  bcm,  QWK_1_6
+    VQWK, 1, 7,  bcm,  QWK_1_7
+
+!ADC2
+    VQWK, 2, 0,  bcm,  QWK_2_0
+    VQWK, 2, 1,  bcm,  QWK_2_1
+    VQWK, 2, 2,  bcm,  QWK_2_2
+    VQWK, 2, 3,  bcm,  QWK_2_3
+    VQWK, 2, 4,  bpmstripline,  BPM4Axp
+    VQWK, 2, 5,  bpmstripline,  BPM4Axm
+    VQWK, 2, 6,  bpmstripline,  BPM4Ayp
+    VQWK, 2, 7,  bpmstripline,  BPM4Aym
+
+!ADC3
+    VQWK, 3, 0,  bcm,  CAV4BX
+    VQWK, 3, 1,  bcm,  CAV4BY
+    VQWK, 3, 2,  bcm,  CAV4BQ
+    VQWK, 3, 3,  bcm,  QWK_3_3
+    VQWK, 3, 4,  bcm,  CAV4CX
+    VQWK, 3, 5,  bcm,  CAV4CY
+    VQWK, 3, 6,  bcm,  CAV4CQ
+    VQWK, 3, 7,  bcm,  unser
+
+!ADC4
+    VQWK, 4, 0,  bcm,  CAV4DX
+    VQWK, 4, 1,  bcm,  CAV4DY
+    VQWK, 4, 2,  bcm,  CAV4DQ
+    VQWK, 4, 3,  bcm,  QWK_4_3
+    VQWK, 4, 4,  bcm,  QWK_4_4
+    VQWK, 4, 5,  bcm,  QWK_4_5
+    VQWK, 4, 6,  bcm,  QWK_4_6
+    VQWK, 4, 7,  bcm,  QWK_4_7
+
+
+[PUBLISH]
+! new.tree.variable.name, analysis.class, old.tree.variable.name, element.to.store
+  q_targ, bcm, bcm_us, c
diff --git a/Parity/prminput/prexCH_scaler.1194-.map b/Parity/prminput/prexCH_scaler.1194-.map
new file mode 100644
index 000000000..2ed2fd09d
--- /dev/null
+++ b/Parity/prminput/prexCH_scaler.1194-.map
@@ -0,0 +1,9 @@
+ROC=23
+bank=0x2
+! module.type  module.num  chan.num, det.type, det.name
+  SIS3801D32, 0,   0, bmwscal, bmwscal
+  SIS3801D32, 0,   16, syncscal, chouse_fr
+  SIS3801D32, 0,   17, syncscal, chouse_f1
+  SIS3801D32, 0,   18, syncscal, chouse_f2
+  SIS3801D32, 0,   31, syncscal, clock_4mhz
+
diff --git a/Parity/prminput/prex_scaler.1194-.map b/Parity/prminput/prex_scaler.1194-.map
new file mode 100644
index 000000000..94039682a
--- /dev/null
+++ b/Parity/prminput/prex_scaler.1194-.map
@@ -0,0 +1,21 @@
+ROC=23
+bank=0x2
+! module.type  module.num  chan.num, det.type, det.name
+  SIS3801D32, 0,   16, syncscal, chouse_fr
+  SIS3801D32, 0,   17, syncscal, chouse_f1
+  SIS3801D32, 0,   18, syncscal, chouse_f2
+  SIS3801D32, 0,   31, syncscal, clock_4mhz
+
+ROC=25
+bank=0x2
+! module.type  module.num  chan.num, det.type, det.name
+  SIS3801D32, 0,   30, syncscal, lhrs_f1
+  SIS3801D32, 0,   31, syncscal, lhrs_f2
+
+ROC=26
+bank=0x2
+! module.type  module.num  chan.num, det.type, det.name
+  SIS3801D32, 0,   30, syncscal, rhrs_f1
+  SIS3801D32, 0,   31, syncscal, rhrs_f2
+
+!!!  Also should be scalers in the injector...