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Rewrite rp2040 boot2 in Ada. Currently broken, need a CRC32 at the end
of the .boot2 section for the boot ROM to verify. I don't know how to do that.
1 parent 46ec61c commit f762c78

5 files changed

Lines changed: 921 additions & 2 deletions

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arm/cortexm.py

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1107,6 +1107,7 @@ def __init__(self, smp):
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'arm/rpi/rp2040/svd/i-rp2040-sio.ads',
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'arm/rpi/rp2040/svd/i-rp2040-timer.ads',
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'arm/rpi/rp2040/svd/i-rp2040-watchdog.ads',
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'arm/rpi/rp2040/svd/i-rp2040-xip_ssi.ads',
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'arm/rpi/rp2040/svd/i-rp2040-xosc.ads',
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'arm/rpi/rp2040/s-bbmcpa.ads.tmpl',
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'arm/rpi/rp2040/start-rom.S.tmpl',
@@ -1187,7 +1188,8 @@ def __init__(self, smp):
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loader='RAM')
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self.add_gnat_sources(
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'arm/rpi/rp2040/boot2__w25q080.S',)
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'arm/rpi/rp2040/boot2.adb',
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'arm/rpi/rp2040/boot2_generic_03.ads')
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class CortexM1(ArmV6MTarget):

arm/rpi/rp2040/boot2.adb

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,28 @@
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-- The SSI cannot be configured while enabled, so the boot ROM copies the
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-- first 256 bytes of flash (referred to by the linker as .boot2) to SRAM and
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-- executes it. This procedure should disable SSI, configure it for the flash
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-- chip in use, re-enable SSI, then jump to the reset vector in XIP memory.
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--
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-- This is the generic version for all SPI flash chips that respond to the
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-- 0x03 read command.
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with Interfaces.RP2040.XIP_SSI; use Interfaces.RP2040.XIP_SSI;
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with Boot2_Generic_03; use Boot2_Generic_03;
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procedure Boot2
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with Linker_Section => ".boot2"
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is
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begin
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-- Disable SSI
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XIP_SSI_Periph.SSIENR.SSI_EN := False;
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-- Configure SSI
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XIP_SSI_Periph.BAUDR := BAUDR;
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XIP_SSI_Periph.CTRLR0 := CTRLR0;
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XIP_SSI_Periph.SPI_CTRLR0 := SPI_CTRLR0;
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-- Single 32b read XXX why is this here????
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XIP_SSI_Periph.CTRLR1.NDF := 0;
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-- Enable SSI
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XIP_SSI_Periph.SSIENR.SSI_EN := True;
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end Boot2;
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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,22 @@
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with Interfaces.RP2040.XIP_SSI; use Interfaces.RP2040.XIP_SSI;
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package Boot2_Generic_03 is
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-- Clock divider for flash, must be even (clk_sys / SCKDV)
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BAUDR : constant BAUDR_Register :=
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(SCKDV => 4,
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others => <>);
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CTRLR0 : constant CTRLR0_Register :=
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(DFS_32 => 31, -- Data frame size (minus 1)
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SPI_FRF => STD, -- Frame format
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TMOD => EEPROM_READ, -- Transfer mode
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others => <>);
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SPI_CTRLR0 : constant SPI_CTRLR0_Register :=
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(TRANS_TYPE => Val_1C1A, -- Command and address frame format
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ADDR_L => 6, -- Address bits divided by 4
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INST_L => Val_8B, -- Instruction length
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WAIT_CYCLES => 0, -- Clocks after mode bits
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XIP_CMD => 16#03#, -- SPI read command
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others => <>);
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end Boot2_Generic_03;

arm/rpi/rp2040/start-rom.S.tmpl

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -171,4 +171,4 @@ __gnat_sys_tick_trap:
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fault: b fault
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/* Hack to force the linker to link boot2.o */
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.word __boot2
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.word _ada_boot2

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