Joseph Jarriel JobenNC
- Deep-Packet-Inspector 0 A deep packet inspector written in Verilog for ECE 310.
- Documentation-Examples 0 Some technical documentation I've written and contributed to.
- ECE-466-MiniC-IR-Generator 0 Lex, parse, and generate LLVM IR for the MiniC subset language.
- ECE306 0 ECE306 Code and stuff
- ECE463-WBWA-Cache-Simulation 0 Simulate and profile WBWA caches of n-level heirarchies with arbitrary associativity, block size, and size.
Contributions in the last year 43 total Oct 7, 2014 – Oct 7, 2015
Longest streak 6 days November 1 – November 6
Current streak 0 days Last contributed