From a45e49f75cc4b10cdda50200c6091ca0e6b17208 Mon Sep 17 00:00:00 2001 From: Jonathan Date: Fri, 27 Nov 2015 18:01:23 +0800 Subject: [PATCH] Correct plt debug display --- lbdex/verilog/dynlinker.v | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/lbdex/verilog/dynlinker.v b/lbdex/verilog/dynlinker.v index 3a0925e..9eed796 100755 --- a/lbdex/verilog/dynlinker.v +++ b/lbdex/verilog/dynlinker.v @@ -89,10 +89,10 @@ // below code set memory as follows, // ----------------------------------- // gp ------------------------------> | all 0 | (16 bytes) -// gp+16 ---------------------------> | 0 | -// gp+16+1*4 -----------------------> | 1st plt entry address | (4 bytes) -// | ... | -// gp+16+(numDynEntry-1)*4 ---------> | the last plt entry address | +// gp+16 ---------------------------> | 0 | +// gp+16+1*4 -----------------------> | 1st plt entry address | (4 bytes) +// | ... | +// gp+16+(numDynEntry-1)*4 ---------> | the last plt entry address | // ----------------------------------- // gpPlt ---------------------------> | all 0 | (16 bytes) // gpPlt+16+0*8'h10 ----------------> | 32'h10: pointer to plt0 | @@ -170,7 +170,7 @@ // show (gpPlt..gpPlt+(numDynEntry+1)*8'h10-1) for (i=0; i < numDynEntry; i=i+1) begin for (j=0; j < 16; j=j+4) - $display("%8x: %8x", gpPlt+i*8'h10+j, + $display("%8x: %8x", gpPlt+i*8'h20+j, {m[gpPlt+i*8'h20+j], m[gpPlt+i*8'h20+j+1], m[gpPlt+i*8'h20+j+2],