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Rename DSP_fftw.jl -> fftw.jl

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1 parent 05b6bbd commit e1ba1ebf09da42a5bd7f4ed18f1595ae06032b4c @ViralBShah ViralBShah committed Sep 22, 2012
Showing with 1 addition and 1 deletion.
  1. 0 base/{DSP_fftw.jl → fftw.jl}
  2. +1 −1 base/sysimg.jl
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@@ -137,7 +137,7 @@ include("linalg_specialized.jl")
include("factorizations.jl")
# signal processing
-include("DSP_fftw.jl")
+include("fftw.jl")
include("DSP.jl")
import Base.DSP.*

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